Commit 940d35f3 authored by Jisheng Zhang's avatar Jisheng Zhang Committed by Greg Kroah-Hartman

PCI: dwc: Fix scheduling while atomic issues

[ Upstream commit 9024143e ]

When programming the inbound/outbound ATUs, we call usleep_range() after
each checking PCIE_ATU_ENABLE bit. Unfortunately, the ATU programming
can be executed in atomic context:

inbound ATU programming could be called through
pci_epc_write_header()
  =>dw_pcie_ep_write_header()
    =>dw_pcie_prog_inbound_atu()

outbound ATU programming could be called through
pci_bus_read_config_dword()
  =>dw_pcie_rd_conf()
    =>dw_pcie_prog_outbound_atu()

Fix this issue by calling mdelay() instead.

Fixes: f8aed6ec ("PCI: dwc: designware: Add EP mode support")
Fixes: d8bbeb39 ("PCI: designware: Wait for iATU enable")
Signed-off-by: default avatarJisheng Zhang <Jisheng.Zhang@synaptics.com>
[lorenzo.pieralisi@arm.com: commit log update]
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Acked-by: default avatarGustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: default avatarSasha Levin <alexander.levin@microsoft.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 48047b84
...@@ -138,7 +138,7 @@ static void dw_pcie_prog_outbound_atu_unroll(struct dw_pcie *pci, int index, ...@@ -138,7 +138,7 @@ static void dw_pcie_prog_outbound_atu_unroll(struct dw_pcie *pci, int index,
if (val & PCIE_ATU_ENABLE) if (val & PCIE_ATU_ENABLE)
return; return;
usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX); mdelay(LINK_WAIT_IATU);
} }
dev_err(pci->dev, "outbound iATU is not being enabled\n"); dev_err(pci->dev, "outbound iATU is not being enabled\n");
} }
...@@ -181,7 +181,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type, ...@@ -181,7 +181,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type,
if (val & PCIE_ATU_ENABLE) if (val & PCIE_ATU_ENABLE)
return; return;
usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX); mdelay(LINK_WAIT_IATU);
} }
dev_err(pci->dev, "outbound iATU is not being enabled\n"); dev_err(pci->dev, "outbound iATU is not being enabled\n");
} }
...@@ -239,7 +239,7 @@ static int dw_pcie_prog_inbound_atu_unroll(struct dw_pcie *pci, int index, ...@@ -239,7 +239,7 @@ static int dw_pcie_prog_inbound_atu_unroll(struct dw_pcie *pci, int index,
if (val & PCIE_ATU_ENABLE) if (val & PCIE_ATU_ENABLE)
return 0; return 0;
usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX); mdelay(LINK_WAIT_IATU);
} }
dev_err(pci->dev, "inbound iATU is not being enabled\n"); dev_err(pci->dev, "inbound iATU is not being enabled\n");
...@@ -285,7 +285,7 @@ int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int bar, ...@@ -285,7 +285,7 @@ int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int bar,
if (val & PCIE_ATU_ENABLE) if (val & PCIE_ATU_ENABLE)
return 0; return 0;
usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX); mdelay(LINK_WAIT_IATU);
} }
dev_err(pci->dev, "inbound iATU is not being enabled\n"); dev_err(pci->dev, "inbound iATU is not being enabled\n");
......
...@@ -28,8 +28,7 @@ ...@@ -28,8 +28,7 @@
/* Parameters for the waiting for iATU enabled routine */ /* Parameters for the waiting for iATU enabled routine */
#define LINK_WAIT_MAX_IATU_RETRIES 5 #define LINK_WAIT_MAX_IATU_RETRIES 5
#define LINK_WAIT_IATU_MIN 9000 #define LINK_WAIT_IATU 9
#define LINK_WAIT_IATU_MAX 10000
/* Synopsys-specific PCIe configuration registers */ /* Synopsys-specific PCIe configuration registers */
#define PCIE_PORT_LINK_CONTROL 0x710 #define PCIE_PORT_LINK_CONTROL 0x710
......
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