Commit 9433d5b2 authored by Vasant Hegde's avatar Vasant Hegde Committed by Joerg Roedel

iommu/amd: Rename amd_iommu_v2_supported() as amd_iommu_pasid_supported()

To reflect its usage. No functional changes intended.
Signed-off-by: default avatarVasant Hegde <vasant.hegde@amd.com>
Reviewed-by: default avatarJason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20240418103400.6229-2-vasant.hegde@amd.comSigned-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent ed30a4a5
...@@ -38,7 +38,7 @@ extern int amd_iommu_guest_ir; ...@@ -38,7 +38,7 @@ extern int amd_iommu_guest_ir;
extern enum io_pgtable_fmt amd_iommu_pgtable; extern enum io_pgtable_fmt amd_iommu_pgtable;
extern int amd_iommu_gpt_level; extern int amd_iommu_gpt_level;
bool amd_iommu_v2_supported(void); bool amd_iommu_pasid_supported(void);
/* Device capabilities */ /* Device capabilities */
int amd_iommu_pdev_enable_cap_pri(struct pci_dev *pdev); int amd_iommu_pdev_enable_cap_pri(struct pci_dev *pdev);
......
...@@ -3690,7 +3690,7 @@ __setup("ivrs_ioapic", parse_ivrs_ioapic); ...@@ -3690,7 +3690,7 @@ __setup("ivrs_ioapic", parse_ivrs_ioapic);
__setup("ivrs_hpet", parse_ivrs_hpet); __setup("ivrs_hpet", parse_ivrs_hpet);
__setup("ivrs_acpihid", parse_ivrs_acpihid); __setup("ivrs_acpihid", parse_ivrs_acpihid);
bool amd_iommu_v2_supported(void) bool amd_iommu_pasid_supported(void)
{ {
/* CPU page table size should match IOMMU guest page table size */ /* CPU page table size should match IOMMU guest page table size */
if (cpu_feature_enabled(X86_FEATURE_LA57) && if (cpu_feature_enabled(X86_FEATURE_LA57) &&
......
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