Commit 953a400a authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'qcom-dt-for-4.6' of...

Merge tag 'qcom-dt-for-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt

Merge "Qualcomm ARM Based Device Tree Updates for v4.6" from Andy Gross:

* Add documentation for Kryo
* Add RPMCC node for APQ8064
* Updates for MSM8974
* Add board clocks
* Add support for Nexus7 device
* Fixup pmic reg properties
* Various updates/cleanups for APQ8064 based boards

* tag 'qcom-dt-for-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: (23 commits)
  ARM: dts: ifc6410: add correct aliases to the i2c and spi bus
  ARM: dts: apq8064: add i2c6 device node.
  ARM: dts: ifc6410: enable cam i2c device
  ARM: dts: apq8064: add gsbi4 with i2c node.
  ARM: dts: apq8064: add missing i2c2 pinctrl info
  ARM: dts: ifc6410: enable spi device on expansion
  ARM: dts: apq8064: add spi5 device node.
  ARM: dts: apq8064: add i2c sleep pinctrl states.
  ARM: dts: apq8064: add pci support in CM QS600
  ARM: dts: apq8064: move pinctrls to dedicated dtsi
  ARM: dts: qcom: fix i2c lables to be inline with others
  dts: msm8974: Add dma channels for blsp2_i2c1 node
  dts: msm8974: Add blsp2_bam dma node
  ARM: dts: qcom: Remove size elements from pmic reg properties
  devicetree: bindings: Document qcom board compatible format
  devicetree: Add DTS file to support the Nexus7 2013 (flo) device.
  devicetree: qcom-apq8064.dtsi: Add i2c3 address-cells and size-cells values
  arm: dts: qcom: Add more board clocks
  ARM: dts: qcom: msm8974: Add WCNSS SMP2P node
  ARM: dts: qcom: msm8974: Add smsm node
  ...
parents 53b28f1c 90bd6e8f
......@@ -178,6 +178,7 @@ nodes to be present and contain the properties described below.
"marvell,sheeva-v5"
"nvidia,tegra132-denver"
"qcom,krait"
"qcom,kryo"
"qcom,scorpion"
- enable-method
Value type: <stringlist>
......
QCOM device tree bindings
-------------------------
Some qcom based bootloaders identify the dtb blob based on a set of
device properties like SoC and platform and revisions of those components.
To support this scheme, we encode this information into the board compatible
string.
Each board must specify a top-level board compatible string with the following
format:
compatible = "qcom,<SoC>[-<soc_version>][-<foundry_id>]-<board>[/<subtype>][-<board_version>]"
The 'SoC' and 'board' elements are required. All other elements are optional.
The 'SoC' element must be one of the following strings:
apq8016
apq8074
apq8084
apq8096
msm8916
msm8974
msm8996
The 'board' element must be one of the following strings:
cdp
liquid
dragonboard
mtp
sbc
The 'soc_version' and 'board_version' elements take the form of v<Major>.<Minor>
where the minor number may be omitted when it's zero, i.e. v1.0 is the same
as v1. If all versions of the 'board_version' elements match, then a
wildcard '*' should be used, e.g. 'v*'.
The 'foundry_id' and 'subtype' elements are one or more digits from 0 to 9.
Examples:
"qcom,msm8916-v1-cdp-pm8916-v2.1"
A CDP board with an msm8916 SoC, version 1 paired with a pm8916 PMIC of version
2.1.
"qcom,apq8074-v2.0-2-dragonboard/1-v0.1"
A dragonboard board v0.1 of subtype 1 with an apq8074 SoC version 2, made in
foundry 2.
......@@ -533,6 +533,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-apq8064-cm-qs600.dtb \
qcom-apq8064-ifc6410.dtb \
qcom-apq8064-sony-xperia-yuga.dtb \
qcom-apq8064-asus-nexus7-flo.dtb \
qcom-apq8074-dragonboard.dtb \
qcom-apq8084-ifc6540.dtb \
qcom-apq8084-mtp.dtb \
......
#include "qcom-apq8064-v2.0.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
/ {
model = "Asus Nexus7(flo)";
compatible = "asus,nexus7-flo", "qcom,apq8064";
aliases {
serial0 = &gsbi7_serial;
serial1 = &gsbi6_serial;
};
chosen {
stdout-path = "serial0:115200n8";
};
ext_3p3v: regulator-fixed@1 {
compatible = "regulator-fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "ext_3p3v";
regulator-type = "voltage";
startup-delay-us = <0>;
gpio = <&tlmm_pinmux 77 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-boot-on;
};
gpio-keys {
compatible = "gpio-keys";
power {
label = "Power";
gpios = <&tlmm_pinmux 26 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
gpio-key,wakeup;
};
volume_up {
label = "Volume Up";
gpios = <&pm8921_gpio 4 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_VOLUMEUP>;
};
volume_down {
label = "Volume Down";
gpios = <&pm8921_gpio 38 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_VOLUMEDOWN>;
};
};
soc {
rpm@108000 {
regulators {
vdd_l1_l2_l12_l18-supply = <&pm8921_s4>;
vin_lvs1_3_6-supply = <&pm8921_s4>;
vin_lvs4_5_7-supply = <&pm8921_s4>;
vdd_l24-supply = <&pm8921_s1>;
vdd_l25-supply = <&pm8921_s1>;
vin_lvs2-supply = <&pm8921_s1>;
vdd_l26-supply = <&pm8921_s7>;
vdd_l27-supply = <&pm8921_s7>;
vdd_l28-supply = <&pm8921_s7>;
vdd_ncp-supply = <&pm8921_l6>;
/* Buck SMPS */
s1 {
regulator-always-on;
regulator-min-microvolt = <1225000>;
regulator-max-microvolt = <1225000>;
qcom,switch-mode-frequency = <3200000>;
bias-pull-down;
};
/* msm otg HSUSB_VDDCX */
s3 {
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1150000>;
qcom,switch-mode-frequency = <4800000>;
};
/*
* msm_sdcc.1-sdc-vdd_io
* tabla2x-slim-CDC_VDDA_RX
* tabla2x-slim-CDC_VDDA_TX
* tabla2x-slim-CDC_VDD_CP
* tabla2x-slim-VDDIO_CDC
*/
s4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,switch-mode-frequency = <3200000>;
regulator-always-on;
};
s7 {
regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1300000>;
qcom,switch-mode-frequency = <3200000>;
};
/* mipi_dsi.1-dsi1_pll_vdda */
l2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
/* msm_otg-HSUSB_3p3 */
l3 {
regulator-min-microvolt = <3075000>;
regulator-max-microvolt = <3075000>;
bias-pull-down;
};
/* msm_otg-HSUSB_1p8 */
l4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
bias-pull-down;
};
/* msm_sdcc.1-sdc_vdd */
l5 {
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
regulator-always-on;
bias-pull-down;
};
l6 {
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
};
/* mipi_dsi.1-dsi1_avdd */
l11 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
bias-pull-down;
};
/* pwm_power for backlight */
l17 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3600000>;
bias-pull-down;
};
/* camera, qdsp6 */
l23 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
bias-pull-down;
};
/*
* tabla2x-slim-CDC_VDDA_A_1P2V
* tabla2x-slim-VDDD_CDC_D
*/
l25 {
regulator-min-microvolt = <1250000>;
regulator-max-microvolt = <1250000>;
bias-pull-down;
};
lvs1 {
bias-pull-down;
};
lvs4 {
bias-pull-down;
};
lvs5 {
bias-pull-down;
};
lvs6 {
bias-pull-down;
};
/*
* mipi_dsi.1-dsi1_vddio
* pil_riva-pll_vdd
*/
lvs7 {
bias-pull-down;
};
};
};
gsbi@16200000 {
status = "okay";
qcom,mode = <GSBI_PROT_I2C>;
i2c@16280000 {
status = "okay";
clock-frequency = <200000>;
pinctrl-0 = <&i2c3_pins>;
pinctrl-names = "default";
trackpad@10 {
compatible = "elan,ekth3500";
reg = <0x10>;
interrupt-parent = <&tlmm_pinmux>;
interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
};
};
};
gsbi@12440000 {
status = "okay";
qcom,mode = <GSBI_PROT_I2C>;
i2c@12460000 {
status = "okay";
clock-frequency = <200000>;
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
eeprom@52 {
compatible = "atmel,24c128";
reg = <0x52>;
pagesize = <32>;
};
};
};
gsbi@16500000 {
status = "ok";
qcom,mode = <GSBI_PROT_I2C_UART>;
serial@16540000 {
status = "ok";
pinctrl-names = "default";
pinctrl-0 = <&gsbi6_uart_4pins>;
};
};
gsbi@16600000 {
status = "ok";
qcom,mode = <GSBI_PROT_I2C_UART>;
serial@16640000 {
status = "ok";
};
};
/* OTG */
phy@12500000 {
status = "okay";
vddcx-supply = <&pm8921_s3>;
v3p3-supply = <&pm8921_l3>;
v1p8-supply = <&pm8921_l4>;
};
gadget@12500000 {
status = "okay";
};
/* OTG */
usb@12500000 {
status = "okay";
};
amba {
/* eMMC */
sdcc@12400000 {
status = "okay";
vmmc-supply = <&pm8921_l5>;
vqmmc-supply = <&pm8921_s4>;
};
};
};
};
......@@ -37,6 +37,18 @@ mux {
bias-disable;
};
};
pcie_pins: pcie_pinmux {
mux {
pins = "gpio27";
function = "gpio";
};
conf {
pins = "gpio27";
drive-strength = <12>;
bias-disable;
};
};
};
rpm@108000 {
......@@ -103,6 +115,11 @@ l23 {
regulator-max-microvolt = <1900000>;
bias-pull-down;
};
pm8921_lvs6: lvs6 {
bias-pull-down;
};
};
};
......@@ -195,6 +212,16 @@ pios {
};
};
pci@1b500000 {
status = "ok";
vdda-supply = <&pm8921_s3>;
vdda_phy-supply = <&pm8921_lvs6>;
vdda_refclk-supply = <&v3p3_fixed>;
pinctrl-0 = <&pcie_pins>;
pinctrl-names = "default";
perst-gpio = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>;
};
amba {
/* eMMC */
sdcc1: sdcc@12400000 {
......
......@@ -9,6 +9,11 @@ / {
aliases {
serial0 = &gsbi7_serial;
serial1 = &gsbi6_serial;
i2c0 = &gsbi1_i2c;
i2c1 = &gsbi2_i2c;
i2c2 = &gsbi3_i2c;
i2c3 = &gsbi4_i2c;
spi0 = &gsbi5_spi;
};
chosen {
......@@ -157,7 +162,16 @@ ext_3p3v: regulator-fixed@1 {
gsbi3: gsbi@16200000 {
status = "okay";
qcom,mode = <GSBI_PROT_I2C>;
i2c3: i2c@16280000 {
i2c@16280000 {
status = "okay";
};
};
gsbi@16300000 {
status = "okay";
qcom,mode = <GSBI_PROT_I2C>;
/* CAM I2C MIPI-CSI connector */
i2c@16380000 {
status = "okay";
};
};
......@@ -178,6 +192,16 @@ eeprom@52 {
};
};
gsbi@1a200000 {
qcom,mode = <GSBI_PROT_SPI>;
status = "okay";
spi4: spi@1a280000 {
status = "okay";
num-cs = <1>;
cs-gpios = <&tlmm_pinmux 53 0>;
};
};
gsbi@16500000 {
status = "ok";
qcom,mode = <GSBI_PROT_UART_W_FC>;
......
&tlmm_pinmux {
sdc4_gpios: sdc4-gpios {
pios {
pins = "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68";
function = "sdc4";
};
};
ps_hold: ps_hold {
mux {
pins = "gpio78";
function = "ps_hold";
};
};
i2c1_pins: i2c1 {
mux {
pins = "gpio20", "gpio21";
function = "gsbi1";
};
pinconf {
pins = "gpio20", "gpio21";
drive-strength = <16>;
bias-disable;
};
};
i2c1_pins_sleep: i2c1_pins_sleep {
mux {
pins = "gpio20", "gpio21";
function = "gpio";
};
pinconf {
pins = "gpio20", "gpio21";
drive-strength = <2>;
bias-disable = <0>;
};
};
i2c2_pins: i2c2 {
mux {
pins = "gpio24", "gpio25";
function = "gsbi2";
};
pinconf {
pins = "gpio24", "gpio25";
drive-strength = <16>;
bias-disable;
};
};
i2c2_pins_sleep: i2c2_pins_sleep {
mux {
pins = "gpio24", "gpio25";
function = "gpio";
};
pinconf {
pins = "gpio24", "gpio25";
drive-strength = <2>;
bias-disable = <0>;
};
};
i2c3_pins: i2c3 {
mux {
pins = "gpio8", "gpio9";
function = "gsbi3";
};
pinconf {
pins = "gpio8", "gpio9";
drive-strength = <16>;
bias-disable;
};
};
i2c3_pins_sleep: i2c3_pins_sleep {
mux {
pins = "gpio8", "gpio9";
function = "gpio";
};
pinconf {
pins = "gpio8", "gpio9";
drive-strength = <2>;
bias-disable = <0>;
};
};
i2c4_pins: i2c4 {
mux {
pins = "gpio12", "gpio13";
function = "gsbi4";
};
pinconf {
pins = "gpio12", "gpio13";
drive-strength = <16>;
bias-disable;
};
};
i2c4_pins_sleep: i2c4_pins_sleep {
mux {
pins = "gpio12", "gpio13";
function = "gpio";
};
pinconf {
pins = "gpio12", "gpio13";
drive-strength = <2>;
bias-disable = <0>;
};
};
spi5_default: spi5_default {
pinmux {
pins = "gpio51", "gpio52", "gpio54";
function = "gsbi5";
};
pinmux_cs {
function = "gpio";
pins = "gpio53";
};
pinconf {
pins = "gpio51", "gpio52", "gpio54";
drive-strength = <16>;
bias-disable;
};
pinconf_cs {
pins = "gpio53";
drive-strength = <16>;
bias-disable;
output-high;
};
};
spi5_sleep: spi5_sleep {
pinmux {
function = "gpio";
pins = "gpio51", "gpio52", "gpio53", "gpio54";
};
pinconf {
pins = "gpio51", "gpio52", "gpio53", "gpio54";
drive-strength = <2>;
bias-pull-down;
};
};
i2c6_pins: i2c6 {
mux {
pins = "gpio16", "gpio17";
function = "gsbi6";
};
pinconf {
pins = "gpio16", "gpio17";
drive-strength = <16>;
bias-disable;
};
};
i2c6_pins_sleep: i2c6_pins_sleep {
mux {
pins = "gpio16", "gpio17";
function = "gpio";
};
pinconf {
pins = "gpio16", "gpio17";
drive-strength = <2>;
bias-disable = <0>;
};
};
gsbi6_uart_2pins: gsbi6_uart_2pins {
mux {
pins = "gpio14", "gpio15";
function = "gsbi6";
};
};
gsbi6_uart_4pins: gsbi6_uart_4pins {
mux {
pins = "gpio14", "gpio15", "gpio16", "gpio17";
function = "gsbi6";
};
};
gsbi7_uart_2pins: gsbi7_uart_2pins {
mux {
pins = "gpio82", "gpio83";
function = "gsbi7";
};
};
gsbi7_uart_4pins: gsbi7_uart_4pins {
mux {
pins = "gpio82", "gpio83", "gpio84", "gpio85";
function = "gsbi7";
};
};
};
......@@ -142,62 +142,6 @@ tlmm_pinmux: pinctrl@800000 {
pinctrl-names = "default";
pinctrl-0 = <&ps_hold>;
sdc4_gpios: sdc4-gpios {
pios {
pins = "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68";
function = "sdc4";
};
};
ps_hold: ps_hold {
mux {
pins = "gpio78";
function = "ps_hold";
};
};
i2c1_pins: i2c1 {
mux {
pins = "gpio20", "gpio21";
function = "gsbi1";
};
};
i2c3_pins: i2c3 {
mux {
pins = "gpio8", "gpio9";
function = "gsbi3";
};
};
gsbi6_uart_2pins: gsbi6_uart_2pins {
mux {
pins = "gpio14", "gpio15";
function = "gsbi6";
};
};
gsbi6_uart_4pins: gsbi6_uart_4pins {
mux {
pins = "gpio14", "gpio15", "gpio16", "gpio17";
function = "gsbi6";
};
};
gsbi7_uart_2pins: gsbi7_uart_2pins {
mux {
pins = "gpio82", "gpio83";
function = "gsbi7";
};
};
gsbi7_uart_4pins: gsbi7_uart_4pins {
mux {
pins = "gpio82", "gpio83", "gpio84", "gpio85";
function = "gsbi7";
};
};
};
sfpb_wrapper_mutex: syscon@1200000 {
......@@ -281,10 +225,10 @@ gsbi1: gsbi@12440000 {
syscon-tcsr = <&tcsr>;
i2c1: i2c@12460000 {
gsbi1_i2c: i2c@12460000 {
compatible = "qcom,i2c-qup-v1.1.1";
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins &i2c1_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x12460000 0x1000>;
interrupts = <0 194 IRQ_TYPE_NONE>;
clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>;
......@@ -292,6 +236,7 @@ i2c1: i2c@12460000 {
#address-cells = <1>;
#size-cells = <0>;
};
};
gsbi2: gsbi@12480000 {
......@@ -307,9 +252,11 @@ gsbi2: gsbi@12480000 {
syscon-tcsr = <&tcsr>;
i2c2: i2c@124a0000 {
gsbi2_i2c: i2c@124a0000 {
compatible = "qcom,i2c-qup-v1.1.1";
reg = <0x124a0000 0x1000>;
pinctrl-0 = <&i2c2_pins &i2c2_pins_sleep>;
pinctrl-names = "default", "sleep";
interrupts = <0 196 IRQ_TYPE_NONE>;
clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>;
clock-names = "core", "iface";
......@@ -328,15 +275,40 @@ gsbi3: gsbi@16200000 {
#address-cells = <1>;
#size-cells = <1>;
ranges;
i2c3: i2c@16280000 {
gsbi3_i2c: i2c@16280000 {
compatible = "qcom,i2c-qup-v1.1.1";
pinctrl-0 = <&i2c3_pins>;
pinctrl-names = "default";
pinctrl-0 = <&i2c3_pins &i2c3_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x16280000 0x1000>;
interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
clocks = <&gcc GSBI3_QUP_CLK>,
<&gcc GSBI3_H_CLK>;
clock-names = "core", "iface";
#address-cells = <1>;
#size-cells = <0>;
};
};
gsbi4: gsbi@16300000 {
status = "disabled";
compatible = "qcom,gsbi-v1.0.0";
cell-index = <4>;
reg = <0x16300000 0x03>;
clocks = <&gcc GSBI4_H_CLK>;
clock-names = "iface";
#address-cells = <1>;
#size-cells = <1>;
ranges;
gsbi4_i2c: i2c@16380000 {
compatible = "qcom,i2c-qup-v1.1.1";
pinctrl-0 = <&i2c4_pins &i2c4_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x16380000 0x1000>;
interrupts = <GIC_SPI 153 IRQ_TYPE_NONE>;
clocks = <&gcc GSBI4_QUP_CLK>,
<&gcc GSBI4_H_CLK>;
clock-names = "core", "iface";
};
};
......@@ -360,6 +332,19 @@ gsbi5_serial: serial@1a240000 {
clock-names = "core", "iface";
status = "disabled";
};
gsbi5_spi: spi@1a280000 {
compatible = "qcom,spi-qup-v1.1.1";
reg = <0x1a280000 0x1000>;
interrupts = <0 155 0>;
pinctrl-0 = <&spi5_default &spi5_sleep>;
pinctrl-names = "default", "sleep";
clocks = <&gcc GSBI5_QUP_CLK>, <&gcc GSBI5_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
};
gsbi6: gsbi@16500000 {
......@@ -382,6 +367,17 @@ gsbi6_serial: serial@16540000 {
clock-names = "core", "iface";
status = "disabled";
};
gsbi6_i2c: i2c@16580000 {
compatible = "qcom,i2c-qup-v1.1.1";
pinctrl-0 = <&i2c6_pins &i2c6_pins_sleep>;
pinctrl-names = "default", "sleep";
reg = <0x16580000 0x1000>;
interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
clocks = <&gcc GSBI6_QUP_CLK>,
<&gcc GSBI6_H_CLK>;
clock-names = "core", "iface";
};
};
gsbi7: gsbi@16600000 {
......@@ -521,6 +517,11 @@ rpm@108000 {
<GIC_SPI 22 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "ack", "err", "wakeup";
rpmcc: clock-controller {
compatible = "qcom,rpmcc-apq8064", "qcom,rpmcc";
#clock-cells = <1>;
};
regulators {
compatible = "qcom,rpm-pm8921-regulators";
......@@ -823,3 +824,4 @@ pcie: pci@1b500000 {
};
};
};
#include "qcom-apq8064-pins.dtsi"
......@@ -91,6 +91,20 @@ cpu-pmu {
interrupts = <1 7 0xf04>;
};
clocks {
xo_board {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <19200000>;
};
sleep_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
timer {
compatible = "arm,armv7-timer";
interrupts = <1 2 0xf08>,
......
......@@ -62,6 +62,18 @@ smem@41000000 {
};
clocks {
cxo_board {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <19200000>;
};
pxo_board {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
};
sleep_clk: sleep_clk {
compatible = "fixed-clock";
clock-frequency = <32768>;
......
......@@ -42,6 +42,26 @@ cpu-pmu {
interrupts = <1 9 0x304>;
};
clocks {
cxo_board {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <19200000>;
};
pxo_board {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
};
sleep_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
soc: soc {
#address-cells = <1>;
#size-cells = <1>;
......
/dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-msm8974.h>
#include "skeleton.dtsi"
......@@ -14,10 +14,50 @@ reserved-memory {
#size-cells = <1>;
ranges;
mpss@08000000 {
reg = <0x08000000 0x5100000>;
no-map;
};
mba@00d100000 {
reg = <0x0d100000 0x100000>;
no-map;
};
reserved@0d200000 {
reg = <0x0d200000 0xa00000>;
no-map;
};
adsp@0dc00000 {
reg = <0x0dc00000 0x1900000>;
no-map;
};
venus@0f500000 {
reg = <0x0f500000 0x500000>;
no-map;
};
smem_region: smem@fa00000 {
reg = <0xfa00000 0x200000>;
no-map;
};
tz@0fc00000 {
reg = <0x0fc00000 0x160000>;
no-map;
};
efs@0fd600000 {
reg = <0x0fd60000 0x1a0000>;
no-map;
};
unused@0ff00000 {
reg = <0x0ff00000 0x10100000>;
no-map;
};
};
cpus {
......@@ -91,6 +131,20 @@ cpu-pmu {
interrupts = <1 7 0xf04>;
};
clocks {
xo_board {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <19200000>;
};
sleep_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
timer {
compatible = "arm,armv7-timer";
interrupts = <1 2 0xf08>,
......@@ -109,6 +163,73 @@ smem {
hwlocks = <&tcsr_mutex 3>;
};
smp2p-wcnss {
compatible = "qcom,smp2p";
qcom,smem = <451>, <431>;
interrupt-parent = <&intc>;
interrupts = <0 143 IRQ_TYPE_EDGE_RISING>;
qcom,ipc = <&apcs 8 18>;
qcom,local-pid = <0>;
qcom,remote-pid = <4>;
wcnss_smp2p_out: master-kernel {
qcom,entry-name = "master-kernel";
#qcom,state-cells = <1>;
};
wcnss_smp2p_in: slave-kernel {
qcom,entry-name = "slave-kernel";
interrupt-controller;
#interrupt-cells = <2>;
};
};
smsm {
compatible = "qcom,smsm";
#address-cells = <1>;
#size-cells = <0>;
qcom,ipc-1 = <&apcs 8 13>;
qcom,ipc-2 = <&apcs 8 9>;
qcom,ipc-3 = <&apcs 8 19>;
apps_smsm: apps@0 {
reg = <0>;
#qcom,state-cells = <1>;
};
modem_smsm: modem@1 {
reg = <1>;
interrupts = <0 26 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <2>;
};
adsp_smsm: adsp@2 {
reg = <2>;
interrupts = <0 157 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <2>;
};
wcnss_smsm: wcnss@7 {
reg = <7>;
interrupts = <0 144 IRQ_TYPE_EDGE_RISING>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
soc: soc {
#address-cells = <1>;
#size-cells = <1>;
......@@ -339,6 +460,8 @@ blsp_i2c11: i2c@f9967000 {
clock-names = "core", "iface";
#address-cells = <1>;
#size-cells = <0>;
dmas = <&blsp2_dma 20>, <&blsp2_dma 21>;
dma-names = "tx", "rx";
};
spmi_bus: spmi@fc4cf000 {
......@@ -356,6 +479,16 @@ spmi_bus: spmi@fc4cf000 {
interrupt-controller;
#interrupt-cells = <4>;
};
blsp2_dma: dma-controller@f9944000 {
compatible = "qcom,bam-v1.4.0";
reg = <0xf9944000 0x19000>;
interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP2_AHB_CLK>;
clock-names = "bam_clk";
#dma-cells = <1>;
qcom,ee = <0>;
};
};
smd {
......
......@@ -11,7 +11,7 @@ pm8841_0: pm8841@4 {
pm8841_mpps: mpps@a000 {
compatible = "qcom,pm8841-mpp", "qcom,spmi-mpp";
reg = <0xa000 0x400>;
reg = <0xa000>;
gpio-controller;
#gpio-cells = <2>;
interrupts = <4 0xa0 0 IRQ_TYPE_NONE>,
......@@ -22,7 +22,7 @@ pm8841_mpps: mpps@a000 {
temp-alarm@2400 {
compatible = "qcom,spmi-temp-alarm";
reg = <0x2400 0x100>;
reg = <0x2400>;
interrupts = <4 0x24 0 IRQ_TYPE_EDGE_RISING>;
};
};
......
......@@ -12,15 +12,15 @@ pm8941_0: pm8941@0 {
rtc@6000 {
compatible = "qcom,pm8941-rtc";
reg = <0x6000 0x100>,
<0x6100 0x100>;
reg = <0x6000>,
<0x6100>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
};
pwrkey@800 {
compatible = "qcom,pm8941-pwrkey";
reg = <0x800 0x100>;
reg = <0x800>;
interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
debounce = <15625>;
bias-pull-up;
......@@ -28,7 +28,7 @@ pwrkey@800 {
charger@1000 {
compatible = "qcom,pm8941-charger";
reg = <0x1000 0x700>;
reg = <0x1000>;
interrupts = <0x0 0x10 7 IRQ_TYPE_EDGE_BOTH>,
<0x0 0x10 5 IRQ_TYPE_EDGE_BOTH>,
<0x0 0x10 4 IRQ_TYPE_EDGE_BOTH>,
......@@ -49,7 +49,7 @@ charger@1000 {
pm8941_gpios: gpios@c000 {
compatible = "qcom,pm8941-gpio", "qcom,spmi-gpio";
reg = <0xc000 0x2400>;
reg = <0xc000>;
gpio-controller;
#gpio-cells = <2>;
interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
......@@ -92,7 +92,7 @@ pm8941_gpios: gpios@c000 {
pm8941_mpps: mpps@a000 {
compatible = "qcom,pm8941-mpp", "qcom,spmi-mpp";
reg = <0xa000 0x800>;
reg = <0xa000>;
gpio-controller;
#gpio-cells = <2>;
interrupts = <0 0xa0 0 IRQ_TYPE_NONE>,
......@@ -107,7 +107,7 @@ pm8941_mpps: mpps@a000 {
pm8941_temp: temp-alarm@2400 {
compatible = "qcom,spmi-temp-alarm";
reg = <0x2400 0x100>;
reg = <0x2400>;
interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>;
io-channels = <&pm8941_vadc VADC_DIE_TEMP>;
io-channel-names = "thermal";
......@@ -116,7 +116,7 @@ pm8941_temp: temp-alarm@2400 {
pm8941_vadc: vadc@3100 {
compatible = "qcom,spmi-vadc";
reg = <0x3100 0x100>;
reg = <0x3100>;
interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
......@@ -141,7 +141,7 @@ ref_vdd {
pm8941_iadc: iadc@3600 {
compatible = "qcom,pm8941-iadc", "qcom,spmi-iadc";
reg = <0x3600 0x100>;
reg = <0x3600>;
interrupts = <0x0 0x36 0x0 IRQ_TYPE_EDGE_RISING>;
qcom,external-resistor-micro-ohms = <10000>;
};
......@@ -161,7 +161,7 @@ pm8941_1: pm8941@1 {
pm8941_wled: wled@d800 {
compatible = "qcom,pm8941-wled";
reg = <0xd800 0x100>;
reg = <0xd800>;
label = "backlight";
status = "disabled";
......
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