Commit 95dca2d5 authored by David S. Miller's avatar David S. Miller

Merge branch 'macb-MII-on-RGMII'

Claudiu Beznea says:

====================
net: macb: add support for MII on RGMII interface

This series adds support for MII mode on RGMII interface (patches 3/4,
4/4). Along with this the series also contains minor cleanups (patches 1/3,
2/3) on macb.h.

Changes in v2:
- added patch 4/4 to enable MII on RGMII support for SAMA7G5 MAC IPs
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents b972b54a 0f4f6d73
...@@ -243,9 +243,11 @@ ...@@ -243,9 +243,11 @@
#define MACB_NCR_TPF_SIZE 1 #define MACB_NCR_TPF_SIZE 1
#define MACB_TZQ_OFFSET 12 /* Transmit zero quantum pause frame */ #define MACB_TZQ_OFFSET 12 /* Transmit zero quantum pause frame */
#define MACB_TZQ_SIZE 1 #define MACB_TZQ_SIZE 1
#define MACB_SRTSM_OFFSET 15 #define MACB_SRTSM_OFFSET 15 /* Store Receive Timestamp to Memory */
#define MACB_OSSMODE_OFFSET 24 /* Enable One Step Synchro Mode */ #define MACB_OSSMODE_OFFSET 24 /* Enable One Step Synchro Mode */
#define MACB_OSSMODE_SIZE 1 #define MACB_OSSMODE_SIZE 1
#define MACB_MIIONRGMII_OFFSET 28 /* MII Usage on RGMII Interface */
#define MACB_MIIONRGMII_SIZE 1
/* Bitfields in NCFGR */ /* Bitfields in NCFGR */
#define MACB_SPD_OFFSET 0 /* Speed */ #define MACB_SPD_OFFSET 0 /* Speed */
...@@ -713,6 +715,7 @@ ...@@ -713,6 +715,7 @@
#define MACB_CAPS_GEM_HAS_PTP 0x00000040 #define MACB_CAPS_GEM_HAS_PTP 0x00000040
#define MACB_CAPS_BD_RD_PREFETCH 0x00000080 #define MACB_CAPS_BD_RD_PREFETCH 0x00000080
#define MACB_CAPS_NEEDS_RSTONUBR 0x00000100 #define MACB_CAPS_NEEDS_RSTONUBR 0x00000100
#define MACB_CAPS_MIIONRGMII 0x00000200
#define MACB_CAPS_CLK_HW_CHG 0x04000000 #define MACB_CAPS_CLK_HW_CHG 0x04000000
#define MACB_CAPS_MACB_IS_EMAC 0x08000000 #define MACB_CAPS_MACB_IS_EMAC 0x08000000
#define MACB_CAPS_FIFO_MODE 0x10000000 #define MACB_CAPS_FIFO_MODE 0x10000000
......
...@@ -684,6 +684,9 @@ static void macb_mac_config(struct phylink_config *config, unsigned int mode, ...@@ -684,6 +684,9 @@ static void macb_mac_config(struct phylink_config *config, unsigned int mode,
} else if (state->interface == PHY_INTERFACE_MODE_10GBASER) { } else if (state->interface == PHY_INTERFACE_MODE_10GBASER) {
ctrl |= GEM_BIT(PCSSEL); ctrl |= GEM_BIT(PCSSEL);
ncr |= GEM_BIT(ENABLE_HS_MAC); ncr |= GEM_BIT(ENABLE_HS_MAC);
} else if (bp->caps & MACB_CAPS_MIIONRGMII &&
bp->phy_interface == PHY_INTERFACE_MODE_MII) {
ncr |= MACB_BIT(MIIONRGMII);
} }
} }
...@@ -4594,7 +4597,8 @@ static const struct macb_config zynq_config = { ...@@ -4594,7 +4597,8 @@ static const struct macb_config zynq_config = {
}; };
static const struct macb_config sama7g5_gem_config = { static const struct macb_config sama7g5_gem_config = {
.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_CLK_HW_CHG, .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_CLK_HW_CHG |
MACB_CAPS_MIIONRGMII,
.dma_burst_length = 16, .dma_burst_length = 16,
.clk_init = macb_clk_init, .clk_init = macb_clk_init,
.init = macb_init, .init = macb_init,
...@@ -4602,7 +4606,8 @@ static const struct macb_config sama7g5_gem_config = { ...@@ -4602,7 +4606,8 @@ static const struct macb_config sama7g5_gem_config = {
}; };
static const struct macb_config sama7g5_emac_config = { static const struct macb_config sama7g5_emac_config = {
.caps = MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | MACB_CAPS_USRIO_HAS_CLKEN, .caps = MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII |
MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_MIIONRGMII,
.dma_burst_length = 16, .dma_burst_length = 16,
.clk_init = macb_clk_init, .clk_init = macb_clk_init,
.init = macb_init, .init = macb_init,
......
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