Commit 963423ad authored by Deepak Saxena's avatar Deepak Saxena Committed by Russell King

[ARM PATCH] 2261/1: Cleanup use of ixp_reg_write in arch/arm/mach-ixp2000

Patch from Lennert Buytenhek
  
Several files in this directory directly dereference pointers
to on-chip I/O instead of using ixp_reg_write, making them
susceptible to IXP2400 erratum #66. This changset fixes those.
We do not touch any files that will only be built for IXP2800
systems as the 2800 does not have this issue.
  

Signed-off-by: Lennert Buytenhek
Signed-off-by: Deepak Saxena
Signed-off-by: Russell King
parent 0364f754
......@@ -374,7 +374,7 @@ void __init ixp2000_init_irq(void)
/*
* Enable PCI irq
*/
*(IXP2000_IRQ_ENABLE_SET) = (1 << IRQ_IXP2000_PCI);
ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << IRQ_IXP2000_PCI));
for (irq = IRQ_IXP2000_PCIA; irq <= IRQ_IXP2000_PCIB; irq++) {
set_irq_chip(irq, &ixp2000_pci_irq_chip);
set_irq_handler(irq, do_level_IRQ);
......
......@@ -51,12 +51,14 @@
*************************************************************************/
static void ixdp2x01_irq_mask(unsigned int irq)
{
*IXDP2X01_INT_MASK_SET_REG = IXP2000_BOARD_IRQ_MASK(irq);
ixp2000_reg_write(IXDP2X01_INT_MASK_SET_REG,
IXP2000_BOARD_IRQ_MASK(irq));
}
static void ixdp2x01_irq_unmask(unsigned int irq)
{
*IXDP2X01_INT_MASK_CLR_REG = IXP2000_BOARD_IRQ_MASK(irq);
ixp2000_reg_write(IXDP2X01_INT_MASK_CLR_REG,
IXP2000_BOARD_IRQ_MASK(irq));
}
static u32 valid_irq_mask;
......@@ -111,8 +113,8 @@ void __init ixdp2x01_init_irq(void)
valid_irq_mask = IXDP2801_VALID_IRQ_MASK;
/* Mask all interrupts from CPLD, disable simulation */
*IXDP2X01_INT_MASK_SET_REG = 0xffffffff;
*IXDP2X01_INT_SIM_REG = 0;
ixp2000_reg_write(IXDP2X01_INT_MASK_SET_REG, 0xffffffff);
ixp2000_reg_write(IXDP2X01_INT_SIM_REG, 0);
for (irq = NR_IXP2000_IRQS; irq < NR_IXDP2X01_IRQS; irq++) {
if (irq & valid_irq_mask) {
......@@ -314,8 +316,8 @@ static struct flash_platform_data ixdp2x01_flash_platform_data = {
static unsigned long ixdp2x01_flash_bank_setup(unsigned long ofs)
{
*IXDP2X01_CPLD_FLASH_REG =
((ofs >> IXDP2X01_FLASH_WINDOW_BITS) | IXDP2X01_CPLD_FLASH_INTERN);
ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG,
((ofs >> IXDP2X01_FLASH_WINDOW_BITS) | IXDP2X01_CPLD_FLASH_INTERN));
return (ofs & IXDP2X01_FLASH_WINDOW_MASK);
}
......@@ -361,8 +363,8 @@ static struct platform_device *ixdp2x01_devices[] __initdata = {
static void __init ixdp2x01_init_machine(void)
{
*IXDP2X01_CPLD_FLASH_REG =
(IXDP2X01_CPLD_FLASH_BANK_MASK | IXDP2X01_CPLD_FLASH_INTERN);
ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG,
(IXDP2X01_CPLD_FLASH_BANK_MASK | IXDP2X01_CPLD_FLASH_INTERN));
ixdp2x01_flash_data.nr_banks =
((*IXDP2X01_CPLD_FLASH_REG & IXDP2X01_CPLD_FLASH_BANK_MASK) + 1);
......
......@@ -148,13 +148,13 @@ int ixp2000_pci_abort_handler(unsigned long addr, unsigned int fsr, struct pt_re
cli();
temp = *(IXP2000_PCI_CONTROL);
if (temp & ((1 << 8) | (1 << 5))) {
*(IXP2000_PCI_CONTROL) = temp;
ixp2000_reg_write(IXP2000_PCI_CONTROL, temp);
}
temp = *(IXP2000_PCI_CMDSTAT);
if (temp & (1 << 29)) {
while (temp & (1 << 29)) {
*(IXP2000_PCI_CMDSTAT) = temp;
ixp2000_reg_write(IXP2000_PCI_CMDSTAT, temp);
temp = *(IXP2000_PCI_CMDSTAT);
}
}
......@@ -178,13 +178,13 @@ clear_master_aborts(void)
cli();
temp = *(IXP2000_PCI_CONTROL);
if (temp & ((1 << 8) | (1 << 5))) {
*(IXP2000_PCI_CONTROL) = temp;
ixp2000_reg_write(IXP2000_PCI_CONTROL, temp);
}
temp = *(IXP2000_PCI_CMDSTAT);
if (temp & (1 << 29)) {
while (temp & (1 << 29)) {
*(IXP2000_PCI_CMDSTAT) = temp;
ixp2000_reg_write(IXP2000_PCI_CMDSTAT, temp);
temp = *(IXP2000_PCI_CMDSTAT);
}
}
......
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