lab.nexedi.com will be down from Thursday, 20 March 2025, 07:30:00 UTC for a duration of approximately 2 hours

Commit 968f2c91 authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Maxime Ripard

ARM: dts: sunxi: Add mdio bus sub-node to GMAC

The DWMAC binding never supported having the Ethernet PHY node as a
direct child to the controller, nor did it support the "phy" property
as a way to specify which Ethernet PHY to use. What seemed to work
was simply the implementation ignoring the "phy" property and instead
probing all addresses on the MDIO bus and using the first available
one.

The recent switch from "phy" to "phy-handle" breaks the assumptions
of the implementation, and does not match what the binding requires.
The binding requires that if an MDIO bus is described, it shall be
a sub-node with the "snps,dwmac-mdio" compatible string.

Add a device node for the MDIO bus, and move the Ethernet PHY node
under it. Also fix up the #address-cells and #size-cells properties
where needed.

Fixes: de332de2 ("ARM: dts: sunxi: Switch from phy to phy-handle")
Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@bootlin.com>
parent f46f408c
......@@ -79,10 +79,6 @@ &gmac {
phy-handle = <&phy1>;
phy-mode = "rgmii";
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&i2c0 {
......@@ -104,6 +100,12 @@ mma8452: mma8452@1d {
};
};
&mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v0>;
bus-width = <4>;
......
......@@ -156,13 +156,6 @@ &gmac {
phy-handle = <&phy1>;
phy-mode = "rgmii";
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
reset-gpios = <&pio 0 21 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <30000>;
};
};
&hdmi {
......@@ -199,6 +192,15 @@ &ir {
status = "okay";
};
&mdio {
phy1: ethernet-phy@1 {
reg = <1>;
reset-gpios = <&pio 0 21 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <30000>;
};
};
&mmc0 {
vmmc-supply = <&reg_dcdc1>;
bus-width = <4>;
......
......@@ -120,10 +120,6 @@ &gmac {
phy-handle = <&phy1>;
phy-mode = "mii";
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&hdmi {
......@@ -142,6 +138,12 @@ &ir {
status = "okay";
};
&mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
......
......@@ -88,10 +88,6 @@ &gmac {
phy-mode = "mii";
phy-supply = <&reg_dldo1>;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&ir {
......@@ -100,6 +96,12 @@ &ir {
status = "okay";
};
&mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_dcdc1>;
bus-width = <4>;
......
......@@ -88,10 +88,6 @@ &gmac {
phy-mode = "mii";
phy-supply = <&reg_dldo1>;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&ir {
......@@ -100,6 +96,12 @@ &ir {
status = "okay";
};
&mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_dcdc1>;
bus-width = <4>;
......
......@@ -939,8 +939,12 @@ gmac: ethernet@1c30000 {
snps,fixed-burst;
snps,force_sf_dma_mode;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
mdio: mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
};
};
crypto: crypto-engine@1c15000 {
......
......@@ -70,9 +70,6 @@ &gmac {
phy-handle = <&phy1>;
phy-mode = "mii";
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&ir {
......@@ -81,6 +78,12 @@ &ir {
status = "okay";
};
&mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&ohci1 {
status = "okay";
};
......
......@@ -119,10 +119,6 @@ &gmac {
phy-mode = "mii";
phy-supply = <&reg_dldo1>;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&hdmi {
......@@ -160,6 +156,12 @@ button-349 {
};
};
&mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_dcdc1>;
bus-width = <4>;
......
......@@ -96,7 +96,15 @@ &gmac {
phy-mode = "rgmii";
phy-supply = <&reg_dldo1>;
status = "okay";
};
&ir {
pinctrl-names = "default";
pinctrl-0 = <&s_ir_rx_pin>;
status = "okay";
};
&mdio {
phy1: ethernet-phy@1 {
reg = <1>;
reset-gpios = <&pio 0 21 GPIO_ACTIVE_LOW>; /* PA21 */
......@@ -105,12 +113,6 @@ phy1: ethernet-phy@1 {
};
};
&ir {
pinctrl-names = "default";
pinctrl-0 = <&s_ir_rx_pin>;
status = "okay";
};
&mmc0 {
vmmc-supply = <&reg_dcdc1>;
bus-width = <4>;
......
......@@ -133,10 +133,6 @@ &gmac {
phy-mode = "rgmii";
phy-supply = <&reg_gmac_3v3>;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&hdmi {
......@@ -171,6 +167,12 @@ &ir0 {
status = "okay";
};
&gmac_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
......
......@@ -135,10 +135,6 @@ &gmac {
phy-mode = "rgmii";
phy-supply = <&reg_gmac_3v3>;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&hdmi {
......@@ -171,6 +167,12 @@ &ir0 {
status = "okay";
};
&gmac_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
......
......@@ -113,10 +113,6 @@ &gmac {
phy-mode = "rgmii";
phy-supply = <&reg_gmac_3v3>;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&i2c0 {
......@@ -143,6 +139,12 @@ &ir0 {
status = "okay";
};
&gmac_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
......
......@@ -118,10 +118,6 @@ &gmac {
phy-handle = <&phy1>;
phy-mode = "mii";
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&hdmi {
......@@ -161,6 +157,12 @@ &mmc0 {
status = "okay";
};
&gmac_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&ohci0 {
status = "okay";
};
......
......@@ -153,10 +153,6 @@ &gmac {
phy-handle = <&phy1>;
phy-mode = "rgmii";
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&hdmi {
......@@ -194,6 +190,12 @@ &ir0 {
status = "okay";
};
&gmac_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
......
......@@ -104,14 +104,6 @@ &gmac {
phy-mode = "rgmii";
phy-supply = <&reg_gmac_vdd>;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
reset-gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */
reset-assert-us = <10000>;
/* wait 1s after reset, otherwise fail to read phy id */
reset-deassert-us = <1000000>;
};
};
&i2c0 {
......@@ -145,6 +137,16 @@ &ir0 {
status = "okay";
};
&gmac_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
reset-gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */
reset-assert-us = <10000>;
/* wait 1s after reset, otherwise fail to read phy id */
reset-deassert-us = <1000000>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v0>;
bus-width = <4>;
......
......@@ -119,10 +119,6 @@ &gmac {
phy-mode = "mii";
phy-supply = <&reg_gmac_3v3>;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&i2c0 {
......@@ -145,6 +141,12 @@ &ir0 {
status = "okay";
};
&gmac_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
......
......@@ -79,10 +79,6 @@ &gmac {
phy-handle = <&phy1>;
phy-mode = "mii";
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&i2c0 {
......@@ -99,6 +95,12 @@ &i2c1 {
status = "okay";
};
&gmac_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
......
......@@ -100,7 +100,9 @@ &gmac {
phy-handle = <&phy1>;
phy-mode = "mii";
status = "okay";
};
&gmac_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
......
......@@ -123,8 +123,6 @@ &gmac {
phy-mode = "rgmii";
phy-supply = <&reg_gmac_3v3>;
status = "okay";
/delete-property/#address-cells;
/delete-property/#size-cells;
fixed-link {
speed = <1000>;
......
......@@ -85,10 +85,6 @@ &gmac {
phy-handle = <&phy1>;
phy-mode = "mii";
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&i2c0 {
......@@ -111,6 +107,12 @@ &ir0 {
status = "okay";
};
&gmac_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
......
......@@ -114,10 +114,6 @@ &gmac {
phy-handle = <&phy1>;
phy-mode = "rgmii";
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&hdmi {
......@@ -202,6 +198,12 @@ button-1400 {
};
};
&gmac_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
......
......@@ -109,14 +109,6 @@ &gmac {
phy-mode = "rgmii";
phy-supply = <&reg_vcc3v3>;
status = "okay";
phy3: ethernet-phy@3 {
reg = <3>;
reset-gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */
reset-assert-us = <10000>;
/* wait 1s after reset, otherwise fail to read phy id */
reset-deassert-us = <1000000>;
};
};
&hdmi {
......@@ -161,6 +153,16 @@ &ir0 {
status = "okay";
};
&gmac_mdio {
phy3: ethernet-phy@3 {
reg = <3>;
reset-gpios = <&pio 0 17 GPIO_ACTIVE_LOW>; /* PA17 */
reset-assert-us = <10000>;
/* wait 1s after reset, otherwise fail to read phy id */
reset-deassert-us = <1000000>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
......
......@@ -109,10 +109,6 @@ &gmac {
phy-handle = <&phy1>;
phy-mode = "mii";
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&hdmi {
......@@ -149,6 +145,12 @@ eeprom: eeprom@50 {
};
};
&gmac_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
......
......@@ -114,10 +114,6 @@ &gmac {
phy-handle = <&phy1>;
phy-mode = "rgmii";
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&hdmi {
......@@ -154,6 +150,12 @@ &lradc {
vref-supply = <&reg_vcc3v0>;
};
&gmac_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
......
......@@ -121,10 +121,6 @@ &gmac {
phy-handle = <&phy1>;
phy-mode = "mii";
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&hdmi {
......@@ -215,6 +211,12 @@ button-1398 {
};
};
&gmac_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
......
......@@ -124,10 +124,6 @@ &gmac {
phy-mode = "rgmii";
phy-supply = <&reg_gmac_3v3>;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&hdmi {
......@@ -158,6 +154,12 @@ &ir0 {
status = "okay";
};
&gmac_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
......
......@@ -100,10 +100,6 @@ &gmac {
phy-mode = "rgmii";
phy-supply = <&reg_gmac_3v3>;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&i2c0 {
......@@ -124,6 +120,12 @@ &ir0 {
status = "okay";
};
&gmac_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
......
......@@ -117,10 +117,6 @@ &gmac {
phy-handle = <&phy1>;
phy-mode = "rgmii";
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&hdmi {
......@@ -149,6 +145,12 @@ &ir0 {
status = "okay";
};
&gmac_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
......
......@@ -125,10 +125,6 @@ &gmac {
phy-handle = <&phy1>;
phy-mode = "mii";
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&i2c0 {
......@@ -149,6 +145,12 @@ &ir0 {
status = "okay";
};
&gmac_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
......
......@@ -84,10 +84,6 @@ &gmac {
phy-handle = <&phy1>;
phy-mode = "rgmii";
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&i2c0 {
......@@ -110,6 +106,12 @@ &i2c2 {
#include "axp209.dtsi"
&gmac_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
......
......@@ -1437,8 +1437,12 @@ gmac: ethernet@1c50000 {
snps,fixed-burst;
snps,force_sf_dma_mode;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
gmac_mdio: mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
};
};
hstimer@1c60000 {
......
......@@ -132,10 +132,6 @@ &gmac {
phy-mode = "rgmii";
phy-supply = <&reg_cldo1>;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&i2c3 {
......@@ -144,6 +140,12 @@ &i2c3 {
status = "okay";
};
&mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
......
......@@ -127,7 +127,9 @@ &gmac {
phy-mode = "rgmii";
phy-supply = <&reg_cldo1>;
status = "okay";
};
&mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
......
......@@ -331,8 +331,12 @@ gmac: ethernet@830000 {
snps,fixed-burst;
snps,force_sf_dma_mode;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
mdio: mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
};
};
ehci0: usb@a00000 {
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment