Commit 97070bd4 authored by Lucas Stach's avatar Lucas Stach Committed by Stephen Warren

ARM: dts: tegra: add PCIe interrupt mapping properties

Those are defined by the common PCI binding.
Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent e30cb238
...@@ -42,6 +42,10 @@ Required properties: ...@@ -42,6 +42,10 @@ Required properties:
- 0xc2000000: prefetchable memory region - 0xc2000000: prefetchable memory region
Please refer to the standard PCI bus binding document for a more detailed Please refer to the standard PCI bus binding document for a more detailed
explanation. explanation.
- #interrupt-cells: Size representation for interrupts (must be 1)
- interrupt-map-mask and interrupt-map: Standard PCI IRQ mapping properties
Please refer to the standard PCI bus binding document for a more detailed
explanation.
- clocks: Must contain an entry for each entry in clock-names. - clocks: Must contain an entry for each entry in clock-names.
See ../clocks/clock-bindings.txt for details. See ../clocks/clock-bindings.txt for details.
- clock-names: Must include the following entries: - clock-names: Must include the following entries:
...@@ -86,6 +90,10 @@ SoC DTSI: ...@@ -86,6 +90,10 @@ SoC DTSI:
0 99 0x04>; /* MSI interrupt */ 0 99 0x04>; /* MSI interrupt */
interrupt-names = "intr", "msi"; interrupt-names = "intr", "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
......
...@@ -552,6 +552,10 @@ pcie-controller@80003000 { ...@@ -552,6 +552,10 @@ pcie-controller@80003000 {
GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */ GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupt-names = "intr", "msi"; interrupt-names = "intr", "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
......
...@@ -28,6 +28,10 @@ pcie-controller@00003000 { ...@@ -28,6 +28,10 @@ pcie-controller@00003000 {
GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */ GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
interrupt-names = "intr", "msi"; interrupt-names = "intr", "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
......
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