Commit 975b4b1d authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher

drm/amd/pm: fulfill swsmu peak profiling mode shader/memory clock settings

Enable peak profiling mode shader/memory clocks reporting for swsmu
framework.
Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e1dd28fc
...@@ -139,6 +139,8 @@ enum amd_pp_sensors { ...@@ -139,6 +139,8 @@ enum amd_pp_sensors {
AMDGPU_PP_SENSOR_MIN_FAN_RPM, AMDGPU_PP_SENSOR_MIN_FAN_RPM,
AMDGPU_PP_SENSOR_MAX_FAN_RPM, AMDGPU_PP_SENSOR_MAX_FAN_RPM,
AMDGPU_PP_SENSOR_VCN_POWER_STATE, AMDGPU_PP_SENSOR_VCN_POWER_STATE,
AMDGPU_PP_SENSOR_PEAK_PSTATE_SCLK,
AMDGPU_PP_SENSOR_PEAK_PSTATE_MCLK,
}; };
enum amd_pp_task { enum amd_pp_task {
......
...@@ -2473,6 +2473,14 @@ static int smu_read_sensor(void *handle, ...@@ -2473,6 +2473,14 @@ static int smu_read_sensor(void *handle,
*((uint32_t *)data) = pstate_table->uclk_pstate.standard * 100; *((uint32_t *)data) = pstate_table->uclk_pstate.standard * 100;
*size = 4; *size = 4;
break; break;
case AMDGPU_PP_SENSOR_PEAK_PSTATE_SCLK:
*((uint32_t *)data) = pstate_table->gfxclk_pstate.peak * 100;
*size = 4;
break;
case AMDGPU_PP_SENSOR_PEAK_PSTATE_MCLK:
*((uint32_t *)data) = pstate_table->uclk_pstate.peak * 100;
*size = 4;
break;
case AMDGPU_PP_SENSOR_ENABLED_SMC_FEATURES_MASK: case AMDGPU_PP_SENSOR_ENABLED_SMC_FEATURES_MASK:
ret = smu_feature_get_enabled_mask(smu, (uint64_t *)data); ret = smu_feature_get_enabled_mask(smu, (uint64_t *)data);
*size = 8; *size = 8;
......
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