Commit 97745f68 authored by Christian König's avatar Christian König Committed by Alex Deucher

drm/amdgpu: consistently use AMDGPU_CSA_VADDR

Instead of repeating this multiple times.
Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Acked-by: default avatarMonk Liu <monk.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a3e9a15a
...@@ -7132,12 +7132,12 @@ static void gfx_v8_0_ring_emit_ce_meta(struct amdgpu_ring *ring) ...@@ -7132,12 +7132,12 @@ static void gfx_v8_0_ring_emit_ce_meta(struct amdgpu_ring *ring)
} ce_payload = {}; } ce_payload = {};
if (ring->adev->virt.chained_ib_support) { if (ring->adev->virt.chained_ib_support) {
ce_payload_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096 + ce_payload_addr = AMDGPU_CSA_VADDR +
offsetof(struct vi_gfx_meta_data_chained_ib, ce_payload); offsetof(struct vi_gfx_meta_data_chained_ib, ce_payload);
cnt_ce = (sizeof(ce_payload.chained) >> 2) + 4 - 2; cnt_ce = (sizeof(ce_payload.chained) >> 2) + 4 - 2;
} else { } else {
ce_payload_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096 + ce_payload_addr = AMDGPU_CSA_VADDR +
offsetof(struct vi_gfx_meta_data, ce_payload); offsetof(struct vi_gfx_meta_data, ce_payload);
cnt_ce = (sizeof(ce_payload.regular) >> 2) + 4 - 2; cnt_ce = (sizeof(ce_payload.regular) >> 2) + 4 - 2;
} }
...@@ -7160,7 +7160,7 @@ static void gfx_v8_0_ring_emit_de_meta(struct amdgpu_ring *ring) ...@@ -7160,7 +7160,7 @@ static void gfx_v8_0_ring_emit_de_meta(struct amdgpu_ring *ring)
struct vi_de_ib_state_chained_ib chained; struct vi_de_ib_state_chained_ib chained;
} de_payload = {}; } de_payload = {};
csa_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096; csa_addr = AMDGPU_CSA_VADDR;
gds_addr = csa_addr + 4096; gds_addr = csa_addr + 4096;
if (ring->adev->virt.chained_ib_support) { if (ring->adev->virt.chained_ib_support) {
de_payload.chained.gds_backup_addrlo = lower_32_bits(gds_addr); de_payload.chained.gds_backup_addrlo = lower_32_bits(gds_addr);
......
...@@ -3865,7 +3865,7 @@ static void gfx_v9_0_ring_emit_ce_meta(struct amdgpu_ring *ring) ...@@ -3865,7 +3865,7 @@ static void gfx_v9_0_ring_emit_ce_meta(struct amdgpu_ring *ring)
int cnt; int cnt;
cnt = (sizeof(ce_payload) >> 2) + 4 - 2; cnt = (sizeof(ce_payload) >> 2) + 4 - 2;
csa_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096; csa_addr = AMDGPU_CSA_VADDR;
amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt)); amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));
amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(2) | amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(2) |
...@@ -3883,7 +3883,7 @@ static void gfx_v9_0_ring_emit_de_meta(struct amdgpu_ring *ring) ...@@ -3883,7 +3883,7 @@ static void gfx_v9_0_ring_emit_de_meta(struct amdgpu_ring *ring)
uint64_t csa_addr, gds_addr; uint64_t csa_addr, gds_addr;
int cnt; int cnt;
csa_addr = AMDGPU_VA_RESERVED_SIZE - 2 * 4096; csa_addr = AMDGPU_CSA_VADDR;
gds_addr = csa_addr + 4096; gds_addr = csa_addr + 4096;
de_payload.gds_backup_addrlo = lower_32_bits(gds_addr); de_payload.gds_backup_addrlo = lower_32_bits(gds_addr);
de_payload.gds_backup_addrhi = upper_32_bits(gds_addr); de_payload.gds_backup_addrhi = upper_32_bits(gds_addr);
......
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