Commit 9794156d authored by Geert Uytterhoeven's avatar Geert Uytterhoeven

pinctrl: renesas: r8a7779: Optimize fixed-width reserved fields

Describe registers with fixed-width register fields and many reserved
fields using the PINMUX_CFG_REG_VAR() macro, as the latter supports a
shorthand not requiring dummy values.

This reduces kernel size by 81 bytes.
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/ecc7377d2992694226dcf055bed0b617701a3d71.1649865241.git.geert+renesas@glider.be
parent ade1ef99
......@@ -3300,13 +3300,10 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
GP_5_1_FN, FN_A2,
GP_5_0_FN, FN_A1 ))
},
{ PINMUX_CFG_REG("GPSR6", 0xfffc001c, 32, 1, GROUP(
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0,
0, 0,
0, 0,
{ PINMUX_CFG_REG_VAR("GPSR6", 0xfffc001c, 32,
GROUP(-23, 1, 1, 1, 1, 1, 1, 1, 1, 1),
GROUP(
/* GP6_31_9 RESERVED */
GP_6_8_FN, FN_IP3_20,
GP_6_7_FN, FN_IP3_19,
GP_6_6_FN, FN_IP3_18,
......
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