Commit 97c28902 authored by Abel Vesa's avatar Abel Vesa Committed by Bjorn Andersson

arm64: dts: qcom: sm8150: Use 2 interconnect cells

Use two interconnect cells in order to optionally support a path tag.
Signed-off-by: default avatarAbel Vesa <abel.vesa@linaro.org>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230602062016.1883171-1-abel.vesa@linaro.org
parent 223ce29c
......@@ -55,8 +55,8 @@ CPU0: cpu@0 {
next-level-cache = <&L2_0>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
<&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
power-domains = <&CPU_PD0>;
power-domain-names = "psci";
#cooling-cells = <2>;
......@@ -82,8 +82,8 @@ CPU1: cpu@100 {
next-level-cache = <&L2_100>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
<&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
power-domains = <&CPU_PD1>;
power-domain-names = "psci";
#cooling-cells = <2>;
......@@ -105,8 +105,8 @@ CPU2: cpu@200 {
next-level-cache = <&L2_200>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
<&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
power-domains = <&CPU_PD2>;
power-domain-names = "psci";
#cooling-cells = <2>;
......@@ -128,8 +128,8 @@ CPU3: cpu@300 {
next-level-cache = <&L2_300>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
<&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
power-domains = <&CPU_PD3>;
power-domain-names = "psci";
#cooling-cells = <2>;
......@@ -151,8 +151,8 @@ CPU4: cpu@400 {
next-level-cache = <&L2_400>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
<&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
power-domains = <&CPU_PD4>;
power-domain-names = "psci";
#cooling-cells = <2>;
......@@ -174,8 +174,8 @@ CPU5: cpu@500 {
next-level-cache = <&L2_500>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
<&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
power-domains = <&CPU_PD5>;
power-domain-names = "psci";
#cooling-cells = <2>;
......@@ -197,8 +197,8 @@ CPU6: cpu@600 {
next-level-cache = <&L2_600>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
<&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
power-domains = <&CPU_PD6>;
power-domain-names = "psci";
#cooling-cells = <2>;
......@@ -220,8 +220,8 @@ CPU7: cpu@700 {
next-level-cache = <&L2_700>;
qcom,freq-domain = <&cpufreq_hw 2>;
operating-points-v2 = <&cpu7_opp_table>;
interconnects = <&gem_noc MASTER_AMPSS_M0 &mc_virt SLAVE_EBI_CH0>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
<&osm_l3 MASTER_OSM_L3_APPS 0 &osm_l3 SLAVE_OSM_L3 0>;
power-domains = <&CPU_PD7>;
power-domain-names = "psci";
#cooling-cells = <2>;
......@@ -1751,49 +1751,49 @@ spi15: spi@c94000 {
config_noc: interconnect@1500000 {
compatible = "qcom,sm8150-config-noc";
reg = <0 0x01500000 0 0x7400>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
system_noc: interconnect@1620000 {
compatible = "qcom,sm8150-system-noc";
reg = <0 0x01620000 0 0x19400>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
mc_virt: interconnect@163a000 {
compatible = "qcom,sm8150-mc-virt";
reg = <0 0x0163a000 0 0x1000>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre1_noc: interconnect@16e0000 {
compatible = "qcom,sm8150-aggre1-noc";
reg = <0 0x016e0000 0 0xd080>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre2_noc: interconnect@1700000 {
compatible = "qcom,sm8150-aggre2-noc";
reg = <0 0x01700000 0 0x20000>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
compute_noc: interconnect@1720000 {
compatible = "qcom,sm8150-compute-noc";
reg = <0 0x01720000 0 0x7000>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
mmss_noc: interconnect@1740000 {
compatible = "qcom,sm8150-mmss-noc";
reg = <0 0x01740000 0 0x1c100>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
......@@ -2111,7 +2111,7 @@ crypto: crypto@1dfa000 {
<&apps_smmu 0x506 0x0011>,
<&apps_smmu 0x508 0x0011>,
<&apps_smmu 0x512 0x0000>;
interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>;
interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 0 &mc_virt SLAVE_EBI_CH0 0>;
interconnect-names = "memory";
};
......@@ -3538,14 +3538,14 @@ opp-202000000 {
dc_noc: interconnect@9160000 {
compatible = "qcom,sm8150-dc-noc";
reg = <0 0x09160000 0 0x3200>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
gem_noc: interconnect@9680000 {
compatible = "qcom,sm8150-gem-noc";
reg = <0 0x09680000 0 0x3e200>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
......@@ -3650,7 +3650,7 @@ usb_2_dwc3: usb@a800000 {
camnoc_virt: interconnect@ac00000 {
compatible = "qcom,sm8150-camnoc-virt";
reg = <0 0x0ac00000 0 0x1000>;
#interconnect-cells = <1>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
......@@ -3659,8 +3659,8 @@ mdss: display-subsystem@ae00000 {
reg = <0 0x0ae00000 0 0x1000>;
reg-names = "mdss";
interconnects = <&mmss_noc MASTER_MDP_PORT0 &mc_virt SLAVE_EBI_CH0>,
<&mmss_noc MASTER_MDP_PORT1 &mc_virt SLAVE_EBI_CH0>;
interconnects = <&mmss_noc MASTER_MDP_PORT0 0 &mc_virt SLAVE_EBI_CH0 0>,
<&mmss_noc MASTER_MDP_PORT1 0 &mc_virt SLAVE_EBI_CH0 0>;
interconnect-names = "mdp0-mem", "mdp1-mem";
power-domains = <&dispcc MDSS_GDSC>;
......@@ -4325,7 +4325,7 @@ osm_l3: interconnect@18321000 {
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
clock-names = "xo", "alternate";
#interconnect-cells = <1>;
#interconnect-cells = <2>;
};
cpufreq_hw: cpufreq@18323000 {
......
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