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Commit 97cbc8fb authored by Paul Mundt's avatar Paul Mundt
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Merge branch 'common/fbdev-mipi' of master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6

parents 17d6ce11 14bbb7c6
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Showing with 43 additions and 51 deletions
arch/arm/mach-shmobile/board-ap4evb.c
View file @ 97cbc8fb
......@@ -514,6 +514,7 @@ static struct resource mipidsi0_resources[] = {
static struct sh_mipi_dsi_info mipidsi0_info = {
.data_format = MIPI_RGB888,
.lcd_chan = &lcdc_info.ch[0],
.vsynw_offset = 17,
};
static struct platform_device mipidsi0_device = {
......@@ -526,44 +527,6 @@ static struct platform_device mipidsi0_device = {
},
};
/* This function will disappear when we switch to (runtime) PM */
static int __init ap4evb_init_display_clk(void)
{
struct clk *lcdc_clk;
struct clk *dsitx_clk;
int ret;
lcdc_clk = clk_get(&lcdc_device.dev, "sh_mobile_lcdc_fb.0");
if (IS_ERR(lcdc_clk))
return PTR_ERR(lcdc_clk);
dsitx_clk = clk_get(&mipidsi0_device.dev, "sh-mipi-dsi.0");
if (IS_ERR(dsitx_clk)) {
ret = PTR_ERR(dsitx_clk);
goto eclkdsitxget;
}
ret = clk_enable(lcdc_clk);
if (ret < 0)
goto eclklcdcon;
ret = clk_enable(dsitx_clk);
if (ret < 0)
goto eclkdsitxon;
return 0;
eclkdsitxon:
clk_disable(lcdc_clk);
eclklcdcon:
clk_put(dsitx_clk);
eclkdsitxget:
clk_put(lcdc_clk);
return ret;
}
device_initcall(ap4evb_init_display_clk);
static struct platform_device *qhd_devices[] __initdata = {
&mipidsi0_device,
&keysc_device,
......
arch/arm/mach-shmobile/clock-sh7372.c
View file @ 97cbc8fb
......@@ -507,7 +507,7 @@ enum { MSTP001,
MSTP223,
MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
MSTP329, MSTP328, MSTP323, MSTP322, MSTP314, MSTP313, MSTP312,
MSTP415, MSTP413, MSTP411, MSTP410, MSTP406, MSTP403,
MSTP423, MSTP415, MSTP413, MSTP411, MSTP410, MSTP406, MSTP403,
MSTP_NR };
#define MSTP(_parent, _reg, _bit, _flags) \
......@@ -543,6 +543,7 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */
[MSTP313] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 13, 0), /* SDHI1 */
[MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMC */
[MSTP423] = MSTP(&div4_clks[DIV4_B], SMSTPCR4, 23, 0), /* DSITX1 */
[MSTP415] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 15, 0), /* SDHI2 */
[MSTP413] = MSTP(&pllc1_div2_clk, SMSTPCR4, 13, 0), /* HDMI */
[MSTP411] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 11, 0), /* IIC3 */
......@@ -596,9 +597,10 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]),
CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]),
CLKDEV_CON_ID("hdmi_clk", &div6_reparent_clks[DIV6_HDMI]),
CLKDEV_CON_ID("dsit_clk", &div6_clks[DIV6_DSIT]),
CLKDEV_CON_ID("dsi0p_clk", &div6_clks[DIV6_DSI0P]),
CLKDEV_CON_ID("dsi1p_clk", &div6_clks[DIV6_DSI1P]),
CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
CLKDEV_ICK_ID("dsi0p_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
CLKDEV_ICK_ID("dsi1p_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
/* MSTP32 clocks */
CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */
......@@ -610,7 +612,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2 */
CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX0 */
CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), /* LCDC1 */
CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */
CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[MSTP106]), /* JPU */
......@@ -633,6 +635,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMC */
CLKDEV_DEV_ID("sh-mipi-dsi.1", &mstp_clks[MSTP423]), /* DSITX1 */
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP415]), /* SDHI2 */
CLKDEV_DEV_ID("sh-mobile-hdmi", &mstp_clks[MSTP413]), /* HDMI */
CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* IIC3 */
......
drivers/video/sh_mipi_dsi.c
View file @ 97cbc8fb
......@@ -13,6 +13,7 @@
#include <linux/init.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/types.h>
......@@ -50,9 +51,11 @@ struct sh_mipi {
void __iomem *linkbase;
struct clk *dsit_clk;
struct clk *dsip_clk;
void *next_board_data;
void (*next_display_on)(void *board_data, struct fb_info *info);
void (*next_display_off)(void *board_data);
struct device *dev;
void *next_board_data;
void (*next_display_on)(void *board_data, struct fb_info *info);
void (*next_display_off)(void *board_data);
};
static struct sh_mipi *mipi_dsi[MAX_SH_MIPI_DSI];
......@@ -124,6 +127,7 @@ static void mipi_display_on(void *arg, struct fb_info *info)
{
struct sh_mipi *mipi = arg;
pm_runtime_get_sync(mipi->dev);
sh_mipi_dsi_enable(mipi, true);
if (mipi->next_display_on)
......@@ -138,6 +142,7 @@ static void mipi_display_off(void *arg)
mipi->next_display_off(mipi->next_board_data);
sh_mipi_dsi_enable(mipi, false);
pm_runtime_put(mipi->dev);
}
static int __init sh_mipi_setup(struct sh_mipi *mipi,
......@@ -145,8 +150,7 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
{
void __iomem *base = mipi->base;
struct sh_mobile_lcdc_chan_cfg *ch = pdata->lcd_chan;
u32 pctype, datatype, pixfmt;
u32 linelength;
u32 pctype, datatype, pixfmt, linelength, vmctr2 = 0x00e00000;
bool yuv;
/*
......@@ -303,17 +307,24 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
*/
iowrite32(0x00000006, mipi->linkbase + DTCTR);
/* VSYNC width = 2 (<< 17) */
iowrite32(0x00040000 | (pctype << 12) | datatype,
iowrite32((ch->lcd_cfg[0].vsync_len << pdata->vsynw_offset) |
(pdata->clksrc << 16) | (pctype << 12) | datatype,
mipi->linkbase + VMCTR1);
/*
* Non-burst mode with sync pulses: VSE and HSE are output,
* HSA period allowed, no commands in LP
*/
iowrite32(0x00e00000, mipi->linkbase + VMCTR2);
if (pdata->flags & SH_MIPI_DSI_HSABM)
vmctr2 |= 0x20;
if (pdata->flags & SH_MIPI_DSI_HSPBM)
vmctr2 |= 0x10;
iowrite32(vmctr2, mipi->linkbase + VMCTR2);
/*
* 0x660 = 1632 bytes per line (RGB24, 544 pixels: see
* sh_mobile_lcdc_info.ch[0].lcd_cfg[0].xres), HSALEN = 1 - default
* (unused, since VMCTR2[HSABM] = 0)
* (unused if VMCTR2[HSABM] = 0)
*/
iowrite32(1 | (linelength << 16), mipi->linkbase + VMLEN1);
......@@ -396,6 +407,8 @@ static int __init sh_mipi_probe(struct platform_device *pdev)
goto emap2;
}
mipi->dev = &pdev->dev;
mipi->dsit_clk = clk_get(&pdev->dev, "dsit_clk");
if (IS_ERR(mipi->dsit_clk)) {
ret = PTR_ERR(mipi->dsit_clk);
......@@ -445,6 +458,9 @@ static int __init sh_mipi_probe(struct platform_device *pdev)
mipi_dsi[idx] = mipi;
pm_runtime_enable(&pdev->dev);
pm_runtime_resume(&pdev->dev);
ret = sh_mipi_setup(mipi, pdata);
if (ret < 0)
goto emipisetup;
......@@ -461,11 +477,13 @@ static int __init sh_mipi_probe(struct platform_device *pdev)
pdata->lcd_chan->board_cfg.board_data = mipi;
pdata->lcd_chan->board_cfg.display_on = mipi_display_on;
pdata->lcd_chan->board_cfg.display_off = mipi_display_off;
pdata->lcd_chan->board_cfg.owner = THIS_MODULE;
return 0;
emipisetup:
mipi_dsi[idx] = NULL;
pm_runtime_disable(&pdev->dev);
clk_disable(mipi->dsip_clk);
eclkpon:
clk_disable(mipi->dsit_clk);
......@@ -517,10 +535,12 @@ static int __exit sh_mipi_remove(struct platform_device *pdev)
if (ret < 0)
return ret;
pdata->lcd_chan->board_cfg.owner = NULL;
pdata->lcd_chan->board_cfg.display_on = NULL;
pdata->lcd_chan->board_cfg.display_off = NULL;
pdata->lcd_chan->board_cfg.board_data = NULL;
pm_runtime_disable(&pdev->dev);
clk_disable(mipi->dsip_clk);
clk_disable(mipi->dsit_clk);
clk_put(mipi->dsit_clk);
......
include/video/sh_mipi_dsi.h
View file @ 97cbc8fb
......@@ -27,9 +27,15 @@ enum sh_mipi_dsi_data_fmt {
struct sh_mobile_lcdc_chan_cfg;
#define SH_MIPI_DSI_HSABM (1 << 0)
#define SH_MIPI_DSI_HSPBM (1 << 1)
struct sh_mipi_dsi_info {
enum sh_mipi_dsi_data_fmt data_format;
struct sh_mobile_lcdc_chan_cfg *lcd_chan;
unsigned long flags;
u32 clksrc;
unsigned int vsynw_offset;
};
#endif
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