Commit 98b0e789 authored by Yoshinori Sato's avatar Yoshinori Sato Committed by Linus Torvalds

[PATCH] h8300 include update

o driver support headers update
o fix warnings
parent 640bba88
......@@ -32,15 +32,6 @@
#include <asm/regs306x.h>
#include <asm/errno.h>
#define EXT_IRQ0 12
#define EXT_IRQ1 13
#define EXT_IRQ2 14
#define EXT_IRQ3 15
#define EXT_IRQ4 16
#define EXT_IRQ5 17
#define EXT_IRQ6 18
#define EXT_IRQ7 19
/*
* This structure has only 4 elements for speed reasons
*/
......@@ -174,7 +165,7 @@ void free_irq(unsigned int irq, void *dev_id)
irq, irq_list[irq]->devname);
if (irq >= EXT_IRQ0 && irq <= EXT_IRQ5)
*(volatile unsigned char *)IER &= ~(1 << (irq - EXT_IRQ0));
if ((irq_list[irq] & 0x80000000) == 0) {
if (((unsigned long)irq_list[irq] & 0x80000000) == 0) {
kfree(irq_list[irq]);
irq_list[irq] = NULL;
}
......@@ -244,8 +235,9 @@ void init_irq_proc(void)
{
}
static void __init enable_kmalloc(void)
static int __init enable_kmalloc(void)
{
use_kmalloc = 1;
return 0;
}
__initcall(enable_kmalloc);
core_initcall(enable_kmalloc);
......@@ -33,23 +33,6 @@
#include <asm/regs267x.h>
#include <asm/errno.h>
#define EXT_IRQ0 16
#define EXT_IRQ1 17
#define EXT_IRQ2 18
#define EXT_IRQ3 19
#define EXT_IRQ4 20
#define EXT_IRQ5 21
#define EXT_IRQ6 22
#define EXT_IRQ7 23
#define EXT_IRQ8 24
#define EXT_IRQ9 25
#define EXT_IRQ10 26
#define EXT_IRQ11 27
#define EXT_IRQ12 28
#define EXT_IRQ13 29
#define EXT_IRQ14 30
#define EXT_IRQ15 31
/*
* This structure has only 4 elements for speed reasons
*/
......@@ -310,4 +293,4 @@ static int __init enable_kmalloc(void)
use_kmalloc = 1;
return 0;
}
__initcall(enable_kmalloc);
core_initcall(enable_kmalloc);
/* AE-3068 (aka. aki3068net) RTL8019AS Config */
#ifndef __H8300_AKI3068NET_NE__
#define __H8300_AKI3068NET_NE__
#define NE2000_ADDR 0x200000
#define NE2000_IRQ 5
#define NE2000_IRQ_VECTOR (12 + NE2000_IRQ)
#define NE2000_BYTE volatile unsigned short
#define IER 0xfee015
#define ISR 0xfee016
#define IRQ_MASK (1 << NE2000_IRQ)
#define WCRL 0xfee023
#define MAR0A 0xffff20
#define ETCR0A 0xffff24
#define DTCR0A 0xffff27
#define MAR0B 0xffff28
#define DTCR0B 0xffff2f
#define H8300_INIT_NE() \
do { \
wordlength = 1; \
outb_p(0x48, ioaddr + EN0_DCFG); \
} while(0)
#endif
#ifndef __H8300_AKI3068NET_TIMER_RATE__
#define __H8300_AKI3068NET_TIMER_RATE__
#include <linux/config.h>
#define H8300_TIMER_COUNT_DATA CONFIG_CPU_CLOCK*10/8192
#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192
#endif
#include <linux/config.h>
#define H8300_TIMER_COUNT_DATA CONFIG_CPU_CLOCK*10/8192
#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192
/****************************************************************************/
/*
* h8300_smsc.h -- SMSC in H8/300H and H8S Evalution Board.
*
* (C) Copyright 2003, Yoshinori Sato <ysato@users.sourceforge.jp>
*/
/****************************************************************************/
#ifndef h8300smsc_h
#define h8300smsc_h
/****************************************************************************/
/* Such a description is OK ? */
#define H8300_SMSC_DEFINE
#include <asm/machine-depend.h>
#undef H8300_SMSC_DEFINE
/****************************************************************************/
#endif /* h8300smsc_h */
......@@ -101,67 +101,3 @@ static inline void h8max_insb(unsigned char a,unsigned char *p,unsigned long l)
}
#endif
/* H8MAX IDE I/F Config */
#ifdef H8300_IDE_DEFINE
#define H8300_IDE_BASE 0x200000
#define H8300_IDE_CTRL 0x60000c
#define H8300_IDE_IRQ 5
#define H8300_IDE_REG_OFFSET 2
#undef outb
#undef inb
#undef outb_p
#undef inb_p
#undef outsw
#undef insw
#define outb(d,a) h8max_outb(d,(unsigned short *)a)
#define inb(a) h8max_inb((unsigned char *)a)
#define outb_p(d,a) h8max_outb(d,(unsigned short *)a)
#define inb_p(a) h8max_inb((unsigned char *)a)
#define outsw(addr,buf,len) h8max_outsw(addr,buf,len);
#define insw(addr,buf,len) h8max_insw(addr,buf,len);
static inline void h8max_outb(unsigned short d,unsigned short *a)
{
*a = d;
}
static inline unsigned char h8max_inb(unsigned char *a)
{
return *(a+1);
}
static inline void h8max_outsw(void *addr, void *buf, int len)
{
unsigned volatile short *ap = (unsigned volatile short *)addr;
unsigned short *bp = (unsigned short *)buf;
unsigned short d;
while(len--) {
d = *bp++;
*ap = (d >> 8) | (d << 8);
}
}
static inline void h8max_insw(void *addr, void *buf, int len)
{
unsigned volatile short *ap = (unsigned volatile short *)addr;
unsigned short *bp = (unsigned short *)buf;
unsigned short d;
while(len--) {
d = *ap;
*bp++ = (d >> 8) | (d << 8);
}
}
static inline void target_ide_fix_driveid(struct hd_driveid *id)
{
int c;
unsigned short *p = (unsigned short *)id;
for (c = 0; c < SECTOR_WORDS; c++, p++)
*p = (*p >> 8) | (*p << 8);
}
#endif
/* H8MAX RTL8019AS Config */
#ifndef __H8300_H8MAX_NE__
#define __H8300_H8MAX_NE__
#define NE2000_ADDR 0x800600
#define NE2000_IRQ 4
#define NE2000_IRQ_VECTOR (12 + NE2000_IRQ)
#define NE2000_BYTE volatile unsigned short
#define IER 0xfee015
#define ISR 0xfee016
#define IRQ_MASK (1 << NE2000_IRQ)
/* sorry quick hack */
#if defined(outb)
# undef outb
#endif
#define outb(d,a) h8max_outb((d),(a) - NE2000_ADDR)
#if defined(inb)
# undef inb
#endif
#define inb(a) h8max_inb((a) - NE2000_ADDR)
#if defined(outb_p)
# undef outb_p
#endif
#define outb_p(d,a) h8max_outb((d),(a) - NE2000_ADDR)
#if defined(inb_p)
# undef inb_p
#endif
#define inb_p(a) h8max_inb((a) - NE2000_ADDR)
#if defined(outsw)
# undef outsw
#endif
#define outsw(a,p,l) h8max_outsw((a) - NE2000_ADDR,(unsigned short *)p,l)
#if defined(insw)
# undef insw
#endif
#define insw(a,p,l) h8max_insw((a) - NE2000_ADDR,(unsigned short *)p,l)
#if defined(outsb)
# undef outsb
#endif
#define outsb(a,p,l) h8max_outsb((a) - NE2000_ADDR,(unsigned char *)p,l)
#if defined(insb)
# undef insb
#endif
#define insb(a,p,l) h8max_insb((a) - NE2000_ADDR,(unsigned char *)p,l)
#define H8300_INIT_NE() \
do { \
wordlength = 2; \
h8max_outb(0x49, ioaddr + EN0_DCFG); \
SA_prom[14] = SA_prom[15] = 0x57;\
} while(0)
static inline void h8max_outb(unsigned char d,unsigned char a)
{
*(unsigned short *)(NE2000_ADDR + (a << 1)) = d;
}
static inline unsigned char h8max_inb(unsigned char a)
{
return *(unsigned char *)(NE2000_ADDR + (a << 1) +1);
}
static inline void h8max_outsw(unsigned char a,unsigned short *p,unsigned long l)
{
unsigned short d;
for (; l != 0; --l, p++) {
d = (((*p) >> 8) & 0xff) | ((*p) << 8);
*(unsigned short *)(NE2000_ADDR + (a << 1)) = d;
}
}
static inline void h8max_insw(unsigned char a,unsigned short *p,unsigned long l)
{
unsigned short d;
for (; l != 0; --l, p++) {
d = *(unsigned short *)(NE2000_ADDR + (a << 1));
*p = (d << 8)|((d >> 8) & 0xff);
}
}
static inline void h8max_outsb(unsigned char a,unsigned char *p,unsigned long l)
{
for (; l != 0; --l, p++) {
*(unsigned short *)(NE2000_ADDR + (a << 1)) = *p;
}
}
static inline void h8max_insb(unsigned char a,unsigned char *p,unsigned long l)
{
for (; l != 0; --l, p++) {
*p = *((unsigned char *)(NE2000_ADDR + (a << 1))+1);
}
}
#endif
#ifndef __H8300_H8MAX_TIMER_RATE__
#define __H8300_H8MAX_TIMER_RATE__
#include <linux/config.h>
#define H8300_TIMER_COUNT_DATA CONFIG_CPU_CLOCK*10/8192
#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192
#endif
......@@ -16,145 +16,26 @@
#ifdef __KERNEL__
/****************************************************************************/
#include <linux/config.h>
#include <linux/interrupt.h>
void h8300_ide_print_resource(char *name, hw_regs_t *hw);
static inline int ide_default_irq(unsigned long base) { return 0; };
static inline ide_ioreg_t ide_default_io_base(int index) { return 0; };
#include <asm/setup.h>
#include <asm/io.h>
#include <asm/irq.h>
/*
* Some coldfire specifics.
*/
/*
* Save some space, only have 1 interface.
*/
#define MAX_HWIFS 1
/*
* Fix up things that may not have been provided.
*/
#undef SUPPORT_SLOW_DATA_PORTS
#define SUPPORT_SLOW_DATA_PORTS 0
#undef SUPPORT_VLB_SYNC
#define SUPPORT_VLB_SYNC 0
/* this definition is used only on startup .. */
#undef HD_DATA
#define HD_DATA NULL
#define DBGIDE(fmt,a...)
// #define DBGIDE(fmt,a...) printk(fmt, ##a)
#define IDE_INLINE __inline__
// #define IDE_INLINE
#define ide__sti() __sti()
/****************************************************************************/
typedef union {
unsigned all : 8; /* all of the bits together */
struct {
unsigned bit7 : 1; /* always 1 */
unsigned lba : 1; /* using LBA instead of CHS */
unsigned bit5 : 1; /* always 1 */
unsigned unit : 1; /* drive select number, 0 or 1 */
unsigned head : 4; /* always zeros here */
} b;
} select_t;
/*
* Our list of ports/irq's for different boards.
*/
/* machine depend header include */
#define H8300_IDE_DEFINE
#include <asm/machine-depend.h>
#undef H8300_IDE_DEFINE
/****************************************************************************/
static IDE_INLINE int ide_default_irq(ide_ioreg_t base)
static __inline__ void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
unsigned long ctrl_port, int *irq)
{
return H8300_IDE_IRQ+12;
}
static IDE_INLINE ide_ioreg_t ide_default_io_base(int index)
{
return (ide_ioreg_t)H8300_IDE_BASE;
}
/*
* Set up a hw structure for a specified data port, control port and IRQ.
* This should follow whatever the default interface uses.
*/
static IDE_INLINE void ide_init_hwif_ports(
hw_regs_t *hw,
ide_ioreg_t data_port,
ide_ioreg_t ctrl_port,
int *irq)
static inline void ide_init_default_hwifs(void)
{
ide_ioreg_t reg = data_port;
int i;
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
hw->io_ports[i] = reg;
reg += H8300_IDE_REG_OFFSET;
}
if (ctrl_port) {
hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
} else {
hw->io_ports[IDE_CONTROL_OFFSET] = (ide_ioreg_t)H8300_IDE_CTRL;
}
}
#define MAX_HWIFS 1
/*
* This registers the standard ports for this architecture with the IDE
* driver.
*/
static IDE_INLINE void ide_init_default_hwifs(void)
{
hw_regs_t hw;
ide_ioreg_t base;
int index;
for (index = 0; index < MAX_HWIFS; index++) {
base = ide_default_io_base(index);
if (!base)
continue;
memset(&hw, 0, sizeof(hw));
ide_init_hwif_ports(&hw, base, 0, NULL);
hw.irq = ide_default_irq(base);
ide_register_hw(&hw, NULL);
}
}
#define ide_request_irq(irq,hand,flg,dev,id) request_irq((irq),(hand),(flg),(dev),(id))
#define ide_free_irq(irq,dev_id) free_irq((irq), (dev_id))
#define ide_check_region(from,extent) (0)
#define ide_request_region(from,extent,name) do {} while(0)
#define ide_release_region(from,extent) do {} while(0)
/*
* The following are not needed for the non-m68k ports
*/
#define ide_ack_intr(hwif) (1)
#define ide_fix_driveid(id) target_ide_fix_driveid(id)
#define ide_release_lock(lock) do {} while (0)
#define ide_get_lock(lock, hdlr, data) do {} while (0)
static IDE_INLINE void ide_print_resource(char *name,hw_regs_t *hw)
{
printk("%s at 0x%08x-0x%08x,0x%08x on irq %d", name,
(unsigned int)hw->io_ports[IDE_DATA_OFFSET],
(unsigned int)hw->io_ports[IDE_DATA_OFFSET]+(8*H8300_IDE_REG_OFFSET)-1,
(unsigned int)hw->io_ports[IDE_CONTROL_OFFSET],
hw->irq);
}
#define __ide_mm_insw(port,addr,count) do { } while(0)
#define __ide_mm_insl(port,addr,count) do { } while(0)
#define __ide_mm_outsw(port,addr,count) do { } while(0)
#define __ide_mm_outsl(port,addr,count) do { } while(0)
/****************************************************************************/
#endif /* __KERNEL__ */
......
......@@ -3,11 +3,35 @@
#include <asm/ptrace.h>
#if defined(CONFIG_CPU_H8300H)
#if defined(__H8300H__)
#define NR_IRQS 64
#define EXT_IRQ0 12
#define EXT_IRQ1 13
#define EXT_IRQ2 14
#define EXT_IRQ3 15
#define EXT_IRQ4 16
#define EXT_IRQ5 17
#define EXT_IRQ6 18
#define EXT_IRQ7 19
#endif
#if defined(CONFIG_CPU_H8S)
#define NR_IRQS 128
#define EXT_IRQ0 16
#define EXT_IRQ1 17
#define EXT_IRQ2 18
#define EXT_IRQ3 19
#define EXT_IRQ4 20
#define EXT_IRQ5 21
#define EXT_IRQ6 22
#define EXT_IRQ7 23
#define EXT_IRQ8 24
#define EXT_IRQ9 25
#define EXT_IRQ10 26
#define EXT_IRQ11 27
#define EXT_IRQ12 28
#define EXT_IRQ13 29
#define EXT_IRQ14 30
#define EXT_IRQ15 31
#endif
static __inline__ int irq_canonicalize(int irq)
......
/* EDOSK2674 board depend header */
/* TIMER rate define */
#ifdef H8300_TIMER_DEFINE
#define H8300_TIMER_COUNT_DATA 33000*10/8192
#define H8300_TIMER_FREQ 33000*1000/8192
#endif
/* EDOSK-2674R SMSC Network Controler Target Depend impliments */
#ifdef H8300_SMSC_DEFINE
#define SMSC_BASE 0xf80000
#define SMSC_IRQ 16
/* sorry quick hack */
#if defined(outw)
# undef outw
#endif
#define outw(d,a) edosk2674_smsc_outw(d,(volatile unsigned short *)(a))
#if defined(inw)
# undef inw
#endif
#define inw(a) edosk2674_smsc_inw((volatile unsigned short *)(a))
#if defined(outsw)
# undef outsw
#endif
#define outsw(a,p,l) edosk2674_smsc_outsw((volatile unsigned short *)(a),p,l)
#if defined(insw)
# undef insw
#endif
#define insw(a,p,l) edosk2674_smsc_insw((volatile unsigned short *)(a),p,l)
static inline void edosk2674_smsc_outw(
unsigned short d,
volatile unsigned short *a
)
{
*a = (d >> 8) | (d << 8);
}
static inline unsigned short edosk2674_smsc_inw(
volatile unsigned short *a
)
{
unsigned short d;
d = *a;
return (d >> 8) | (d << 8);
}
static inline void edosk2674_smsc_outsw(
volatile unsigned short *a,
unsigned short *p,
unsigned long l
)
{
for (; l != 0; --l, p++)
*a = *p;
}
static inline void edosk2674_smsc_insw(
volatile unsigned short *a,
unsigned short *p,
unsigned long l
)
{
for (; l != 0; --l, p++)
*p = *a;
}
#endif
......@@ -19,4 +19,6 @@ extern inline void pcibios_penalize_isa_irq(int irq)
/* We don't do dynamic PCI IRQ allocation */
}
#define PCI_DMA_BUS_IS_PHYS (1)
#endif /* _ASM_H8300_PCI_H */
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