Commit 98cae695 authored by Jack Xiao's avatar Jack Xiao Committed by Alex Deucher

drm/amdgpu/mes12: sw/hw fini for unified mes

Free memory for two pipes and unmap pipe0 via pipe1.
Signed-off-by: default avatarJack Xiao <Jack.Xiao@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ea5d6db1
...@@ -1344,18 +1344,21 @@ static int mes_v12_0_sw_fini(void *handle) ...@@ -1344,18 +1344,21 @@ static int mes_v12_0_sw_fini(void *handle)
&adev->mes.eop_gpu_addr[pipe], &adev->mes.eop_gpu_addr[pipe],
NULL); NULL);
amdgpu_ucode_release(&adev->mes.fw[pipe]); amdgpu_ucode_release(&adev->mes.fw[pipe]);
}
amdgpu_bo_free_kernel(&adev->gfx.kiq[0].ring.mqd_obj,
&adev->gfx.kiq[0].ring.mqd_gpu_addr,
&adev->gfx.kiq[0].ring.mqd_ptr);
amdgpu_bo_free_kernel(&adev->mes.ring[0].mqd_obj, if (adev->enable_uni_mes || pipe == AMDGPU_MES_SCHED_PIPE) {
&adev->mes.ring[0].mqd_gpu_addr, amdgpu_bo_free_kernel(&adev->mes.ring[pipe].mqd_obj,
&adev->mes.ring[0].mqd_ptr); &adev->mes.ring[pipe].mqd_gpu_addr,
&adev->mes.ring[pipe].mqd_ptr);
amdgpu_ring_fini(&adev->mes.ring[pipe]);
}
}
amdgpu_ring_fini(&adev->gfx.kiq[0].ring); if (!adev->enable_uni_mes) {
amdgpu_ring_fini(&adev->mes.ring[0]); amdgpu_bo_free_kernel(&adev->gfx.kiq[0].ring.mqd_obj,
&adev->gfx.kiq[0].ring.mqd_gpu_addr,
&adev->gfx.kiq[0].ring.mqd_ptr);
amdgpu_ring_fini(&adev->gfx.kiq[0].ring);
}
if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) { if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) {
mes_v12_0_free_ucode_buffers(adev, AMDGPU_MES_KIQ_PIPE); mes_v12_0_free_ucode_buffers(adev, AMDGPU_MES_KIQ_PIPE);
...@@ -1472,7 +1475,13 @@ static int mes_v12_0_kiq_hw_init(struct amdgpu_device *adev) ...@@ -1472,7 +1475,13 @@ static int mes_v12_0_kiq_hw_init(struct amdgpu_device *adev)
static int mes_v12_0_kiq_hw_fini(struct amdgpu_device *adev) static int mes_v12_0_kiq_hw_fini(struct amdgpu_device *adev)
{ {
if (adev->mes.ring[0].sched.ready) { if (adev->mes.ring[0].sched.ready) {
mes_v12_0_kiq_dequeue_sched(adev); if (adev->enable_uni_mes)
amdgpu_mes_unmap_legacy_queue(adev,
&adev->mes.ring[AMDGPU_MES_SCHED_PIPE],
RESET_QUEUES, 0, 0);
else
mes_v12_0_kiq_dequeue_sched(adev);
adev->mes.ring[0].sched.ready = false; adev->mes.ring[0].sched.ready = false;
} }
......
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