Commit 98e0f634 authored by Janusz Krzysztofik's avatar Janusz Krzysztofik Committed by Arnd Bergmann

ARM: OMAP1: Prepare for conversion of OMAP1 clocks to CCF

In preparation for conversion of OMAP1 clocks to common clock framework,
identify arch/arm/mach-omap1 local users of those clocks and update them
to call clk_prepare_enable/clk_disable_unprepare() instead of just
clk_enable/disable(), as required by CCF implementation of clock API.
Signed-off-by: default avatarJanusz Krzysztofik <jmkrzyszt@gmail.com>
Acked-by: default avatarTony Lindgren <tony@atomide.com>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 615dce5b
......@@ -43,8 +43,8 @@ static void omap1_mcbsp_request(unsigned int id)
api_clk = clk_get(NULL, "api_ck");
dsp_clk = clk_get(NULL, "dsp_ck");
if (!IS_ERR(api_clk) && !IS_ERR(dsp_clk)) {
clk_enable(api_clk);
clk_enable(dsp_clk);
clk_prepare_enable(api_clk);
clk_prepare_enable(dsp_clk);
/*
* DSP external peripheral reset
......@@ -62,11 +62,11 @@ static void omap1_mcbsp_free(unsigned int id)
if (id == 0 || id == 2) {
if (--dsp_use == 0) {
if (!IS_ERR(api_clk)) {
clk_disable(api_clk);
clk_disable_unprepare(api_clk);
clk_put(api_clk);
}
if (!IS_ERR(dsp_clk)) {
clk_disable(dsp_clk);
clk_disable_unprepare(dsp_clk);
clk_put(dsp_clk);
}
}
......
......@@ -73,7 +73,7 @@ static int __init omap_ocpi_init(void)
if (IS_ERR(ocpi_ck))
return PTR_ERR(ocpi_ck);
clk_enable(ocpi_ck);
clk_prepare_enable(ocpi_ck);
ocpi_enable();
pr_info("OMAP OCPI interconnect driver loaded\n");
......@@ -87,7 +87,7 @@ static void __exit omap_ocpi_exit(void)
if (!cpu_is_omap16xx())
return;
clk_disable(ocpi_ck);
clk_disable_unprepare(ocpi_ck);
clk_put(ocpi_ck);
}
......
......@@ -142,7 +142,7 @@ void __init omap_serial_init(void)
if (IS_ERR(uart1_ck))
printk("Could not get uart1_ck\n");
else {
clk_enable(uart1_ck);
clk_prepare_enable(uart1_ck);
if (cpu_is_omap15xx())
clk_set_rate(uart1_ck, 12000000);
}
......@@ -152,7 +152,7 @@ void __init omap_serial_init(void)
if (IS_ERR(uart2_ck))
printk("Could not get uart2_ck\n");
else {
clk_enable(uart2_ck);
clk_prepare_enable(uart2_ck);
if (cpu_is_omap15xx())
clk_set_rate(uart2_ck, 12000000);
else
......@@ -164,7 +164,7 @@ void __init omap_serial_init(void)
if (IS_ERR(uart3_ck))
printk("Could not get uart3_ck\n");
else {
clk_enable(uart3_ck);
clk_prepare_enable(uart3_ck);
if (cpu_is_omap15xx())
clk_set_rate(uart3_ck, 12000000);
}
......
......@@ -270,7 +270,7 @@ int __init omap_32k_timer_init(void)
sync32k_ick = clk_get(NULL, "omap_32ksync_ick");
if (!IS_ERR(sync32k_ick))
clk_enable(sync32k_ick);
clk_prepare_enable(sync32k_ick);
ret = omap_init_clocksource_32k(base);
}
......
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