Commit 98fda42a authored by Mark Brown's avatar Mark Brown

ASoC: cs42l42: Add SoundWire support

Merge series from Stefan Binding <sbinding@opensource.cirrus.com>:

The CS42L42 has a SoundWire interface for control and audio. This
chain of patches adds support for this.

Patches #1 .. #5 split out various changes to the existing code that
are needed for adding Soundwire. These are mostly around clocking and
supporting the separate probe and enumeration stages in SoundWire.

Patches #6 .. #8 actually adds the SoundWire handling.
parents 6570befb 16838bfb
......@@ -469,7 +469,7 @@ static int sdw_prep_deprep_slave_ports(struct sdw_bus *bus,
}
/* Inform slave about the impending port prepare */
sdw_do_port_prep(s_rt, prep_ch, SDW_OPS_PORT_PRE_PREP);
sdw_do_port_prep(s_rt, prep_ch, prep ? SDW_OPS_PORT_PRE_PREP : SDW_OPS_PORT_PRE_DEPREP);
/* Prepare Slave port implementing CP_SM */
if (!dpn_prop->simple_ch_prep_sm) {
......@@ -501,7 +501,7 @@ static int sdw_prep_deprep_slave_ports(struct sdw_bus *bus,
}
/* Inform slaves about ports prepared */
sdw_do_port_prep(s_rt, prep_ch, SDW_OPS_PORT_POST_PREP);
sdw_do_port_prep(s_rt, prep_ch, prep ? SDW_OPS_PORT_POST_PREP : SDW_OPS_PORT_POST_DEPREP);
/* Disable interrupt after Port de-prepare */
if (!prep && intr)
......
......@@ -566,13 +566,15 @@ struct sdw_prepare_ch {
* enum sdw_port_prep_ops: Prepare operations for Data Port
*
* @SDW_OPS_PORT_PRE_PREP: Pre prepare operation for the Port
* @SDW_OPS_PORT_PREP: Prepare operation for the Port
* @SDW_OPS_PORT_PRE_DEPREP: Pre deprepare operation for the Port
* @SDW_OPS_PORT_POST_PREP: Post prepare operation for the Port
* @SDW_OPS_PORT_POST_DEPREP: Post deprepare operation for the Port
*/
enum sdw_port_prep_ops {
SDW_OPS_PORT_PRE_PREP = 0,
SDW_OPS_PORT_PREP = 1,
SDW_OPS_PORT_POST_PREP = 2,
SDW_OPS_PORT_PRE_DEPREP,
SDW_OPS_PORT_POST_PREP,
SDW_OPS_PORT_POST_DEPREP,
};
/**
......
......@@ -34,6 +34,7 @@
#define CS42L42_PAGE_24 0x2400
#define CS42L42_PAGE_25 0x2500
#define CS42L42_PAGE_26 0x2600
#define CS42L42_PAGE_27 0x2700
#define CS42L42_PAGE_28 0x2800
#define CS42L42_PAGE_29 0x2900
#define CS42L42_PAGE_2A 0x2A00
......@@ -720,6 +721,10 @@
#define CS42L42_SRC_SDOUT_FS (CS42L42_PAGE_26 + 0x09)
/* Page 0x27 DMA */
#define CS42L42_SOFT_RESET_REBOOT (CS42L42_PAGE_27 + 0x01)
#define CS42L42_SFT_RST_REBOOT_MASK BIT(1)
/* Page 0x28 S/PDIF Registers */
#define CS42L42_SPDIF_CTL1 (CS42L42_PAGE_28 + 0x01)
#define CS42L42_SPDIF_CTL2 (CS42L42_PAGE_28 + 0x02)
......
......@@ -69,6 +69,7 @@ config SND_SOC_ALL_CODECS
imply SND_SOC_CS35L45_I2C
imply SND_SOC_CS35L45_SPI
imply SND_SOC_CS42L42
imply SND_SOC_CS42L42_SDW
imply SND_SOC_CS42L51_I2C
imply SND_SOC_CS42L52
imply SND_SOC_CS42L56
......@@ -722,6 +723,13 @@ config SND_SOC_CS42L42
select REGMAP_I2C
select SND_SOC_CS42L42_CORE
config SND_SOC_CS42L42_SDW
tristate "Cirrus Logic CS42L42 CODEC on Soundwire"
depends on SOUNDWIRE
select SND_SOC_CS42L42_CORE
help
Enable support for Cirrus Logic CS42L42 codec with Soundwire control
config SND_SOC_CS42L51
tristate
......
......@@ -69,6 +69,7 @@ snd-soc-cs35l45-spi-objs := cs35l45-spi.o
snd-soc-cs35l45-i2c-objs := cs35l45-i2c.o
snd-soc-cs42l42-objs := cs42l42.o
snd-soc-cs42l42-i2c-objs := cs42l42-i2c.o
snd-soc-cs42l42-sdw-objs := cs42l42-sdw.o
snd-soc-cs42l51-objs := cs42l51.o
snd-soc-cs42l51-i2c-objs := cs42l51-i2c.o
snd-soc-cs42l52-objs := cs42l52.o
......@@ -434,6 +435,7 @@ obj-$(CONFIG_SND_SOC_CS35L45_SPI) += snd-soc-cs35l45-spi.o
obj-$(CONFIG_SND_SOC_CS35L45_I2C) += snd-soc-cs35l45-i2c.o
obj-$(CONFIG_SND_SOC_CS42L42_CORE) += snd-soc-cs42l42.o
obj-$(CONFIG_SND_SOC_CS42L42) += snd-soc-cs42l42-i2c.o
obj-$(CONFIG_SND_SOC_CS42L42_SDW) += snd-soc-cs42l42-sdw.o
obj-$(CONFIG_SND_SOC_CS42L51) += snd-soc-cs42l51.o
obj-$(CONFIG_SND_SOC_CS42L51_I2C) += snd-soc-cs42l51-i2c.o
obj-$(CONFIG_SND_SOC_CS42L52) += snd-soc-cs42l52.o
......
This diff is collapsed.
......@@ -20,6 +20,7 @@
#include <linux/slab.h>
#include <linux/acpi.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/property.h>
#include <linux/regulator/consumer.h>
#include <linux/gpio/consumer.h>
......@@ -293,6 +294,7 @@ bool cs42l42_readable_register(struct device *dev, unsigned int reg)
case CS42L42_SPDIF_SW_CTL1:
case CS42L42_SRC_SDIN_FS:
case CS42L42_SRC_SDOUT_FS:
case CS42L42_SOFT_RESET_REBOOT:
case CS42L42_SPDIF_CTL1:
case CS42L42_SPDIF_CTL2:
case CS42L42_SPDIF_CTL3:
......@@ -358,6 +360,7 @@ bool cs42l42_volatile_register(struct device *dev, unsigned int reg)
case CS42L42_LOAD_DET_DONE:
case CS42L42_DET_STATUS1:
case CS42L42_DET_STATUS2:
case CS42L42_SOFT_RESET_REBOOT:
return true;
default:
return false;
......@@ -523,6 +526,10 @@ static const struct snd_soc_dapm_widget cs42l42_dapm_widgets[] = {
/* Playback/Capture Requirements */
SND_SOC_DAPM_SUPPLY("SCLK", CS42L42_ASP_CLK_CFG, CS42L42_ASP_SCLK_EN_SHIFT, 0, NULL, 0),
/* Soundwire SRC power control */
SND_SOC_DAPM_PGA("DACSRC", CS42L42_PWR_CTL2, CS42L42_DAC_SRC_PDNB_SHIFT, 0, NULL, 0),
SND_SOC_DAPM_PGA("ADCSRC", CS42L42_PWR_CTL2, CS42L42_ADC_SRC_PDNB_SHIFT, 0, NULL, 0),
};
static const struct snd_soc_dapm_route cs42l42_audio_map[] = {
......@@ -590,7 +597,6 @@ const struct snd_soc_component_driver cs42l42_soc_component = {
.num_dapm_routes = ARRAY_SIZE(cs42l42_audio_map),
.controls = cs42l42_snd_controls,
.num_controls = ARRAY_SIZE(cs42l42_snd_controls),
.idle_bias_on = 1,
.endianness = 1,
};
EXPORT_SYMBOL_NS_GPL(cs42l42_soc_component, SND_SOC_CS42L42_CORE);
......@@ -651,11 +657,11 @@ static const struct cs42l42_pll_params pll_ratio_table[] = {
{ 24576000, 1, 0x03, 0x40, 0x000000, 0x03, 0x10, 12288000, 128, 1}
};
static int cs42l42_pll_config(struct snd_soc_component *component, unsigned int clk)
int cs42l42_pll_config(struct snd_soc_component *component, unsigned int clk,
unsigned int sample_rate)
{
struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
int i;
u32 fsync;
/* Don't reconfigure if there is an audio stream running */
if (cs42l42->stream_use) {
......@@ -666,6 +672,10 @@ static int cs42l42_pll_config(struct snd_soc_component *component, unsigned int
}
for (i = 0; i < ARRAY_SIZE(pll_ratio_table); i++) {
/* MCLKint must be a multiple of the sample rate */
if (pll_ratio_table[i].mclk_int % sample_rate)
continue;
if (pll_ratio_table[i].sclk == clk) {
cs42l42->pll_config = i;
......@@ -677,40 +687,6 @@ static int cs42l42_pll_config(struct snd_soc_component *component, unsigned int
(pll_ratio_table[i].mclk_int !=
24000000)) <<
CS42L42_INTERNAL_FS_SHIFT);
/* Set up the LRCLK */
fsync = clk / cs42l42->srate;
if (((fsync * cs42l42->srate) != clk)
|| ((fsync % 2) != 0)) {
dev_err(component->dev,
"Unsupported sclk %d/sample rate %d\n",
clk,
cs42l42->srate);
return -EINVAL;
}
/* Set the LRCLK period */
snd_soc_component_update_bits(component,
CS42L42_FSYNC_P_LOWER,
CS42L42_FSYNC_PERIOD_MASK,
CS42L42_FRAC0_VAL(fsync - 1) <<
CS42L42_FSYNC_PERIOD_SHIFT);
snd_soc_component_update_bits(component,
CS42L42_FSYNC_P_UPPER,
CS42L42_FSYNC_PERIOD_MASK,
CS42L42_FRAC1_VAL(fsync - 1) <<
CS42L42_FSYNC_PERIOD_SHIFT);
/* Set the LRCLK to 50% duty cycle */
fsync = fsync / 2;
snd_soc_component_update_bits(component,
CS42L42_FSYNC_PW_LOWER,
CS42L42_FSYNC_PULSE_WIDTH_MASK,
CS42L42_FRAC0_VAL(fsync - 1) <<
CS42L42_FSYNC_PULSE_WIDTH_SHIFT);
snd_soc_component_update_bits(component,
CS42L42_FSYNC_PW_UPPER,
CS42L42_FSYNC_PULSE_WIDTH_MASK,
CS42L42_FRAC1_VAL(fsync - 1) <<
CS42L42_FSYNC_PULSE_WIDTH_SHIFT);
if (pll_ratio_table[i].mclk_src_sel == 0) {
/* Pass the clock straight through */
snd_soc_component_update_bits(component,
......@@ -768,8 +744,9 @@ static int cs42l42_pll_config(struct snd_soc_component *component, unsigned int
return -EINVAL;
}
EXPORT_SYMBOL_NS_GPL(cs42l42_pll_config, SND_SOC_CS42L42_CORE);
static void cs42l42_src_config(struct snd_soc_component *component, unsigned int sample_rate)
void cs42l42_src_config(struct snd_soc_component *component, unsigned int sample_rate)
{
struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
unsigned int fs;
......@@ -801,6 +778,47 @@ static void cs42l42_src_config(struct snd_soc_component *component, unsigned int
CS42L42_CLK_OASRC_SEL_MASK,
fs << CS42L42_CLK_OASRC_SEL_SHIFT);
}
EXPORT_SYMBOL_NS_GPL(cs42l42_src_config, SND_SOC_CS42L42_CORE);
static int cs42l42_asp_config(struct snd_soc_component *component,
unsigned int sclk, unsigned int sample_rate)
{
u32 fsync = sclk / sample_rate;
/* Set up the LRCLK */
if (((fsync * sample_rate) != sclk) || ((fsync % 2) != 0)) {
dev_err(component->dev,
"Unsupported sclk %d/sample rate %d\n",
sclk,
sample_rate);
return -EINVAL;
}
/* Set the LRCLK period */
snd_soc_component_update_bits(component,
CS42L42_FSYNC_P_LOWER,
CS42L42_FSYNC_PERIOD_MASK,
CS42L42_FRAC0_VAL(fsync - 1) <<
CS42L42_FSYNC_PERIOD_SHIFT);
snd_soc_component_update_bits(component,
CS42L42_FSYNC_P_UPPER,
CS42L42_FSYNC_PERIOD_MASK,
CS42L42_FRAC1_VAL(fsync - 1) <<
CS42L42_FSYNC_PERIOD_SHIFT);
/* Set the LRCLK to 50% duty cycle */
fsync = fsync / 2;
snd_soc_component_update_bits(component,
CS42L42_FSYNC_PW_LOWER,
CS42L42_FSYNC_PULSE_WIDTH_MASK,
CS42L42_FRAC0_VAL(fsync - 1) <<
CS42L42_FSYNC_PULSE_WIDTH_SHIFT);
snd_soc_component_update_bits(component,
CS42L42_FSYNC_PW_UPPER,
CS42L42_FSYNC_PULSE_WIDTH_MASK,
CS42L42_FRAC1_VAL(fsync - 1) <<
CS42L42_FSYNC_PULSE_WIDTH_SHIFT);
return 0;
}
static int cs42l42_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
{
......@@ -891,13 +909,12 @@ static int cs42l42_pcm_hw_params(struct snd_pcm_substream *substream,
struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
unsigned int channels = params_channels(params);
unsigned int width = (params_width(params) / 8) - 1;
unsigned int sample_rate = params_rate(params);
unsigned int slot_width = 0;
unsigned int val = 0;
unsigned int bclk;
int ret;
cs42l42->srate = params_rate(params);
if (cs42l42->bclk_ratio) {
/* machine driver has set the BCLK/samp-rate ratio */
bclk = cs42l42->bclk_ratio * params_rate(params);
......@@ -954,11 +971,15 @@ static int cs42l42_pcm_hw_params(struct snd_pcm_substream *substream,
break;
}
ret = cs42l42_pll_config(component, bclk);
ret = cs42l42_pll_config(component, bclk, sample_rate);
if (ret)
return ret;
cs42l42_src_config(component, params_rate(params));
ret = cs42l42_asp_config(component, bclk, sample_rate);
if (ret)
return ret;
cs42l42_src_config(component, sample_rate);
return 0;
}
......@@ -998,7 +1019,7 @@ static int cs42l42_set_bclk_ratio(struct snd_soc_dai *dai,
return 0;
}
static int cs42l42_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
int cs42l42_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
{
struct snd_soc_component *component = dai->component;
struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
......@@ -1091,6 +1112,7 @@ static int cs42l42_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
return 0;
}
EXPORT_SYMBOL_NS_GPL(cs42l42_mute_stream, SND_SOC_CS42L42_CORE);
#define CS42L42_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
SNDRV_PCM_FMTBIT_S24_LE |\
......@@ -1633,7 +1655,7 @@ static const struct cs42l42_irq_params irq_params_table[] = {
CS42L42_TSRS_PLUG_VAL_MASK}
};
static irqreturn_t cs42l42_irq_thread(int irq, void *data)
irqreturn_t cs42l42_irq_thread(int irq, void *data)
{
struct cs42l42_private *cs42l42 = (struct cs42l42_private *)data;
unsigned int stickies[12];
......@@ -1642,9 +1664,11 @@ static irqreturn_t cs42l42_irq_thread(int irq, void *data)
unsigned int current_button_status;
unsigned int i;
pm_runtime_get_sync(cs42l42->dev);
mutex_lock(&cs42l42->irq_lock);
if (cs42l42->suspended || !cs42l42->init_done) {
mutex_unlock(&cs42l42->irq_lock);
pm_runtime_put_autosuspend(cs42l42->dev);
return IRQ_NONE;
}
......@@ -1747,9 +1771,12 @@ static irqreturn_t cs42l42_irq_thread(int irq, void *data)
}
mutex_unlock(&cs42l42->irq_lock);
pm_runtime_mark_last_busy(cs42l42->dev);
pm_runtime_put_autosuspend(cs42l42->dev);
return IRQ_HANDLED;
}
EXPORT_SYMBOL_NS_GPL(cs42l42_irq_thread, SND_SOC_CS42L42_CORE);
static void cs42l42_set_interrupt_masks(struct cs42l42_private *cs42l42)
{
......@@ -2125,6 +2152,9 @@ int cs42l42_suspend(struct device *dev)
u8 save_regs[ARRAY_SIZE(cs42l42_shutdown_seq)];
int i, ret;
if (!cs42l42->init_done)
return 0;
/*
* Wait for threaded irq handler to be idle and stop it processing
* future interrupts. This ensures a safe disable if the interrupt
......@@ -2185,6 +2215,9 @@ int cs42l42_resume(struct device *dev)
struct cs42l42_private *cs42l42 = dev_get_drvdata(dev);
int ret;
if (!cs42l42->init_done)
return 0;
/*
* If jack was unplugged and re-plugged during suspend it could
* have changed type but the tip-sense state hasn't changed.
......@@ -2369,6 +2402,18 @@ int cs42l42_init(struct cs42l42_private *cs42l42)
if (ret != 0)
goto err_shutdown;
/*
* SRC power is linked to ASP power so doesn't work in Soundwire mode.
* Override it and use DAPM to control SRC power for Soundwire.
*/
if (cs42l42->sdw_peripheral) {
regmap_update_bits(cs42l42->regmap, CS42L42_PWR_CTL2,
CS42L42_SRC_PDN_OVERRIDE_MASK |
CS42L42_DAC_SRC_PDNB_MASK |
CS42L42_ADC_SRC_PDNB_MASK,
CS42L42_SRC_PDN_OVERRIDE_MASK);
}
/* Setup headset detection */
cs42l42_setup_hs_type_detect(cs42l42);
......
......@@ -18,6 +18,7 @@
#include <linux/mutex.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <linux/soundwire/sdw.h>
#include <sound/jack.h>
#include <sound/cs42l42.h>
#include <sound/soc-component.h>
......@@ -30,13 +31,14 @@ struct cs42l42_private {
struct gpio_desc *reset_gpio;
struct completion pdn_done;
struct snd_soc_jack *jack;
struct sdw_slave *sdw_peripheral;
struct mutex irq_lock;
int devid;
int irq;
int pll_config;
u32 sclk;
u32 sample_rate;
u32 bclk_ratio;
u32 srate;
u8 plug_state;
u8 hs_type;
u8 ts_inv;
......@@ -62,6 +64,11 @@ extern struct snd_soc_dai_driver cs42l42_dai;
bool cs42l42_readable_register(struct device *dev, unsigned int reg);
bool cs42l42_volatile_register(struct device *dev, unsigned int reg);
int cs42l42_pll_config(struct snd_soc_component *component,
unsigned int clk, unsigned int sample_rate);
void cs42l42_src_config(struct snd_soc_component *component, unsigned int sample_rate);
int cs42l42_mute_stream(struct snd_soc_dai *dai, int mute, int stream);
irqreturn_t cs42l42_irq_thread(int irq, void *data);
int cs42l42_suspend(struct device *dev);
int cs42l42_resume(struct device *dev);
void cs42l42_resume_restore(struct device *dev);
......
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