Commit 999c53fb authored by Ryan Mallon's avatar Ryan Mallon

ep93xx: Make syscon access functions private to SoC

The syscon access functions are no longer used outside of the core
EP93xx code. Move their definitions into the SoC code.
Signed-off-by: default avatarRyan Mallon <rmallon@gmail.com>
Reviewed-by: default avatarMika Westerberg <mika.westerberg@iki.fi>
Acked-by: default avatarHartley Sweeten <hsweeten@visionengravers.com>
parent 08932d81
...@@ -25,6 +25,7 @@ ...@@ -25,6 +25,7 @@
#include <asm/div64.h> #include <asm/div64.h>
#include "soc.h"
struct clk { struct clk {
struct clk *parent; struct clk *parent;
......
...@@ -205,7 +205,6 @@ void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg) ...@@ -205,7 +205,6 @@ void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
spin_unlock_irqrestore(&syscon_swlock, flags); spin_unlock_irqrestore(&syscon_swlock, flags);
} }
EXPORT_SYMBOL(ep93xx_syscon_swlocked_write);
void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits) void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
{ {
...@@ -222,7 +221,6 @@ void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits) ...@@ -222,7 +221,6 @@ void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
spin_unlock_irqrestore(&syscon_swlock, flags); spin_unlock_irqrestore(&syscon_swlock, flags);
} }
EXPORT_SYMBOL(ep93xx_devcfg_set_clear);
/** /**
* ep93xx_chip_revision() - returns the EP93xx chip revision * ep93xx_chip_revision() - returns the EP93xx chip revision
......
...@@ -21,20 +21,6 @@ struct ep93xx_eth_data ...@@ -21,20 +21,6 @@ struct ep93xx_eth_data
void ep93xx_map_io(void); void ep93xx_map_io(void);
void ep93xx_init_irq(void); void ep93xx_init_irq(void);
/* EP93xx System Controller software locked register write */
void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg);
void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits);
static inline void ep93xx_devcfg_set_bits(unsigned int bits)
{
ep93xx_devcfg_set_clear(bits, 0x00);
}
static inline void ep93xx_devcfg_clear_bits(unsigned int bits)
{
ep93xx_devcfg_set_clear(0x00, bits);
}
#define EP93XX_CHIP_REV_D0 3 #define EP93XX_CHIP_REV_D0 3
#define EP93XX_CHIP_REV_D1 4 #define EP93XX_CHIP_REV_D1 4
#define EP93XX_CHIP_REV_E0 5 #define EP93XX_CHIP_REV_E0 5
......
...@@ -104,4 +104,18 @@ ...@@ -104,4 +104,18 @@
#define EP93XX_WATCHDOG_PHYS_BASE EP93XX_APB_PHYS(0x00140000) #define EP93XX_WATCHDOG_PHYS_BASE EP93XX_APB_PHYS(0x00140000)
#define EP93XX_WATCHDOG_BASE EP93XX_APB_IOMEM(0x00140000) #define EP93XX_WATCHDOG_BASE EP93XX_APB_IOMEM(0x00140000)
/* EP93xx System Controller software locked register write */
void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg);
void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits);
static inline void ep93xx_devcfg_set_bits(unsigned int bits)
{
ep93xx_devcfg_set_clear(bits, 0x00);
}
static inline void ep93xx_devcfg_clear_bits(unsigned int bits)
{
ep93xx_devcfg_set_clear(0x00, bits);
}
#endif /* _EP93XX_SOC_H */ #endif /* _EP93XX_SOC_H */
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