Commit 9a21e55d authored by Dinh Nguyen's avatar Dinh Nguyen

ARM: dts: socfpga: update L2 tag and data latency

Sets the appropriate L2-cache latencies for the SOCFPGA platform.
Signed-off-by: default avatarDinh Nguyen <dinguyen@altera.com>
parent 374b1057
......@@ -467,6 +467,8 @@ L2: l2-cache@fffef000 {
interrupts = <0 38 0x04>;
cache-unified;
cache-level = <2>;
arm,tag-latency = <1 1 1>;
arm,data-latency = <2 1 1>;
};
/* Local timer */
......
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