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Commit 9aba9c18 authored by Lionel Landwerlin's avatar Lionel Landwerlin
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drm/i915/perf: remove generated code 

A little bit of history :

   Back when i915-perf was introduced (4.13), there was no way to
   dynamically add new OA configurations to i915. Only the generated
   configs baked in at build time were allowed.

   It quickly became obvious that we would need to allow applications
   to upload their own configurations, for instance to be able to test
   new ones, and so by the next stable version (4.14) we added uAPIs
   to allow uploading new configurations.

   When adding that capability, we took the opportunity to remove most
   HW configurations except the TestOa one which is a configuration
   IGT would rely on to verify that the HW is outputting correct
   values. At the time it made sense to have that confiuration in at
   the same time a given HW platform added to the i915-perf driver.

Now that IGT has become the reference point for HW configurations (see
commit 53f8f541ca ("lib: Add i915_perf library"), previously this was
located in the GPUTop repository), the need for having those
configurations in i915-perf is gone.

On the Mesa side, we haven't relied on this test configuration for a
while. The MDAPI library always required 4.14 feature level and always
loaded its configuration into i915.

I'm sure nobody will miss this generated stuff in i915 :)

v2: Fix selftests by creating an empty config

v3: Fix unlocking on allocation error (Dan Carpenter)

v4: Fixup checkpatch warnings

v5: Fix incorrect unlock in error path (Umesh)
Signed-off-by: default avatarLionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: default avatarUmesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200317132222.2638719-1-lionel.g.landwerlin@intel.com
parent a22f3478
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Showing with 96 additions and 1757 deletions
drivers/gpu/drm/i915/Makefile
View file @ 9aba9c18
...@@ -243,23 +243,6 @@ i915-y += \ ...@@ -243,23 +243,6 @@ i915-y += \
display/vlv_dsi.o \ display/vlv_dsi.o \
display/vlv_dsi_pll.o display/vlv_dsi_pll.o
# perf code
i915-y += \
oa/i915_oa_hsw.o \
oa/i915_oa_bdw.o \
oa/i915_oa_chv.o \
oa/i915_oa_sklgt2.o \
oa/i915_oa_sklgt3.o \
oa/i915_oa_sklgt4.o \
oa/i915_oa_bxt.o \
oa/i915_oa_kblgt2.o \
oa/i915_oa_kblgt3.o \
oa/i915_oa_glk.o \
oa/i915_oa_cflgt2.o \
oa/i915_oa_cflgt3.o \
oa/i915_oa_cnl.o \
oa/i915_oa_icl.o \
oa/i915_oa_tgl.o
i915-y += i915_perf.o i915-y += i915_perf.o
# Post-mortem debug and GPU hang state capture # Post-mortem debug and GPU hang state capture
......
drivers/gpu/drm/i915/i915_perf.c
View file @ 9aba9c18
...@@ -204,21 +204,6 @@ ...@@ -204,21 +204,6 @@
#include "i915_drv.h" #include "i915_drv.h"
#include "i915_perf.h" #include "i915_perf.h"
#include "oa/i915_oa_hsw.h"
#include "oa/i915_oa_bdw.h"
#include "oa/i915_oa_chv.h"
#include "oa/i915_oa_sklgt2.h"
#include "oa/i915_oa_sklgt3.h"
#include "oa/i915_oa_sklgt4.h"
#include "oa/i915_oa_bxt.h"
#include "oa/i915_oa_kblgt2.h"
#include "oa/i915_oa_kblgt3.h"
#include "oa/i915_oa_glk.h"
#include "oa/i915_oa_cflgt2.h"
#include "oa/i915_oa_cflgt3.h"
#include "oa/i915_oa_cnl.h"
#include "oa/i915_oa_icl.h"
#include "oa/i915_oa_tgl.h"
/* HW requires this to be a power of two, between 128k and 16M, though driver /* HW requires this to be a power of two, between 128k and 16M, though driver
* is currently generally designed assuming the largest 16M size is used such * is currently generally designed assuming the largest 16M size is used such
...@@ -409,10 +394,7 @@ i915_perf_get_oa_config(struct i915_perf *perf, int metrics_set) ...@@ -409,10 +394,7 @@ i915_perf_get_oa_config(struct i915_perf *perf, int metrics_set)
struct i915_oa_config *oa_config; struct i915_oa_config *oa_config;
rcu_read_lock(); rcu_read_lock();
if (metrics_set == 1) oa_config = idr_find(&perf->metrics_idr, metrics_set);
oa_config = &perf->test_config;
else
oa_config = idr_find(&perf->metrics_idr, metrics_set);
if (oa_config) if (oa_config)
oa_config = i915_oa_config_get(oa_config); oa_config = i915_oa_config_get(oa_config);
rcu_read_unlock(); rcu_read_unlock();
...@@ -3716,7 +3698,6 @@ int i915_perf_open_ioctl(struct drm_device *dev, void *data, ...@@ -3716,7 +3698,6 @@ int i915_perf_open_ioctl(struct drm_device *dev, void *data,
void i915_perf_register(struct drm_i915_private *i915) void i915_perf_register(struct drm_i915_private *i915)
{ {
struct i915_perf *perf = &i915->perf; struct i915_perf *perf = &i915->perf;
int ret;
if (!perf->i915) if (!perf->i915)
return; return;
...@@ -3730,64 +3711,7 @@ void i915_perf_register(struct drm_i915_private *i915) ...@@ -3730,64 +3711,7 @@ void i915_perf_register(struct drm_i915_private *i915)
perf->metrics_kobj = perf->metrics_kobj =
kobject_create_and_add("metrics", kobject_create_and_add("metrics",
&i915->drm.primary->kdev->kobj); &i915->drm.primary->kdev->kobj);
if (!perf->metrics_kobj)
goto exit;
sysfs_attr_init(&perf->test_config.sysfs_metric_id.attr);
if (IS_TIGERLAKE(i915)) {
i915_perf_load_test_config_tgl(i915);
} else if (INTEL_GEN(i915) >= 11) {
i915_perf_load_test_config_icl(i915);
} else if (IS_CANNONLAKE(i915)) {
i915_perf_load_test_config_cnl(i915);
} else if (IS_COFFEELAKE(i915)) {
if (IS_CFL_GT2(i915))
i915_perf_load_test_config_cflgt2(i915);
if (IS_CFL_GT3(i915))
i915_perf_load_test_config_cflgt3(i915);
} else if (IS_GEMINILAKE(i915)) {
i915_perf_load_test_config_glk(i915);
} else if (IS_KABYLAKE(i915)) {
if (IS_KBL_GT2(i915))
i915_perf_load_test_config_kblgt2(i915);
else if (IS_KBL_GT3(i915))
i915_perf_load_test_config_kblgt3(i915);
} else if (IS_BROXTON(i915)) {
i915_perf_load_test_config_bxt(i915);
} else if (IS_SKYLAKE(i915)) {
if (IS_SKL_GT2(i915))
i915_perf_load_test_config_sklgt2(i915);
else if (IS_SKL_GT3(i915))
i915_perf_load_test_config_sklgt3(i915);
else if (IS_SKL_GT4(i915))
i915_perf_load_test_config_sklgt4(i915);
} else if (IS_CHERRYVIEW(i915)) {
i915_perf_load_test_config_chv(i915);
} else if (IS_BROADWELL(i915)) {
i915_perf_load_test_config_bdw(i915);
} else if (IS_HASWELL(i915)) {
i915_perf_load_test_config_hsw(i915);
}
if (perf->test_config.id == 0)
goto sysfs_error;
ret = sysfs_create_group(perf->metrics_kobj,
&perf->test_config.sysfs_metric);
if (ret)
goto sysfs_error;
perf->test_config.perf = perf;
kref_init(&perf->test_config.ref);
goto exit;
sysfs_error:
kobject_put(perf->metrics_kobj);
perf->metrics_kobj = NULL;
exit:
mutex_unlock(&perf->lock); mutex_unlock(&perf->lock);
} }
...@@ -3807,9 +3731,6 @@ void i915_perf_unregister(struct drm_i915_private *i915) ...@@ -3807,9 +3731,6 @@ void i915_perf_unregister(struct drm_i915_private *i915)
if (!perf->metrics_kobj) if (!perf->metrics_kobj)
return; return;
sysfs_remove_group(perf->metrics_kobj,
&perf->test_config.sysfs_metric);
kobject_put(perf->metrics_kobj); kobject_put(perf->metrics_kobj);
perf->metrics_kobj = NULL; perf->metrics_kobj = NULL;
} }
......
drivers/gpu/drm/i915/i915_perf_types.h
View file @ 9aba9c18
...@@ -413,8 +413,6 @@ struct i915_perf { ...@@ -413,8 +413,6 @@ struct i915_perf {
*/ */
struct ratelimit_state spurious_report_rs; struct ratelimit_state spurious_report_rs;
struct i915_oa_config test_config;
u32 gen7_latched_oastatus1; u32 gen7_latched_oastatus1;
u32 ctx_oactxctrl_offset; u32 ctx_oactxctrl_offset;
u32 ctx_flexeu0_offset; u32 ctx_flexeu0_offset;
......
drivers/gpu/drm/i915/oa/i915_oa_bdw.c deleted 100644 → 0
View file @ a22f3478
// SPDX-License-Identifier: MIT
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#include <linux/sysfs.h>
#include "i915_drv.h"
#include "i915_oa_bdw.h"
static const struct i915_oa_reg b_counter_config_test_oa[] = {
{ _MMIO(0x2740), 0x00000000 },
{ _MMIO(0x2744), 0x00800000 },
{ _MMIO(0x2714), 0xf0800000 },
{ _MMIO(0x2710), 0x00000000 },
{ _MMIO(0x2724), 0xf0800000 },
{ _MMIO(0x2720), 0x00000000 },
{ _MMIO(0x2770), 0x00000004 },
{ _MMIO(0x2774), 0x00000000 },
{ _MMIO(0x2778), 0x00000003 },
{ _MMIO(0x277c), 0x00000000 },
{ _MMIO(0x2780), 0x00000007 },
{ _MMIO(0x2784), 0x00000000 },
{ _MMIO(0x2788), 0x00100002 },
{ _MMIO(0x278c), 0x0000fff7 },
{ _MMIO(0x2790), 0x00100002 },
{ _MMIO(0x2794), 0x0000ffcf },
{ _MMIO(0x2798), 0x00100082 },
{ _MMIO(0x279c), 0x0000ffef },
{ _MMIO(0x27a0), 0x001000c2 },
{ _MMIO(0x27a4), 0x0000ffe7 },
{ _MMIO(0x27a8), 0x00100001 },
{ _MMIO(0x27ac), 0x0000ffe7 },
};
static const struct i915_oa_reg flex_eu_config_test_oa[] = {
};
static const struct i915_oa_reg mux_config_test_oa[] = {
{ _MMIO(0x9840), 0x000000a0 },
{ _MMIO(0x9888), 0x198b0000 },
{ _MMIO(0x9888), 0x078b0066 },
{ _MMIO(0x9888), 0x118b0000 },
{ _MMIO(0x9888), 0x258b0000 },
{ _MMIO(0x9888), 0x21850008 },
{ _MMIO(0x9888), 0x0d834000 },
{ _MMIO(0x9888), 0x07844000 },
{ _MMIO(0x9888), 0x17804000 },
{ _MMIO(0x9888), 0x21800000 },
{ _MMIO(0x9888), 0x4f800000 },
{ _MMIO(0x9888), 0x41800000 },
{ _MMIO(0x9888), 0x31800000 },
{ _MMIO(0x9840), 0x00000080 },
};
static ssize_t
show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf)
{
return sprintf(buf, "1\n");
}
void
i915_perf_load_test_config_bdw(struct drm_i915_private *dev_priv)
{
strlcpy(dev_priv->perf.test_config.uuid,
"d6de6f55-e526-4f79-a6a6-d7315c09044e",
sizeof(dev_priv->perf.test_config.uuid));
dev_priv->perf.test_config.id = 1;
dev_priv->perf.test_config.mux_regs = mux_config_test_oa;
dev_priv->perf.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa);
dev_priv->perf.test_config.b_counter_regs = b_counter_config_test_oa;
dev_priv->perf.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa);
dev_priv->perf.test_config.flex_regs = flex_eu_config_test_oa;
dev_priv->perf.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa);
dev_priv->perf.test_config.sysfs_metric.name = "d6de6f55-e526-4f79-a6a6-d7315c09044e";
dev_priv->perf.test_config.sysfs_metric.attrs = dev_priv->perf.test_config.attrs;
dev_priv->perf.test_config.attrs[0] = &dev_priv->perf.test_config.sysfs_metric_id.attr;
dev_priv->perf.test_config.sysfs_metric_id.attr.name = "id";
dev_priv->perf.test_config.sysfs_metric_id.attr.mode = 0444;
dev_priv->perf.test_config.sysfs_metric_id.show = show_test_oa_id;
}
drivers/gpu/drm/i915/oa/i915_oa_bdw.h deleted 100644 → 0
View file @ a22f3478
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#ifndef __I915_OA_BDW_H__
#define __I915_OA_BDW_H__
struct drm_i915_private;
void i915_perf_load_test_config_bdw(struct drm_i915_private *dev_priv);
#endif
drivers/gpu/drm/i915/oa/i915_oa_bxt.c deleted 100644 → 0
View file @ a22f3478
// SPDX-License-Identifier: MIT
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#include <linux/sysfs.h>
#include "i915_drv.h"
#include "i915_oa_bxt.h"
static const struct i915_oa_reg b_counter_config_test_oa[] = {
{ _MMIO(0x2740), 0x00000000 },
{ _MMIO(0x2744), 0x00800000 },
{ _MMIO(0x2714), 0xf0800000 },
{ _MMIO(0x2710), 0x00000000 },
{ _MMIO(0x2724), 0xf0800000 },
{ _MMIO(0x2720), 0x00000000 },
{ _MMIO(0x2770), 0x00000004 },
{ _MMIO(0x2774), 0x00000000 },
{ _MMIO(0x2778), 0x00000003 },
{ _MMIO(0x277c), 0x00000000 },
{ _MMIO(0x2780), 0x00000007 },
{ _MMIO(0x2784), 0x00000000 },
{ _MMIO(0x2788), 0x00100002 },
{ _MMIO(0x278c), 0x0000fff7 },
{ _MMIO(0x2790), 0x00100002 },
{ _MMIO(0x2794), 0x0000ffcf },
{ _MMIO(0x2798), 0x00100082 },
{ _MMIO(0x279c), 0x0000ffef },
{ _MMIO(0x27a0), 0x001000c2 },
{ _MMIO(0x27a4), 0x0000ffe7 },
{ _MMIO(0x27a8), 0x00100001 },
{ _MMIO(0x27ac), 0x0000ffe7 },
};
static const struct i915_oa_reg flex_eu_config_test_oa[] = {
};
static const struct i915_oa_reg mux_config_test_oa[] = {
{ _MMIO(0x9840), 0x00000080 },
{ _MMIO(0x9888), 0x19800000 },
{ _MMIO(0x9888), 0x07800063 },
{ _MMIO(0x9888), 0x11800000 },
{ _MMIO(0x9888), 0x23810008 },
{ _MMIO(0x9888), 0x1d950400 },
{ _MMIO(0x9888), 0x0f922000 },
{ _MMIO(0x9888), 0x1f908000 },
{ _MMIO(0x9888), 0x37900000 },
{ _MMIO(0x9888), 0x55900000 },
{ _MMIO(0x9888), 0x47900000 },
{ _MMIO(0x9888), 0x33900000 },
};
static ssize_t
show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf)
{
return sprintf(buf, "1\n");
}
void
i915_perf_load_test_config_bxt(struct drm_i915_private *dev_priv)
{
strlcpy(dev_priv->perf.test_config.uuid,
"5ee72f5c-092f-421e-8b70-225f7c3e9612",
sizeof(dev_priv->perf.test_config.uuid));
dev_priv->perf.test_config.id = 1;
dev_priv->perf.test_config.mux_regs = mux_config_test_oa;
dev_priv->perf.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa);
dev_priv->perf.test_config.b_counter_regs = b_counter_config_test_oa;
dev_priv->perf.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa);
dev_priv->perf.test_config.flex_regs = flex_eu_config_test_oa;
dev_priv->perf.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa);
dev_priv->perf.test_config.sysfs_metric.name = "5ee72f5c-092f-421e-8b70-225f7c3e9612";
dev_priv->perf.test_config.sysfs_metric.attrs = dev_priv->perf.test_config.attrs;
dev_priv->perf.test_config.attrs[0] = &dev_priv->perf.test_config.sysfs_metric_id.attr;
dev_priv->perf.test_config.sysfs_metric_id.attr.name = "id";
dev_priv->perf.test_config.sysfs_metric_id.attr.mode = 0444;
dev_priv->perf.test_config.sysfs_metric_id.show = show_test_oa_id;
}
drivers/gpu/drm/i915/oa/i915_oa_bxt.h deleted 100644 → 0
View file @ a22f3478
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#ifndef __I915_OA_BXT_H__
#define __I915_OA_BXT_H__
struct drm_i915_private;
void i915_perf_load_test_config_bxt(struct drm_i915_private *dev_priv);
#endif
drivers/gpu/drm/i915/oa/i915_oa_cflgt2.c deleted 100644 → 0
View file @ a22f3478
// SPDX-License-Identifier: MIT
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#include <linux/sysfs.h>
#include "i915_drv.h"
#include "i915_oa_cflgt2.h"
static const struct i915_oa_reg b_counter_config_test_oa[] = {
{ _MMIO(0x2740), 0x00000000 },
{ _MMIO(0x2744), 0x00800000 },
{ _MMIO(0x2714), 0xf0800000 },
{ _MMIO(0x2710), 0x00000000 },
{ _MMIO(0x2724), 0xf0800000 },
{ _MMIO(0x2720), 0x00000000 },
{ _MMIO(0x2770), 0x00000004 },
{ _MMIO(0x2774), 0x00000000 },
{ _MMIO(0x2778), 0x00000003 },
{ _MMIO(0x277c), 0x00000000 },
{ _MMIO(0x2780), 0x00000007 },
{ _MMIO(0x2784), 0x00000000 },
{ _MMIO(0x2788), 0x00100002 },
{ _MMIO(0x278c), 0x0000fff7 },
{ _MMIO(0x2790), 0x00100002 },
{ _MMIO(0x2794), 0x0000ffcf },
{ _MMIO(0x2798), 0x00100082 },
{ _MMIO(0x279c), 0x0000ffef },
{ _MMIO(0x27a0), 0x001000c2 },
{ _MMIO(0x27a4), 0x0000ffe7 },
{ _MMIO(0x27a8), 0x00100001 },
{ _MMIO(0x27ac), 0x0000ffe7 },
};
static const struct i915_oa_reg flex_eu_config_test_oa[] = {
};
static const struct i915_oa_reg mux_config_test_oa[] = {
{ _MMIO(0x9840), 0x00000080 },
{ _MMIO(0x9888), 0x11810000 },
{ _MMIO(0x9888), 0x07810013 },
{ _MMIO(0x9888), 0x1f810000 },
{ _MMIO(0x9888), 0x1d810000 },
{ _MMIO(0x9888), 0x1b930040 },
{ _MMIO(0x9888), 0x07e54000 },
{ _MMIO(0x9888), 0x1f908000 },
{ _MMIO(0x9888), 0x11900000 },
{ _MMIO(0x9888), 0x37900000 },
{ _MMIO(0x9888), 0x53900000 },
{ _MMIO(0x9888), 0x45900000 },
{ _MMIO(0x9888), 0x33900000 },
};
static ssize_t
show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf)
{
return sprintf(buf, "1\n");
}
void
i915_perf_load_test_config_cflgt2(struct drm_i915_private *dev_priv)
{
strlcpy(dev_priv->perf.test_config.uuid,
"74fb4902-d3d3-4237-9e90-cbdc68d0a446",
sizeof(dev_priv->perf.test_config.uuid));
dev_priv->perf.test_config.id = 1;
dev_priv->perf.test_config.mux_regs = mux_config_test_oa;
dev_priv->perf.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa);
dev_priv->perf.test_config.b_counter_regs = b_counter_config_test_oa;
dev_priv->perf.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa);
dev_priv->perf.test_config.flex_regs = flex_eu_config_test_oa;
dev_priv->perf.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa);
dev_priv->perf.test_config.sysfs_metric.name = "74fb4902-d3d3-4237-9e90-cbdc68d0a446";
dev_priv->perf.test_config.sysfs_metric.attrs = dev_priv->perf.test_config.attrs;
dev_priv->perf.test_config.attrs[0] = &dev_priv->perf.test_config.sysfs_metric_id.attr;
dev_priv->perf.test_config.sysfs_metric_id.attr.name = "id";
dev_priv->perf.test_config.sysfs_metric_id.attr.mode = 0444;
dev_priv->perf.test_config.sysfs_metric_id.show = show_test_oa_id;
}
drivers/gpu/drm/i915/oa/i915_oa_cflgt2.h deleted 100644 → 0
View file @ a22f3478
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#ifndef __I915_OA_CFLGT2_H__
#define __I915_OA_CFLGT2_H__
struct drm_i915_private;
void i915_perf_load_test_config_cflgt2(struct drm_i915_private *dev_priv);
#endif
drivers/gpu/drm/i915/oa/i915_oa_cflgt3.c deleted 100644 → 0
View file @ a22f3478
// SPDX-License-Identifier: MIT
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#include <linux/sysfs.h>
#include "i915_drv.h"
#include "i915_oa_cflgt3.h"
static const struct i915_oa_reg b_counter_config_test_oa[] = {
{ _MMIO(0x2740), 0x00000000 },
{ _MMIO(0x2744), 0x00800000 },
{ _MMIO(0x2714), 0xf0800000 },
{ _MMIO(0x2710), 0x00000000 },
{ _MMIO(0x2724), 0xf0800000 },
{ _MMIO(0x2720), 0x00000000 },
{ _MMIO(0x2770), 0x00000004 },
{ _MMIO(0x2774), 0x00000000 },
{ _MMIO(0x2778), 0x00000003 },
{ _MMIO(0x277c), 0x00000000 },
{ _MMIO(0x2780), 0x00000007 },
{ _MMIO(0x2784), 0x00000000 },
{ _MMIO(0x2788), 0x00100002 },
{ _MMIO(0x278c), 0x0000fff7 },
{ _MMIO(0x2790), 0x00100002 },
{ _MMIO(0x2794), 0x0000ffcf },
{ _MMIO(0x2798), 0x00100082 },
{ _MMIO(0x279c), 0x0000ffef },
{ _MMIO(0x27a0), 0x001000c2 },
{ _MMIO(0x27a4), 0x0000ffe7 },
{ _MMIO(0x27a8), 0x00100001 },
{ _MMIO(0x27ac), 0x0000ffe7 },
};
static const struct i915_oa_reg flex_eu_config_test_oa[] = {
};
static const struct i915_oa_reg mux_config_test_oa[] = {
{ _MMIO(0x9840), 0x00000080 },
{ _MMIO(0x9888), 0x11810000 },
{ _MMIO(0x9888), 0x07810013 },
{ _MMIO(0x9888), 0x1f810000 },
{ _MMIO(0x9888), 0x1d810000 },
{ _MMIO(0x9888), 0x1b930040 },
{ _MMIO(0x9888), 0x07e54000 },
{ _MMIO(0x9888), 0x1f908000 },
{ _MMIO(0x9888), 0x11900000 },
{ _MMIO(0x9888), 0x37900000 },
{ _MMIO(0x9888), 0x53900000 },
{ _MMIO(0x9888), 0x45900000 },
{ _MMIO(0x9888), 0x33900000 },
};
static ssize_t
show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf)
{
return sprintf(buf, "1\n");
}
void
i915_perf_load_test_config_cflgt3(struct drm_i915_private *dev_priv)
{
strlcpy(dev_priv->perf.test_config.uuid,
"577e8e2c-3fa0-4875-8743-3538d585e3b0",
sizeof(dev_priv->perf.test_config.uuid));
dev_priv->perf.test_config.id = 1;
dev_priv->perf.test_config.mux_regs = mux_config_test_oa;
dev_priv->perf.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa);
dev_priv->perf.test_config.b_counter_regs = b_counter_config_test_oa;
dev_priv->perf.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa);
dev_priv->perf.test_config.flex_regs = flex_eu_config_test_oa;
dev_priv->perf.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa);
dev_priv->perf.test_config.sysfs_metric.name = "577e8e2c-3fa0-4875-8743-3538d585e3b0";
dev_priv->perf.test_config.sysfs_metric.attrs = dev_priv->perf.test_config.attrs;
dev_priv->perf.test_config.attrs[0] = &dev_priv->perf.test_config.sysfs_metric_id.attr;
dev_priv->perf.test_config.sysfs_metric_id.attr.name = "id";
dev_priv->perf.test_config.sysfs_metric_id.attr.mode = 0444;
dev_priv->perf.test_config.sysfs_metric_id.show = show_test_oa_id;
}
drivers/gpu/drm/i915/oa/i915_oa_cflgt3.h deleted 100644 → 0
View file @ a22f3478
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#ifndef __I915_OA_CFLGT3_H__
#define __I915_OA_CFLGT3_H__
struct drm_i915_private;
void i915_perf_load_test_config_cflgt3(struct drm_i915_private *dev_priv);
#endif
drivers/gpu/drm/i915/oa/i915_oa_chv.c deleted 100644 → 0
View file @ a22f3478
// SPDX-License-Identifier: MIT
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#include <linux/sysfs.h>
#include "i915_drv.h"
#include "i915_oa_chv.h"
static const struct i915_oa_reg b_counter_config_test_oa[] = {
{ _MMIO(0x2740), 0x00000000 },
{ _MMIO(0x2744), 0x00800000 },
{ _MMIO(0x2714), 0xf0800000 },
{ _MMIO(0x2710), 0x00000000 },
{ _MMIO(0x2724), 0xf0800000 },
{ _MMIO(0x2720), 0x00000000 },
{ _MMIO(0x2770), 0x00000004 },
{ _MMIO(0x2774), 0x00000000 },
{ _MMIO(0x2778), 0x00000003 },
{ _MMIO(0x277c), 0x00000000 },
{ _MMIO(0x2780), 0x00000007 },
{ _MMIO(0x2784), 0x00000000 },
{ _MMIO(0x2788), 0x00100002 },
{ _MMIO(0x278c), 0x0000fff7 },
{ _MMIO(0x2790), 0x00100002 },
{ _MMIO(0x2794), 0x0000ffcf },
{ _MMIO(0x2798), 0x00100082 },
{ _MMIO(0x279c), 0x0000ffef },
{ _MMIO(0x27a0), 0x001000c2 },
{ _MMIO(0x27a4), 0x0000ffe7 },
{ _MMIO(0x27a8), 0x00100001 },
{ _MMIO(0x27ac), 0x0000ffe7 },
};
static const struct i915_oa_reg flex_eu_config_test_oa[] = {
};
static const struct i915_oa_reg mux_config_test_oa[] = {
{ _MMIO(0x9840), 0x000000a0 },
{ _MMIO(0x9888), 0x59800000 },
{ _MMIO(0x9888), 0x59800001 },
{ _MMIO(0x9888), 0x338b0000 },
{ _MMIO(0x9888), 0x258b0066 },
{ _MMIO(0x9888), 0x058b0000 },
{ _MMIO(0x9888), 0x038b0000 },
{ _MMIO(0x9888), 0x03844000 },
{ _MMIO(0x9888), 0x47800080 },
{ _MMIO(0x9888), 0x57800000 },
{ _MMIO(0x1823a4), 0x00000000 },
{ _MMIO(0x9888), 0x59800000 },
{ _MMIO(0x9840), 0x00000080 },
};
static ssize_t
show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf)
{
return sprintf(buf, "1\n");
}
void
i915_perf_load_test_config_chv(struct drm_i915_private *dev_priv)
{
strlcpy(dev_priv->perf.test_config.uuid,
"4a534b07-cba3-414d-8d60-874830e883aa",
sizeof(dev_priv->perf.test_config.uuid));
dev_priv->perf.test_config.id = 1;
dev_priv->perf.test_config.mux_regs = mux_config_test_oa;
dev_priv->perf.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa);
dev_priv->perf.test_config.b_counter_regs = b_counter_config_test_oa;
dev_priv->perf.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa);
dev_priv->perf.test_config.flex_regs = flex_eu_config_test_oa;
dev_priv->perf.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa);
dev_priv->perf.test_config.sysfs_metric.name = "4a534b07-cba3-414d-8d60-874830e883aa";
dev_priv->perf.test_config.sysfs_metric.attrs = dev_priv->perf.test_config.attrs;
dev_priv->perf.test_config.attrs[0] = &dev_priv->perf.test_config.sysfs_metric_id.attr;
dev_priv->perf.test_config.sysfs_metric_id.attr.name = "id";
dev_priv->perf.test_config.sysfs_metric_id.attr.mode = 0444;
dev_priv->perf.test_config.sysfs_metric_id.show = show_test_oa_id;
}
drivers/gpu/drm/i915/oa/i915_oa_chv.h deleted 100644 → 0
View file @ a22f3478
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#ifndef __I915_OA_CHV_H__
#define __I915_OA_CHV_H__
struct drm_i915_private;
void i915_perf_load_test_config_chv(struct drm_i915_private *dev_priv);
#endif
drivers/gpu/drm/i915/oa/i915_oa_cnl.c deleted 100644 → 0
View file @ a22f3478
// SPDX-License-Identifier: MIT
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#include <linux/sysfs.h>
#include "i915_drv.h"
#include "i915_oa_cnl.h"
static const struct i915_oa_reg b_counter_config_test_oa[] = {
{ _MMIO(0x2740), 0x00000000 },
{ _MMIO(0x2710), 0x00000000 },
{ _MMIO(0x2714), 0xf0800000 },
{ _MMIO(0x2720), 0x00000000 },
{ _MMIO(0x2724), 0xf0800000 },
{ _MMIO(0x2770), 0x00000004 },
{ _MMIO(0x2774), 0x0000ffff },
{ _MMIO(0x2778), 0x00000003 },
{ _MMIO(0x277c), 0x0000ffff },
{ _MMIO(0x2780), 0x00000007 },
{ _MMIO(0x2784), 0x0000ffff },
{ _MMIO(0x2788), 0x00100002 },
{ _MMIO(0x278c), 0x0000fff7 },
{ _MMIO(0x2790), 0x00100002 },
{ _MMIO(0x2794), 0x0000ffcf },
{ _MMIO(0x2798), 0x00100082 },
{ _MMIO(0x279c), 0x0000ffef },
{ _MMIO(0x27a0), 0x001000c2 },
{ _MMIO(0x27a4), 0x0000ffe7 },
{ _MMIO(0x27a8), 0x00100001 },
{ _MMIO(0x27ac), 0x0000ffe7 },
};
static const struct i915_oa_reg flex_eu_config_test_oa[] = {
};
static const struct i915_oa_reg mux_config_test_oa[] = {
{ _MMIO(0xd04), 0x00000200 },
{ _MMIO(0x9884), 0x00000007 },
{ _MMIO(0x9888), 0x17060000 },
{ _MMIO(0x9840), 0x00000000 },
{ _MMIO(0x9884), 0x00000007 },
{ _MMIO(0x9888), 0x13034000 },
{ _MMIO(0x9884), 0x00000007 },
{ _MMIO(0x9888), 0x07060066 },
{ _MMIO(0x9884), 0x00000007 },
{ _MMIO(0x9888), 0x05060000 },
{ _MMIO(0x9884), 0x00000007 },
{ _MMIO(0x9888), 0x0f080040 },
{ _MMIO(0x9884), 0x00000007 },
{ _MMIO(0x9888), 0x07091000 },
{ _MMIO(0x9884), 0x00000007 },
{ _MMIO(0x9888), 0x0f041000 },
{ _MMIO(0x9884), 0x00000007 },
{ _MMIO(0x9888), 0x1d004000 },
{ _MMIO(0x9884), 0x00000007 },
{ _MMIO(0x9888), 0x35000000 },
{ _MMIO(0x9884), 0x00000007 },
{ _MMIO(0x9888), 0x49000000 },
{ _MMIO(0x9884), 0x00000007 },
{ _MMIO(0x9888), 0x3d000000 },
{ _MMIO(0x9884), 0x00000007 },
{ _MMIO(0x9888), 0x31000000 },
};
static ssize_t
show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf)
{
return sprintf(buf, "1\n");
}
void
i915_perf_load_test_config_cnl(struct drm_i915_private *dev_priv)
{
strlcpy(dev_priv->perf.test_config.uuid,
"db41edd4-d8e7-4730-ad11-b9a2d6833503",
sizeof(dev_priv->perf.test_config.uuid));
dev_priv->perf.test_config.id = 1;
dev_priv->perf.test_config.mux_regs = mux_config_test_oa;
dev_priv->perf.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa);
dev_priv->perf.test_config.b_counter_regs = b_counter_config_test_oa;
dev_priv->perf.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa);
dev_priv->perf.test_config.flex_regs = flex_eu_config_test_oa;
dev_priv->perf.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa);
dev_priv->perf.test_config.sysfs_metric.name = "db41edd4-d8e7-4730-ad11-b9a2d6833503";
dev_priv->perf.test_config.sysfs_metric.attrs = dev_priv->perf.test_config.attrs;
dev_priv->perf.test_config.attrs[0] = &dev_priv->perf.test_config.sysfs_metric_id.attr;
dev_priv->perf.test_config.sysfs_metric_id.attr.name = "id";
dev_priv->perf.test_config.sysfs_metric_id.attr.mode = 0444;
dev_priv->perf.test_config.sysfs_metric_id.show = show_test_oa_id;
}
drivers/gpu/drm/i915/oa/i915_oa_cnl.h deleted 100644 → 0
View file @ a22f3478
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#ifndef __I915_OA_CNL_H__
#define __I915_OA_CNL_H__
struct drm_i915_private;
void i915_perf_load_test_config_cnl(struct drm_i915_private *dev_priv);
#endif
drivers/gpu/drm/i915/oa/i915_oa_glk.c deleted 100644 → 0
View file @ a22f3478
// SPDX-License-Identifier: MIT
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#include <linux/sysfs.h>
#include "i915_drv.h"
#include "i915_oa_glk.h"
static const struct i915_oa_reg b_counter_config_test_oa[] = {
{ _MMIO(0x2740), 0x00000000 },
{ _MMIO(0x2744), 0x00800000 },
{ _MMIO(0x2714), 0xf0800000 },
{ _MMIO(0x2710), 0x00000000 },
{ _MMIO(0x2724), 0xf0800000 },
{ _MMIO(0x2720), 0x00000000 },
{ _MMIO(0x2770), 0x00000004 },
{ _MMIO(0x2774), 0x00000000 },
{ _MMIO(0x2778), 0x00000003 },
{ _MMIO(0x277c), 0x00000000 },
{ _MMIO(0x2780), 0x00000007 },
{ _MMIO(0x2784), 0x00000000 },
{ _MMIO(0x2788), 0x00100002 },
{ _MMIO(0x278c), 0x0000fff7 },
{ _MMIO(0x2790), 0x00100002 },
{ _MMIO(0x2794), 0x0000ffcf },
{ _MMIO(0x2798), 0x00100082 },
{ _MMIO(0x279c), 0x0000ffef },
{ _MMIO(0x27a0), 0x001000c2 },
{ _MMIO(0x27a4), 0x0000ffe7 },
{ _MMIO(0x27a8), 0x00100001 },
{ _MMIO(0x27ac), 0x0000ffe7 },
};
static const struct i915_oa_reg flex_eu_config_test_oa[] = {
};
static const struct i915_oa_reg mux_config_test_oa[] = {
{ _MMIO(0x9840), 0x00000080 },
{ _MMIO(0x9888), 0x19800000 },
{ _MMIO(0x9888), 0x07800063 },
{ _MMIO(0x9888), 0x11800000 },
{ _MMIO(0x9888), 0x23810008 },
{ _MMIO(0x9888), 0x1d950400 },
{ _MMIO(0x9888), 0x0f922000 },
{ _MMIO(0x9888), 0x1f908000 },
{ _MMIO(0x9888), 0x37900000 },
{ _MMIO(0x9888), 0x55900000 },
{ _MMIO(0x9888), 0x47900000 },
{ _MMIO(0x9888), 0x33900000 },
};
static ssize_t
show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf)
{
return sprintf(buf, "1\n");
}
void
i915_perf_load_test_config_glk(struct drm_i915_private *dev_priv)
{
strlcpy(dev_priv->perf.test_config.uuid,
"dd3fd789-e783-4204-8cd0-b671bbccb0cf",
sizeof(dev_priv->perf.test_config.uuid));
dev_priv->perf.test_config.id = 1;
dev_priv->perf.test_config.mux_regs = mux_config_test_oa;
dev_priv->perf.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa);
dev_priv->perf.test_config.b_counter_regs = b_counter_config_test_oa;
dev_priv->perf.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa);
dev_priv->perf.test_config.flex_regs = flex_eu_config_test_oa;
dev_priv->perf.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa);
dev_priv->perf.test_config.sysfs_metric.name = "dd3fd789-e783-4204-8cd0-b671bbccb0cf";
dev_priv->perf.test_config.sysfs_metric.attrs = dev_priv->perf.test_config.attrs;
dev_priv->perf.test_config.attrs[0] = &dev_priv->perf.test_config.sysfs_metric_id.attr;
dev_priv->perf.test_config.sysfs_metric_id.attr.name = "id";
dev_priv->perf.test_config.sysfs_metric_id.attr.mode = 0444;
dev_priv->perf.test_config.sysfs_metric_id.show = show_test_oa_id;
}
drivers/gpu/drm/i915/oa/i915_oa_glk.h deleted 100644 → 0
View file @ a22f3478
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#ifndef __I915_OA_GLK_H__
#define __I915_OA_GLK_H__
struct drm_i915_private;
void i915_perf_load_test_config_glk(struct drm_i915_private *dev_priv);
#endif
drivers/gpu/drm/i915/oa/i915_oa_hsw.c deleted 100644 → 0
View file @ a22f3478
// SPDX-License-Identifier: MIT
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#include <linux/sysfs.h>
#include "i915_drv.h"
#include "i915_oa_hsw.h"
static const struct i915_oa_reg b_counter_config_render_basic[] = {
{ _MMIO(0x2724), 0x00800000 },
{ _MMIO(0x2720), 0x00000000 },
{ _MMIO(0x2714), 0x00800000 },
{ _MMIO(0x2710), 0x00000000 },
};
static const struct i915_oa_reg flex_eu_config_render_basic[] = {
};
static const struct i915_oa_reg mux_config_render_basic[] = {
{ _MMIO(0x9840), 0x00000080 },
{ _MMIO(0x253a4), 0x01600000 },
{ _MMIO(0x25440), 0x00100000 },
{ _MMIO(0x25128), 0x00000000 },
{ _MMIO(0x2691c), 0x00000800 },
{ _MMIO(0x26aa0), 0x01500000 },
{ _MMIO(0x26b9c), 0x00006000 },
{ _MMIO(0x2791c), 0x00000800 },
{ _MMIO(0x27aa0), 0x01500000 },
{ _MMIO(0x27b9c), 0x00006000 },
{ _MMIO(0x2641c), 0x00000400 },
{ _MMIO(0x25380), 0x00000010 },
{ _MMIO(0x2538c), 0x00000000 },
{ _MMIO(0x25384), 0x0800aaaa },
{ _MMIO(0x25400), 0x00000004 },
{ _MMIO(0x2540c), 0x06029000 },
{ _MMIO(0x25410), 0x00000002 },
{ _MMIO(0x25404), 0x5c30ffff },
{ _MMIO(0x25100), 0x00000016 },
{ _MMIO(0x25110), 0x00000400 },
{ _MMIO(0x25104), 0x00000000 },
{ _MMIO(0x26804), 0x00001211 },
{ _MMIO(0x26884), 0x00000100 },
{ _MMIO(0x26900), 0x00000002 },
{ _MMIO(0x26908), 0x00700000 },
{ _MMIO(0x26904), 0x00000000 },
{ _MMIO(0x26984), 0x00001022 },
{ _MMIO(0x26a04), 0x00000011 },
{ _MMIO(0x26a80), 0x00000006 },
{ _MMIO(0x26a88), 0x00000c02 },
{ _MMIO(0x26a84), 0x00000000 },
{ _MMIO(0x26b04), 0x00001000 },
{ _MMIO(0x26b80), 0x00000002 },
{ _MMIO(0x26b8c), 0x00000007 },
{ _MMIO(0x26b84), 0x00000000 },
{ _MMIO(0x27804), 0x00004844 },
{ _MMIO(0x27884), 0x00000400 },
{ _MMIO(0x27900), 0x00000002 },
{ _MMIO(0x27908), 0x0e000000 },
{ _MMIO(0x27904), 0x00000000 },
{ _MMIO(0x27984), 0x00004088 },
{ _MMIO(0x27a04), 0x00000044 },
{ _MMIO(0x27a80), 0x00000006 },
{ _MMIO(0x27a88), 0x00018040 },
{ _MMIO(0x27a84), 0x00000000 },
{ _MMIO(0x27b04), 0x00004000 },
{ _MMIO(0x27b80), 0x00000002 },
{ _MMIO(0x27b8c), 0x000000e0 },
{ _MMIO(0x27b84), 0x00000000 },
{ _MMIO(0x26104), 0x00002222 },
{ _MMIO(0x26184), 0x0c006666 },
{ _MMIO(0x26284), 0x04000000 },
{ _MMIO(0x26304), 0x04000000 },
{ _MMIO(0x26400), 0x00000002 },
{ _MMIO(0x26410), 0x000000a0 },
{ _MMIO(0x26404), 0x00000000 },
{ _MMIO(0x25420), 0x04108020 },
{ _MMIO(0x25424), 0x1284a420 },
{ _MMIO(0x2541c), 0x00000000 },
{ _MMIO(0x25428), 0x00042049 },
};
static ssize_t
show_render_basic_id(struct device *kdev, struct device_attribute *attr, char *buf)
{
return sprintf(buf, "1\n");
}
void
i915_perf_load_test_config_hsw(struct drm_i915_private *dev_priv)
{
strlcpy(dev_priv->perf.test_config.uuid,
"403d8832-1a27-4aa6-a64e-f5389ce7b212",
sizeof(dev_priv->perf.test_config.uuid));
dev_priv->perf.test_config.id = 1;
dev_priv->perf.test_config.mux_regs = mux_config_render_basic;
dev_priv->perf.test_config.mux_regs_len = ARRAY_SIZE(mux_config_render_basic);
dev_priv->perf.test_config.b_counter_regs = b_counter_config_render_basic;
dev_priv->perf.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_render_basic);
dev_priv->perf.test_config.flex_regs = flex_eu_config_render_basic;
dev_priv->perf.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_render_basic);
dev_priv->perf.test_config.sysfs_metric.name = "403d8832-1a27-4aa6-a64e-f5389ce7b212";
dev_priv->perf.test_config.sysfs_metric.attrs = dev_priv->perf.test_config.attrs;
dev_priv->perf.test_config.attrs[0] = &dev_priv->perf.test_config.sysfs_metric_id.attr;
dev_priv->perf.test_config.sysfs_metric_id.attr.name = "id";
dev_priv->perf.test_config.sysfs_metric_id.attr.mode = 0444;
dev_priv->perf.test_config.sysfs_metric_id.show = show_render_basic_id;
}
drivers/gpu/drm/i915/oa/i915_oa_hsw.h deleted 100644 → 0
View file @ a22f3478
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#ifndef __I915_OA_HSW_H__
#define __I915_OA_HSW_H__
struct drm_i915_private;
void i915_perf_load_test_config_hsw(struct drm_i915_private *dev_priv);
#endif
drivers/gpu/drm/i915/oa/i915_oa_icl.c deleted 100644 → 0
View file @ a22f3478
// SPDX-License-Identifier: MIT
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#include <linux/sysfs.h>
#include "i915_drv.h"
#include "i915_oa_icl.h"
static const struct i915_oa_reg b_counter_config_test_oa[] = {
{ _MMIO(0x2740), 0x00000000 },
{ _MMIO(0x2710), 0x00000000 },
{ _MMIO(0x2714), 0xf0800000 },
{ _MMIO(0x2720), 0x00000000 },
{ _MMIO(0x2724), 0xf0800000 },
{ _MMIO(0x2770), 0x00000004 },
{ _MMIO(0x2774), 0x0000ffff },
{ _MMIO(0x2778), 0x00000003 },
{ _MMIO(0x277c), 0x0000ffff },
{ _MMIO(0x2780), 0x00000007 },
{ _MMIO(0x2784), 0x0000ffff },
{ _MMIO(0x2788), 0x00100002 },
{ _MMIO(0x278c), 0x0000fff7 },
{ _MMIO(0x2790), 0x00100002 },
{ _MMIO(0x2794), 0x0000ffcf },
{ _MMIO(0x2798), 0x00100082 },
{ _MMIO(0x279c), 0x0000ffef },
{ _MMIO(0x27a0), 0x001000c2 },
{ _MMIO(0x27a4), 0x0000ffe7 },
{ _MMIO(0x27a8), 0x00100001 },
{ _MMIO(0x27ac), 0x0000ffe7 },
};
static const struct i915_oa_reg flex_eu_config_test_oa[] = {
};
static const struct i915_oa_reg mux_config_test_oa[] = {
{ _MMIO(0xd04), 0x00000200 },
{ _MMIO(0x9840), 0x00000000 },
{ _MMIO(0x9884), 0x00000000 },
{ _MMIO(0x9888), 0x10060000 },
{ _MMIO(0x9888), 0x22060000 },
{ _MMIO(0x9888), 0x16060000 },
{ _MMIO(0x9888), 0x24060000 },
{ _MMIO(0x9888), 0x18060000 },
{ _MMIO(0x9888), 0x1a060000 },
{ _MMIO(0x9888), 0x12060000 },
{ _MMIO(0x9888), 0x14060000 },
{ _MMIO(0x9888), 0x10060000 },
{ _MMIO(0x9888), 0x22060000 },
{ _MMIO(0x9884), 0x00000003 },
{ _MMIO(0x9888), 0x16130000 },
{ _MMIO(0x9888), 0x24000001 },
{ _MMIO(0x9888), 0x0e130056 },
{ _MMIO(0x9888), 0x10130000 },
{ _MMIO(0x9888), 0x1a130000 },
{ _MMIO(0x9888), 0x541f0001 },
{ _MMIO(0x9888), 0x181f0000 },
{ _MMIO(0x9888), 0x4c1f0000 },
{ _MMIO(0x9888), 0x301f0000 },
};
static ssize_t
show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf)
{
return sprintf(buf, "1\n");
}
void
i915_perf_load_test_config_icl(struct drm_i915_private *dev_priv)
{
strlcpy(dev_priv->perf.test_config.uuid,
"a291665e-244b-4b76-9b9a-01de9d3c8068",
sizeof(dev_priv->perf.test_config.uuid));
dev_priv->perf.test_config.id = 1;
dev_priv->perf.test_config.mux_regs = mux_config_test_oa;
dev_priv->perf.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa);
dev_priv->perf.test_config.b_counter_regs = b_counter_config_test_oa;
dev_priv->perf.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa);
dev_priv->perf.test_config.flex_regs = flex_eu_config_test_oa;
dev_priv->perf.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa);
dev_priv->perf.test_config.sysfs_metric.name = "a291665e-244b-4b76-9b9a-01de9d3c8068";
dev_priv->perf.test_config.sysfs_metric.attrs = dev_priv->perf.test_config.attrs;
dev_priv->perf.test_config.attrs[0] = &dev_priv->perf.test_config.sysfs_metric_id.attr;
dev_priv->perf.test_config.sysfs_metric_id.attr.name = "id";
dev_priv->perf.test_config.sysfs_metric_id.attr.mode = 0444;
dev_priv->perf.test_config.sysfs_metric_id.show = show_test_oa_id;
}
drivers/gpu/drm/i915/oa/i915_oa_icl.h deleted 100644 → 0
View file @ a22f3478
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#ifndef __I915_OA_ICL_H__
#define __I915_OA_ICL_H__
struct drm_i915_private;
void i915_perf_load_test_config_icl(struct drm_i915_private *dev_priv);
#endif
drivers/gpu/drm/i915/oa/i915_oa_kblgt2.c deleted 100644 → 0
View file @ a22f3478
// SPDX-License-Identifier: MIT
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#include <linux/sysfs.h>
#include "i915_drv.h"
#include "i915_oa_kblgt2.h"
static const struct i915_oa_reg b_counter_config_test_oa[] = {
{ _MMIO(0x2740), 0x00000000 },
{ _MMIO(0x2744), 0x00800000 },
{ _MMIO(0x2714), 0xf0800000 },
{ _MMIO(0x2710), 0x00000000 },
{ _MMIO(0x2724), 0xf0800000 },
{ _MMIO(0x2720), 0x00000000 },
{ _MMIO(0x2770), 0x00000004 },
{ _MMIO(0x2774), 0x00000000 },
{ _MMIO(0x2778), 0x00000003 },
{ _MMIO(0x277c), 0x00000000 },
{ _MMIO(0x2780), 0x00000007 },
{ _MMIO(0x2784), 0x00000000 },
{ _MMIO(0x2788), 0x00100002 },
{ _MMIO(0x278c), 0x0000fff7 },
{ _MMIO(0x2790), 0x00100002 },
{ _MMIO(0x2794), 0x0000ffcf },
{ _MMIO(0x2798), 0x00100082 },
{ _MMIO(0x279c), 0x0000ffef },
{ _MMIO(0x27a0), 0x001000c2 },
{ _MMIO(0x27a4), 0x0000ffe7 },
{ _MMIO(0x27a8), 0x00100001 },
{ _MMIO(0x27ac), 0x0000ffe7 },
};
static const struct i915_oa_reg flex_eu_config_test_oa[] = {
};
static const struct i915_oa_reg mux_config_test_oa[] = {
{ _MMIO(0x9840), 0x00000080 },
{ _MMIO(0x9888), 0x11810000 },
{ _MMIO(0x9888), 0x07810013 },
{ _MMIO(0x9888), 0x1f810000 },
{ _MMIO(0x9888), 0x1d810000 },
{ _MMIO(0x9888), 0x1b930040 },
{ _MMIO(0x9888), 0x07e54000 },
{ _MMIO(0x9888), 0x1f908000 },
{ _MMIO(0x9888), 0x11900000 },
{ _MMIO(0x9888), 0x37900000 },
{ _MMIO(0x9888), 0x53900000 },
{ _MMIO(0x9888), 0x45900000 },
{ _MMIO(0x9888), 0x33900000 },
};
static ssize_t
show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf)
{
return sprintf(buf, "1\n");
}
void
i915_perf_load_test_config_kblgt2(struct drm_i915_private *dev_priv)
{
strlcpy(dev_priv->perf.test_config.uuid,
"baa3c7e4-52b6-4b85-801e-465a94b746dd",
sizeof(dev_priv->perf.test_config.uuid));
dev_priv->perf.test_config.id = 1;
dev_priv->perf.test_config.mux_regs = mux_config_test_oa;
dev_priv->perf.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa);
dev_priv->perf.test_config.b_counter_regs = b_counter_config_test_oa;
dev_priv->perf.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa);
dev_priv->perf.test_config.flex_regs = flex_eu_config_test_oa;
dev_priv->perf.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa);
dev_priv->perf.test_config.sysfs_metric.name = "baa3c7e4-52b6-4b85-801e-465a94b746dd";
dev_priv->perf.test_config.sysfs_metric.attrs = dev_priv->perf.test_config.attrs;
dev_priv->perf.test_config.attrs[0] = &dev_priv->perf.test_config.sysfs_metric_id.attr;
dev_priv->perf.test_config.sysfs_metric_id.attr.name = "id";
dev_priv->perf.test_config.sysfs_metric_id.attr.mode = 0444;
dev_priv->perf.test_config.sysfs_metric_id.show = show_test_oa_id;
}
drivers/gpu/drm/i915/oa/i915_oa_kblgt2.h deleted 100644 → 0
View file @ a22f3478
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#ifndef __I915_OA_KBLGT2_H__
#define __I915_OA_KBLGT2_H__
struct drm_i915_private;
void i915_perf_load_test_config_kblgt2(struct drm_i915_private *dev_priv);
#endif
drivers/gpu/drm/i915/oa/i915_oa_kblgt3.c deleted 100644 → 0
View file @ a22f3478
// SPDX-License-Identifier: MIT
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#include <linux/sysfs.h>
#include "i915_drv.h"
#include "i915_oa_kblgt3.h"
static const struct i915_oa_reg b_counter_config_test_oa[] = {
{ _MMIO(0x2740), 0x00000000 },
{ _MMIO(0x2744), 0x00800000 },
{ _MMIO(0x2714), 0xf0800000 },
{ _MMIO(0x2710), 0x00000000 },
{ _MMIO(0x2724), 0xf0800000 },
{ _MMIO(0x2720), 0x00000000 },
{ _MMIO(0x2770), 0x00000004 },
{ _MMIO(0x2774), 0x00000000 },
{ _MMIO(0x2778), 0x00000003 },
{ _MMIO(0x277c), 0x00000000 },
{ _MMIO(0x2780), 0x00000007 },
{ _MMIO(0x2784), 0x00000000 },
{ _MMIO(0x2788), 0x00100002 },
{ _MMIO(0x278c), 0x0000fff7 },
{ _MMIO(0x2790), 0x00100002 },
{ _MMIO(0x2794), 0x0000ffcf },
{ _MMIO(0x2798), 0x00100082 },
{ _MMIO(0x279c), 0x0000ffef },
{ _MMIO(0x27a0), 0x001000c2 },
{ _MMIO(0x27a4), 0x0000ffe7 },
{ _MMIO(0x27a8), 0x00100001 },
{ _MMIO(0x27ac), 0x0000ffe7 },
};
static const struct i915_oa_reg flex_eu_config_test_oa[] = {
};
static const struct i915_oa_reg mux_config_test_oa[] = {
{ _MMIO(0x9840), 0x00000080 },
{ _MMIO(0x9888), 0x11810000 },
{ _MMIO(0x9888), 0x07810013 },
{ _MMIO(0x9888), 0x1f810000 },
{ _MMIO(0x9888), 0x1d810000 },
{ _MMIO(0x9888), 0x1b930040 },
{ _MMIO(0x9888), 0x07e54000 },
{ _MMIO(0x9888), 0x1f908000 },
{ _MMIO(0x9888), 0x11900000 },
{ _MMIO(0x9888), 0x37900000 },
{ _MMIO(0x9888), 0x53900000 },
{ _MMIO(0x9888), 0x45900000 },
{ _MMIO(0x9888), 0x33900000 },
};
static ssize_t
show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf)
{
return sprintf(buf, "1\n");
}
void
i915_perf_load_test_config_kblgt3(struct drm_i915_private *dev_priv)
{
strlcpy(dev_priv->perf.test_config.uuid,
"f1792f32-6db2-4b50-b4b2-557128f1688d",
sizeof(dev_priv->perf.test_config.uuid));
dev_priv->perf.test_config.id = 1;
dev_priv->perf.test_config.mux_regs = mux_config_test_oa;
dev_priv->perf.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa);
dev_priv->perf.test_config.b_counter_regs = b_counter_config_test_oa;
dev_priv->perf.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa);
dev_priv->perf.test_config.flex_regs = flex_eu_config_test_oa;
dev_priv->perf.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa);
dev_priv->perf.test_config.sysfs_metric.name = "f1792f32-6db2-4b50-b4b2-557128f1688d";
dev_priv->perf.test_config.sysfs_metric.attrs = dev_priv->perf.test_config.attrs;
dev_priv->perf.test_config.attrs[0] = &dev_priv->perf.test_config.sysfs_metric_id.attr;
dev_priv->perf.test_config.sysfs_metric_id.attr.name = "id";
dev_priv->perf.test_config.sysfs_metric_id.attr.mode = 0444;
dev_priv->perf.test_config.sysfs_metric_id.show = show_test_oa_id;
}
drivers/gpu/drm/i915/oa/i915_oa_kblgt3.h deleted 100644 → 0
View file @ a22f3478
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#ifndef __I915_OA_KBLGT3_H__
#define __I915_OA_KBLGT3_H__
struct drm_i915_private;
void i915_perf_load_test_config_kblgt3(struct drm_i915_private *dev_priv);
#endif
drivers/gpu/drm/i915/oa/i915_oa_sklgt2.c deleted 100644 → 0
View file @ a22f3478
// SPDX-License-Identifier: MIT
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#include <linux/sysfs.h>
#include "i915_drv.h"
#include "i915_oa_sklgt2.h"
static const struct i915_oa_reg b_counter_config_test_oa[] = {
{ _MMIO(0x2740), 0x00000000 },
{ _MMIO(0x2714), 0xf0800000 },
{ _MMIO(0x2710), 0x00000000 },
{ _MMIO(0x2724), 0xf0800000 },
{ _MMIO(0x2720), 0x00000000 },
{ _MMIO(0x2770), 0x00000004 },
{ _MMIO(0x2774), 0x00000000 },
{ _MMIO(0x2778), 0x00000003 },
{ _MMIO(0x277c), 0x00000000 },
{ _MMIO(0x2780), 0x00000007 },
{ _MMIO(0x2784), 0x00000000 },
{ _MMIO(0x2788), 0x00100002 },
{ _MMIO(0x278c), 0x0000fff7 },
{ _MMIO(0x2790), 0x00100002 },
{ _MMIO(0x2794), 0x0000ffcf },
{ _MMIO(0x2798), 0x00100082 },
{ _MMIO(0x279c), 0x0000ffef },
{ _MMIO(0x27a0), 0x001000c2 },
{ _MMIO(0x27a4), 0x0000ffe7 },
{ _MMIO(0x27a8), 0x00100001 },
{ _MMIO(0x27ac), 0x0000ffe7 },
};
static const struct i915_oa_reg flex_eu_config_test_oa[] = {
};
static const struct i915_oa_reg mux_config_test_oa[] = {
{ _MMIO(0x9840), 0x00000080 },
{ _MMIO(0x9888), 0x11810000 },
{ _MMIO(0x9888), 0x07810016 },
{ _MMIO(0x9888), 0x1f810000 },
{ _MMIO(0x9888), 0x1d810000 },
{ _MMIO(0x9888), 0x1b930040 },
{ _MMIO(0x9888), 0x07e54000 },
{ _MMIO(0x9888), 0x1f908000 },
{ _MMIO(0x9888), 0x11900000 },
{ _MMIO(0x9888), 0x37900000 },
{ _MMIO(0x9888), 0x53900000 },
{ _MMIO(0x9888), 0x45900000 },
{ _MMIO(0x9888), 0x33900000 },
};
static ssize_t
show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf)
{
return sprintf(buf, "1\n");
}
void
i915_perf_load_test_config_sklgt2(struct drm_i915_private *dev_priv)
{
strlcpy(dev_priv->perf.test_config.uuid,
"1651949f-0ac0-4cb1-a06f-dafd74a407d1",
sizeof(dev_priv->perf.test_config.uuid));
dev_priv->perf.test_config.id = 1;
dev_priv->perf.test_config.mux_regs = mux_config_test_oa;
dev_priv->perf.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa);
dev_priv->perf.test_config.b_counter_regs = b_counter_config_test_oa;
dev_priv->perf.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa);
dev_priv->perf.test_config.flex_regs = flex_eu_config_test_oa;
dev_priv->perf.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa);
dev_priv->perf.test_config.sysfs_metric.name = "1651949f-0ac0-4cb1-a06f-dafd74a407d1";
dev_priv->perf.test_config.sysfs_metric.attrs = dev_priv->perf.test_config.attrs;
dev_priv->perf.test_config.attrs[0] = &dev_priv->perf.test_config.sysfs_metric_id.attr;
dev_priv->perf.test_config.sysfs_metric_id.attr.name = "id";
dev_priv->perf.test_config.sysfs_metric_id.attr.mode = 0444;
dev_priv->perf.test_config.sysfs_metric_id.show = show_test_oa_id;
}
drivers/gpu/drm/i915/oa/i915_oa_sklgt2.h deleted 100644 → 0
View file @ a22f3478
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#ifndef __I915_OA_SKLGT2_H__
#define __I915_OA_SKLGT2_H__
struct drm_i915_private;
void i915_perf_load_test_config_sklgt2(struct drm_i915_private *dev_priv);
#endif
drivers/gpu/drm/i915/oa/i915_oa_sklgt3.c deleted 100644 → 0
View file @ a22f3478
// SPDX-License-Identifier: MIT
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#include <linux/sysfs.h>
#include "i915_drv.h"
#include "i915_oa_sklgt3.h"
static const struct i915_oa_reg b_counter_config_test_oa[] = {
{ _MMIO(0x2740), 0x00000000 },
{ _MMIO(0x2744), 0x00800000 },
{ _MMIO(0x2714), 0xf0800000 },
{ _MMIO(0x2710), 0x00000000 },
{ _MMIO(0x2724), 0xf0800000 },
{ _MMIO(0x2720), 0x00000000 },
{ _MMIO(0x2770), 0x00000004 },
{ _MMIO(0x2774), 0x00000000 },
{ _MMIO(0x2778), 0x00000003 },
{ _MMIO(0x277c), 0x00000000 },
{ _MMIO(0x2780), 0x00000007 },
{ _MMIO(0x2784), 0x00000000 },
{ _MMIO(0x2788), 0x00100002 },
{ _MMIO(0x278c), 0x0000fff7 },
{ _MMIO(0x2790), 0x00100002 },
{ _MMIO(0x2794), 0x0000ffcf },
{ _MMIO(0x2798), 0x00100082 },
{ _MMIO(0x279c), 0x0000ffef },
{ _MMIO(0x27a0), 0x001000c2 },
{ _MMIO(0x27a4), 0x0000ffe7 },
{ _MMIO(0x27a8), 0x00100001 },
{ _MMIO(0x27ac), 0x0000ffe7 },
};
static const struct i915_oa_reg flex_eu_config_test_oa[] = {
};
static const struct i915_oa_reg mux_config_test_oa[] = {
{ _MMIO(0x9840), 0x00000080 },
{ _MMIO(0x9888), 0x11810000 },
{ _MMIO(0x9888), 0x07810013 },
{ _MMIO(0x9888), 0x1f810000 },
{ _MMIO(0x9888), 0x1d810000 },
{ _MMIO(0x9888), 0x1b930040 },
{ _MMIO(0x9888), 0x07e54000 },
{ _MMIO(0x9888), 0x1f908000 },
{ _MMIO(0x9888), 0x11900000 },
{ _MMIO(0x9888), 0x37900000 },
{ _MMIO(0x9888), 0x53900000 },
{ _MMIO(0x9888), 0x45900000 },
{ _MMIO(0x9888), 0x33900000 },
};
static ssize_t
show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf)
{
return sprintf(buf, "1\n");
}
void
i915_perf_load_test_config_sklgt3(struct drm_i915_private *dev_priv)
{
strlcpy(dev_priv->perf.test_config.uuid,
"2b985803-d3c9-4629-8a4f-634bfecba0e8",
sizeof(dev_priv->perf.test_config.uuid));
dev_priv->perf.test_config.id = 1;
dev_priv->perf.test_config.mux_regs = mux_config_test_oa;
dev_priv->perf.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa);
dev_priv->perf.test_config.b_counter_regs = b_counter_config_test_oa;
dev_priv->perf.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa);
dev_priv->perf.test_config.flex_regs = flex_eu_config_test_oa;
dev_priv->perf.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa);
dev_priv->perf.test_config.sysfs_metric.name = "2b985803-d3c9-4629-8a4f-634bfecba0e8";
dev_priv->perf.test_config.sysfs_metric.attrs = dev_priv->perf.test_config.attrs;
dev_priv->perf.test_config.attrs[0] = &dev_priv->perf.test_config.sysfs_metric_id.attr;
dev_priv->perf.test_config.sysfs_metric_id.attr.name = "id";
dev_priv->perf.test_config.sysfs_metric_id.attr.mode = 0444;
dev_priv->perf.test_config.sysfs_metric_id.show = show_test_oa_id;
}
drivers/gpu/drm/i915/oa/i915_oa_sklgt3.h deleted 100644 → 0
View file @ a22f3478
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#ifndef __I915_OA_SKLGT3_H__
#define __I915_OA_SKLGT3_H__
struct drm_i915_private;
void i915_perf_load_test_config_sklgt3(struct drm_i915_private *dev_priv);
#endif
drivers/gpu/drm/i915/oa/i915_oa_sklgt4.c deleted 100644 → 0
View file @ a22f3478
// SPDX-License-Identifier: MIT
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#include <linux/sysfs.h>
#include "i915_drv.h"
#include "i915_oa_sklgt4.h"
static const struct i915_oa_reg b_counter_config_test_oa[] = {
{ _MMIO(0x2740), 0x00000000 },
{ _MMIO(0x2744), 0x00800000 },
{ _MMIO(0x2714), 0xf0800000 },
{ _MMIO(0x2710), 0x00000000 },
{ _MMIO(0x2724), 0xf0800000 },
{ _MMIO(0x2720), 0x00000000 },
{ _MMIO(0x2770), 0x00000004 },
{ _MMIO(0x2774), 0x00000000 },
{ _MMIO(0x2778), 0x00000003 },
{ _MMIO(0x277c), 0x00000000 },
{ _MMIO(0x2780), 0x00000007 },
{ _MMIO(0x2784), 0x00000000 },
{ _MMIO(0x2788), 0x00100002 },
{ _MMIO(0x278c), 0x0000fff7 },
{ _MMIO(0x2790), 0x00100002 },
{ _MMIO(0x2794), 0x0000ffcf },
{ _MMIO(0x2798), 0x00100082 },
{ _MMIO(0x279c), 0x0000ffef },
{ _MMIO(0x27a0), 0x001000c2 },
{ _MMIO(0x27a4), 0x0000ffe7 },
{ _MMIO(0x27a8), 0x00100001 },
{ _MMIO(0x27ac), 0x0000ffe7 },
};
static const struct i915_oa_reg flex_eu_config_test_oa[] = {
};
static const struct i915_oa_reg mux_config_test_oa[] = {
{ _MMIO(0x9840), 0x00000080 },
{ _MMIO(0x9888), 0x11810000 },
{ _MMIO(0x9888), 0x07810013 },
{ _MMIO(0x9888), 0x1f810000 },
{ _MMIO(0x9888), 0x1d810000 },
{ _MMIO(0x9888), 0x1b930040 },
{ _MMIO(0x9888), 0x07e54000 },
{ _MMIO(0x9888), 0x1f908000 },
{ _MMIO(0x9888), 0x11900000 },
{ _MMIO(0x9888), 0x37900000 },
{ _MMIO(0x9888), 0x53900000 },
{ _MMIO(0x9888), 0x45900000 },
{ _MMIO(0x9888), 0x33900000 },
};
static ssize_t
show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf)
{
return sprintf(buf, "1\n");
}
void
i915_perf_load_test_config_sklgt4(struct drm_i915_private *dev_priv)
{
strlcpy(dev_priv->perf.test_config.uuid,
"882fa433-1f4a-4a67-a962-c741888fe5f5",
sizeof(dev_priv->perf.test_config.uuid));
dev_priv->perf.test_config.id = 1;
dev_priv->perf.test_config.mux_regs = mux_config_test_oa;
dev_priv->perf.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa);
dev_priv->perf.test_config.b_counter_regs = b_counter_config_test_oa;
dev_priv->perf.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa);
dev_priv->perf.test_config.flex_regs = flex_eu_config_test_oa;
dev_priv->perf.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa);
dev_priv->perf.test_config.sysfs_metric.name = "882fa433-1f4a-4a67-a962-c741888fe5f5";
dev_priv->perf.test_config.sysfs_metric.attrs = dev_priv->perf.test_config.attrs;
dev_priv->perf.test_config.attrs[0] = &dev_priv->perf.test_config.sysfs_metric_id.attr;
dev_priv->perf.test_config.sysfs_metric_id.attr.name = "id";
dev_priv->perf.test_config.sysfs_metric_id.attr.mode = 0444;
dev_priv->perf.test_config.sysfs_metric_id.show = show_test_oa_id;
}
drivers/gpu/drm/i915/oa/i915_oa_sklgt4.h deleted 100644 → 0
View file @ a22f3478
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2018-2019 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#ifndef __I915_OA_SKLGT4_H__
#define __I915_OA_SKLGT4_H__
struct drm_i915_private;
void i915_perf_load_test_config_sklgt4(struct drm_i915_private *dev_priv);
#endif
drivers/gpu/drm/i915/oa/i915_oa_tgl.c deleted 100644 → 0
View file @ a22f3478
// SPDX-License-Identifier: MIT
/*
* Copyright © 2018 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#include <linux/sysfs.h>
#include "i915_drv.h"
#include "i915_oa_tgl.h"
static const struct i915_oa_reg b_counter_config_test_oa[] = {
{ _MMIO(0xD920), 0x00000000 },
{ _MMIO(0xD900), 0x00000000 },
{ _MMIO(0xD904), 0xF0800000 },
{ _MMIO(0xD910), 0x00000000 },
{ _MMIO(0xD914), 0xF0800000 },
{ _MMIO(0xDC40), 0x00FF0000 },
{ _MMIO(0xD940), 0x00000004 },
{ _MMIO(0xD944), 0x0000FFFF },
{ _MMIO(0xDC00), 0x00000004 },
{ _MMIO(0xDC04), 0x0000FFFF },
{ _MMIO(0xD948), 0x00000003 },
{ _MMIO(0xD94C), 0x0000FFFF },
{ _MMIO(0xDC08), 0x00000003 },
{ _MMIO(0xDC0C), 0x0000FFFF },
{ _MMIO(0xD950), 0x00000007 },
{ _MMIO(0xD954), 0x0000FFFF },
{ _MMIO(0xDC10), 0x00000007 },
{ _MMIO(0xDC14), 0x0000FFFF },
{ _MMIO(0xD958), 0x00100002 },
{ _MMIO(0xD95C), 0x0000FFF7 },
{ _MMIO(0xDC18), 0x00100002 },
{ _MMIO(0xDC1C), 0x0000FFF7 },
{ _MMIO(0xD960), 0x00100002 },
{ _MMIO(0xD964), 0x0000FFCF },
{ _MMIO(0xDC20), 0x00100002 },
{ _MMIO(0xDC24), 0x0000FFCF },
{ _MMIO(0xD968), 0x00100082 },
{ _MMIO(0xD96C), 0x0000FFEF },
{ _MMIO(0xDC28), 0x00100082 },
{ _MMIO(0xDC2C), 0x0000FFEF },
{ _MMIO(0xD970), 0x001000C2 },
{ _MMIO(0xD974), 0x0000FFE7 },
{ _MMIO(0xDC30), 0x001000C2 },
{ _MMIO(0xDC34), 0x0000FFE7 },
{ _MMIO(0xD978), 0x00100001 },
{ _MMIO(0xD97C), 0x0000FFE7 },
{ _MMIO(0xDC38), 0x00100001 },
{ _MMIO(0xDC3C), 0x0000FFE7 },
};
static const struct i915_oa_reg flex_eu_config_test_oa[] = {
};
static const struct i915_oa_reg mux_config_test_oa[] = {
{ _MMIO(0x0D04), 0x00000200 },
{ _MMIO(0x9840), 0x00000000 },
{ _MMIO(0x9884), 0x00000000 },
{ _MMIO(0x9888), 0x280E0000 },
{ _MMIO(0x9888), 0x1E0E0147 },
{ _MMIO(0x9888), 0x180E0000 },
{ _MMIO(0x9888), 0x160E0000 },
{ _MMIO(0x9888), 0x1E0F1000 },
{ _MMIO(0x9888), 0x1E104000 },
{ _MMIO(0x9888), 0x2E020100 },
{ _MMIO(0x9888), 0x2C030004 },
{ _MMIO(0x9888), 0x38003000 },
{ _MMIO(0x9888), 0x1E0A8000 },
{ _MMIO(0x9884), 0x00000003 },
{ _MMIO(0x9888), 0x49110000 },
{ _MMIO(0x9888), 0x5D101400 },
{ _MMIO(0x9888), 0x1D140020 },
{ _MMIO(0x9888), 0x1D1103A3 },
{ _MMIO(0x9888), 0x01110000 },
{ _MMIO(0x9888), 0x61111000 },
{ _MMIO(0x9888), 0x1F128000 },
{ _MMIO(0x9888), 0x17100000 },
{ _MMIO(0x9888), 0x55100630 },
{ _MMIO(0x9888), 0x57100000 },
{ _MMIO(0x9888), 0x31100000 },
{ _MMIO(0x9884), 0x00000003 },
{ _MMIO(0x9888), 0x65100002 },
{ _MMIO(0x9884), 0x00000000 },
{ _MMIO(0x9888), 0x42000001 },
};
static ssize_t
show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf)
{
return sprintf(buf, "1\n");
}
void
i915_perf_load_test_config_tgl(struct drm_i915_private *dev_priv)
{
strlcpy(dev_priv->perf.test_config.uuid,
"80a833f0-2504-4321-8894-e9277844ce7b",
sizeof(dev_priv->perf.test_config.uuid));
dev_priv->perf.test_config.id = 1;
dev_priv->perf.test_config.mux_regs = mux_config_test_oa;
dev_priv->perf.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa);
dev_priv->perf.test_config.b_counter_regs = b_counter_config_test_oa;
dev_priv->perf.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa);
dev_priv->perf.test_config.flex_regs = flex_eu_config_test_oa;
dev_priv->perf.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa);
dev_priv->perf.test_config.sysfs_metric.name = "80a833f0-2504-4321-8894-e9277844ce7b";
dev_priv->perf.test_config.sysfs_metric.attrs = dev_priv->perf.test_config.attrs;
dev_priv->perf.test_config.attrs[0] = &dev_priv->perf.test_config.sysfs_metric_id.attr;
dev_priv->perf.test_config.sysfs_metric_id.attr.name = "id";
dev_priv->perf.test_config.sysfs_metric_id.attr.mode = 0444;
dev_priv->perf.test_config.sysfs_metric_id.show = show_test_oa_id;
}
drivers/gpu/drm/i915/oa/i915_oa_tgl.h deleted 100644 → 0
View file @ a22f3478
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2018 Intel Corporation
*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*/
#ifndef __I915_OA_TGL_H__
#define __I915_OA_TGL_H__
struct drm_i915_private;
void i915_perf_load_test_config_tgl(struct drm_i915_private *dev_priv);
#endif
drivers/gpu/drm/i915/selftests/i915_perf.c
View file @ 9aba9c18
...@@ -14,10 +14,85 @@ ...@@ -14,10 +14,85 @@
#include "igt_flush_test.h" #include "igt_flush_test.h"
#include "lib_sw_fence.h" #include "lib_sw_fence.h"
#define TEST_OA_CONFIG_UUID "12345678-1234-1234-1234-1234567890ab"
static int
alloc_empty_config(struct i915_perf *perf)
{
struct i915_oa_config *oa_config;
oa_config = kzalloc(sizeof(*oa_config), GFP_KERNEL);
if (!oa_config)
return -ENOMEM;
oa_config->perf = perf;
kref_init(&oa_config->ref);
strlcpy(oa_config->uuid, TEST_OA_CONFIG_UUID, sizeof(oa_config->uuid));
mutex_lock(&perf->metrics_lock);
oa_config->id = idr_alloc(&perf->metrics_idr, oa_config, 2, 0, GFP_KERNEL);
if (oa_config->id < 0) {
mutex_unlock(&perf->metrics_lock);
i915_oa_config_put(oa_config);
return -ENOMEM;
}
mutex_unlock(&perf->metrics_lock);
return 0;
}
static void
destroy_empty_config(struct i915_perf *perf)
{
struct i915_oa_config *oa_config = NULL, *tmp;
int id;
mutex_lock(&perf->metrics_lock);
idr_for_each_entry(&perf->metrics_idr, tmp, id) {
if (!strcmp(tmp->uuid, TEST_OA_CONFIG_UUID)) {
oa_config = tmp;
break;
}
}
if (oa_config)
idr_remove(&perf->metrics_idr, oa_config->id);
mutex_unlock(&perf->metrics_lock);
if (oa_config)
i915_oa_config_put(oa_config);
}
static struct i915_oa_config *
get_empty_config(struct i915_perf *perf)
{
struct i915_oa_config *oa_config = NULL, *tmp;
int id;
mutex_lock(&perf->metrics_lock);
idr_for_each_entry(&perf->metrics_idr, tmp, id) {
if (!strcmp(tmp->uuid, TEST_OA_CONFIG_UUID)) {
oa_config = i915_oa_config_get(tmp);
break;
}
}
mutex_unlock(&perf->metrics_lock);
return oa_config;
}
static struct i915_perf_stream * static struct i915_perf_stream *
test_stream(struct i915_perf *perf) test_stream(struct i915_perf *perf)
{ {
struct drm_i915_perf_open_param param = {}; struct drm_i915_perf_open_param param = {};
struct i915_oa_config *oa_config = get_empty_config(perf);
struct perf_open_properties props = { struct perf_open_properties props = {
.engine = intel_engine_lookup_user(perf->i915, .engine = intel_engine_lookup_user(perf->i915,
I915_ENGINE_CLASS_RENDER, I915_ENGINE_CLASS_RENDER,
...@@ -25,13 +100,19 @@ test_stream(struct i915_perf *perf) ...@@ -25,13 +100,19 @@ test_stream(struct i915_perf *perf)
.sample_flags = SAMPLE_OA_REPORT, .sample_flags = SAMPLE_OA_REPORT,
.oa_format = IS_GEN(perf->i915, 12) ? .oa_format = IS_GEN(perf->i915, 12) ?
I915_OA_FORMAT_A32u40_A4u32_B8_C8 : I915_OA_FORMAT_C4_B8, I915_OA_FORMAT_A32u40_A4u32_B8_C8 : I915_OA_FORMAT_C4_B8,
.metrics_set = 1,
}; };
struct i915_perf_stream *stream; struct i915_perf_stream *stream;
if (!oa_config)
return NULL;
props.metrics_set = oa_config->id;
stream = kzalloc(sizeof(*stream), GFP_KERNEL); stream = kzalloc(sizeof(*stream), GFP_KERNEL);
if (!stream) if (!stream) {
i915_oa_config_put(oa_config);
return NULL; return NULL;
}
stream->perf = perf; stream->perf = perf;
...@@ -42,6 +123,8 @@ test_stream(struct i915_perf *perf) ...@@ -42,6 +123,8 @@ test_stream(struct i915_perf *perf)
} }
mutex_unlock(&perf->lock); mutex_unlock(&perf->lock);
i915_oa_config_put(oa_config);
return stream; return stream;
} }
...@@ -206,6 +289,7 @@ int i915_perf_live_selftests(struct drm_i915_private *i915) ...@@ -206,6 +289,7 @@ int i915_perf_live_selftests(struct drm_i915_private *i915)
SUBTEST(live_noa_delay), SUBTEST(live_noa_delay),
}; };
struct i915_perf *perf = &i915->perf; struct i915_perf *perf = &i915->perf;
int err;
if (!perf->metrics_kobj || !perf->ops.enable_metric_set) if (!perf->metrics_kobj || !perf->ops.enable_metric_set)
return 0; return 0;
...@@ -213,5 +297,13 @@ int i915_perf_live_selftests(struct drm_i915_private *i915) ...@@ -213,5 +297,13 @@ int i915_perf_live_selftests(struct drm_i915_private *i915)
if (intel_gt_is_wedged(&i915->gt)) if (intel_gt_is_wedged(&i915->gt))
return 0; return 0;
return i915_subtests(tests, i915); err = alloc_empty_config(&i915->perf);
if (err)
return err;
err = i915_subtests(tests, i915);
destroy_empty_config(&i915->perf);
return err;
} }
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