Commit 9acb1725 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'fixes-3.6-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull arm-soc fixes from Arnd Bergmann:
 "Bug fixes for various ARM platforms.  About half of these are for OMAP
  and submitted before but did not make it into v3.6-rc2."

* tag 'fixes-3.6-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (39 commits)
  ARM: ux500: don't select LEDS_GPIO for snowball
  ARM: imx: build i.MX6 functions only when needed
  ARM: imx: select CPU_FREQ_TABLE when needed
  ARM: imx: fix ksz9021rn_phy_fixup
  ARM: imx: build pm-imx5 code only when PM is enabled
  ARM: omap: allow building omap44xx without SMP
  ARM: dts: imx51-babbage: fix esdhc cd/wp properties
  ARM: imx6: spin the cpu until hardware takes it down
  ARM: ux500: Ensure probing of Audio devices when Device Tree is enabled
  ARM: ux500: Fix merge error, no matching driver name for 'snd_soc_u8500'
  ARM i.MX6q: Add virtual 1/3.5 dividers in the LDB clock path
  ARM: Kirkwood: fix Makefile.boot
  ARM: Kirkwood: Fix iconnect leds
  ARM: Orion: Set eth packet size csum offload limit
  ARM: mv78xx0: fix win_cfg_base prototype
  ARM: OMAP: dmtimers: Fix locking issue in omap_dm_timer_request*()
  ARM: mmp: fix potential NULL dereference
  ARM: OMAP4: Register the OPP table only for 4430 device
  cpufreq: OMAP: Handle missing frequency table on SMP systems
  ARM: OMAP4: sleep: Save the complete used register stack frame
  ...
parents 26756087 57f0b201
...@@ -10,8 +10,8 @@ Required properties: ...@@ -10,8 +10,8 @@ Required properties:
- compatible : Should be "fsl,<chip>-esdhc" - compatible : Should be "fsl,<chip>-esdhc"
Optional properties: Optional properties:
- fsl,cd-internal : Indicate to use controller internal card detection - fsl,cd-controller : Indicate to use controller internal card detection
- fsl,wp-internal : Indicate to use controller internal write protection - fsl,wp-controller : Indicate to use controller internal write protection
Examples: Examples:
...@@ -19,8 +19,8 @@ esdhc@70004000 { ...@@ -19,8 +19,8 @@ esdhc@70004000 {
compatible = "fsl,imx51-esdhc"; compatible = "fsl,imx51-esdhc";
reg = <0x70004000 0x4000>; reg = <0x70004000 0x4000>;
interrupts = <1>; interrupts = <1>;
fsl,cd-internal; fsl,cd-controller;
fsl,wp-internal; fsl,wp-controller;
}; };
esdhc@70008000 { esdhc@70008000 {
......
...@@ -2144,6 +2144,7 @@ source "drivers/cpufreq/Kconfig" ...@@ -2144,6 +2144,7 @@ source "drivers/cpufreq/Kconfig"
config CPU_FREQ_IMX config CPU_FREQ_IMX
tristate "CPUfreq driver for i.MX CPUs" tristate "CPUfreq driver for i.MX CPUs"
depends on ARCH_MXC && CPU_FREQ depends on ARCH_MXC && CPU_FREQ
select CPU_FREQ_TABLE
help help
This enables the CPUfreq driver for i.MX CPUs. This enables the CPUfreq driver for i.MX CPUs.
......
...@@ -154,5 +154,10 @@ i2c3: i2c@4819C000 { ...@@ -154,5 +154,10 @@ i2c3: i2c@4819C000 {
#size-cells = <0>; #size-cells = <0>;
ti,hwmods = "i2c3"; ti,hwmods = "i2c3";
}; };
wdt2: wdt@44e35000 {
compatible = "ti,omap3-wdt";
ti,hwmods = "wd_timer2";
};
}; };
}; };
...@@ -25,8 +25,8 @@ soc { ...@@ -25,8 +25,8 @@ soc {
aips@70000000 { /* aips-1 */ aips@70000000 { /* aips-1 */
spba@70000000 { spba@70000000 {
esdhc@70004000 { /* ESDHC1 */ esdhc@70004000 { /* ESDHC1 */
fsl,cd-internal; fsl,cd-controller;
fsl,wp-internal; fsl,wp-controller;
status = "okay"; status = "okay";
}; };
......
...@@ -41,9 +41,13 @@ led-level { ...@@ -41,9 +41,13 @@ led-level {
}; };
power-blue { power-blue {
label = "power:blue"; label = "power:blue";
gpios = <&gpio1 11 0>; gpios = <&gpio1 10 0>;
linux,default-trigger = "timer"; linux,default-trigger = "timer";
}; };
power-red {
label = "power:red";
gpios = <&gpio1 11 0>;
};
usb1 { usb1 {
label = "usb1:blue"; label = "usb1:blue";
gpios = <&gpio1 12 0>; gpios = <&gpio1 12 0>;
......
...@@ -66,6 +66,7 @@ vana: regulator@7 { ...@@ -66,6 +66,7 @@ vana: regulator@7 {
vcxio: regulator@8 { vcxio: regulator@8 {
compatible = "ti,twl6030-vcxio"; compatible = "ti,twl6030-vcxio";
regulator-always-on;
}; };
vusb: regulator@9 { vusb: regulator@9 {
...@@ -74,10 +75,12 @@ vusb: regulator@9 { ...@@ -74,10 +75,12 @@ vusb: regulator@9 {
v1v8: regulator@10 { v1v8: regulator@10 {
compatible = "ti,twl6030-v1v8"; compatible = "ti,twl6030-v1v8";
regulator-always-on;
}; };
v2v1: regulator@11 { v2v1: regulator@11 {
compatible = "ti,twl6030-v2v1"; compatible = "ti,twl6030-v2v1";
regulator-always-on;
}; };
clk32kg: regulator@12 { clk32kg: regulator@12 {
......
...@@ -86,6 +86,7 @@ CONFIG_NEW_LEDS=y ...@@ -86,6 +86,7 @@ CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y CONFIG_LEDS_CLASS=y
CONFIG_LEDS_LM3530=y CONFIG_LEDS_LM3530=y
CONFIG_LEDS_LP5521=y CONFIG_LEDS_LP5521=y
CONFIG_LEDS_GPIO=y
CONFIG_RTC_CLASS=y CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_AB8500=y CONFIG_RTC_DRV_AB8500=y
CONFIG_RTC_DRV_PL031=y CONFIG_RTC_DRV_PL031=y
......
...@@ -102,7 +102,8 @@ void __init dove_ehci1_init(void) ...@@ -102,7 +102,8 @@ void __init dove_ehci1_init(void)
void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data) void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
{ {
orion_ge00_init(eth_data, DOVE_GE00_PHYS_BASE, orion_ge00_init(eth_data, DOVE_GE00_PHYS_BASE,
IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR); IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR,
1600);
} }
/***************************************************************************** /*****************************************************************************
......
...@@ -42,6 +42,7 @@ ...@@ -42,6 +42,7 @@
#include <plat/backlight.h> #include <plat/backlight.h>
#include <plat/fb.h> #include <plat/fb.h>
#include <plat/mfc.h> #include <plat/mfc.h>
#include <plat/hdmi.h>
#include <mach/ohci.h> #include <mach/ohci.h>
#include <mach/map.h> #include <mach/map.h>
...@@ -734,6 +735,11 @@ static void __init origen_bt_setup(void) ...@@ -734,6 +735,11 @@ static void __init origen_bt_setup(void)
s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE); s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE);
} }
/* I2C module and id for HDMIPHY */
static struct i2c_board_info hdmiphy_info = {
I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
};
static void s5p_tv_setup(void) static void s5p_tv_setup(void)
{ {
/* Direct HPD to HDMI chip */ /* Direct HPD to HDMI chip */
...@@ -781,6 +787,7 @@ static void __init origen_machine_init(void) ...@@ -781,6 +787,7 @@ static void __init origen_machine_init(void)
s5p_tv_setup(); s5p_tv_setup();
s5p_i2c_hdmiphy_set_platdata(NULL); s5p_i2c_hdmiphy_set_platdata(NULL);
s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
#ifdef CONFIG_DRM_EXYNOS #ifdef CONFIG_DRM_EXYNOS
s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata; s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
......
...@@ -40,6 +40,7 @@ ...@@ -40,6 +40,7 @@
#include <plat/mfc.h> #include <plat/mfc.h>
#include <plat/ehci.h> #include <plat/ehci.h>
#include <plat/clock.h> #include <plat/clock.h>
#include <plat/hdmi.h>
#include <mach/map.h> #include <mach/map.h>
#include <mach/ohci.h> #include <mach/ohci.h>
...@@ -354,6 +355,11 @@ static struct platform_pwm_backlight_data smdkv310_bl_data = { ...@@ -354,6 +355,11 @@ static struct platform_pwm_backlight_data smdkv310_bl_data = {
.pwm_period_ns = 1000, .pwm_period_ns = 1000,
}; };
/* I2C module and id for HDMIPHY */
static struct i2c_board_info hdmiphy_info = {
I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
};
static void s5p_tv_setup(void) static void s5p_tv_setup(void)
{ {
/* direct HPD to HDMI chip */ /* direct HPD to HDMI chip */
...@@ -388,6 +394,7 @@ static void __init smdkv310_machine_init(void) ...@@ -388,6 +394,7 @@ static void __init smdkv310_machine_init(void)
s5p_tv_setup(); s5p_tv_setup();
s5p_i2c_hdmiphy_set_platdata(NULL); s5p_i2c_hdmiphy_set_platdata(NULL);
s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
samsung_keypad_set_platdata(&smdkv310_keypad_data); samsung_keypad_set_platdata(&smdkv310_keypad_data);
......
...@@ -9,7 +9,8 @@ obj-$(CONFIG_SOC_IMX27) += clk-imx27.o mm-imx27.o ehci-imx27.o ...@@ -9,7 +9,8 @@ obj-$(CONFIG_SOC_IMX27) += clk-imx27.o mm-imx27.o ehci-imx27.o
obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o clk-imx31.o iomux-imx31.o ehci-imx31.o pm-imx3.o obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o clk-imx31.o iomux-imx31.o ehci-imx31.o pm-imx3.o
obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clk-imx35.o ehci-imx35.o pm-imx3.o obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clk-imx35.o ehci-imx35.o pm-imx3.o
obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o pm-imx5.o cpu_op-mx51.o imx5-pm-$(CONFIG_PM) += pm-imx5.o
obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o $(imx5-pm-y) cpu_op-mx51.o
obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \ obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \
clk-pfd.o clk-busy.o clk-pfd.o clk-busy.o
...@@ -70,14 +71,13 @@ obj-$(CONFIG_DEBUG_LL) += lluart.o ...@@ -70,14 +71,13 @@ obj-$(CONFIG_DEBUG_LL) += lluart.o
obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o
obj-$(CONFIG_HAVE_IMX_SRC) += src.o obj-$(CONFIG_HAVE_IMX_SRC) += src.o
obj-$(CONFIG_CPU_V7) += head-v7.o AFLAGS_headsmp.o :=-Wa,-march=armv7-a
AFLAGS_head-v7.o :=-Wa,-march=armv7-a obj-$(CONFIG_SMP) += headsmp.o platsmp.o
obj-$(CONFIG_SMP) += platsmp.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o
ifeq ($(CONFIG_PM),y) ifeq ($(CONFIG_PM),y)
obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o headsmp.o
endif endif
# i.MX5 based machines # i.MX5 based machines
......
...@@ -152,7 +152,7 @@ enum mx6q_clks { ...@@ -152,7 +152,7 @@ enum mx6q_clks {
ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3, ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3,
usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg, usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg,
pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg, pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg,
ssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2, ssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2, ldb_di0_div_3_5, ldb_di1_div_3_5,
clk_max clk_max
}; };
...@@ -288,8 +288,10 @@ int __init mx6q_clocks_init(void) ...@@ -288,8 +288,10 @@ int __init mx6q_clocks_init(void)
clk[gpu3d_shader] = imx_clk_divider("gpu3d_shader", "gpu3d_shader_sel", base + 0x18, 29, 3); clk[gpu3d_shader] = imx_clk_divider("gpu3d_shader", "gpu3d_shader_sel", base + 0x18, 29, 3);
clk[ipu1_podf] = imx_clk_divider("ipu1_podf", "ipu1_sel", base + 0x3c, 11, 3); clk[ipu1_podf] = imx_clk_divider("ipu1_podf", "ipu1_sel", base + 0x3c, 11, 3);
clk[ipu2_podf] = imx_clk_divider("ipu2_podf", "ipu2_sel", base + 0x3c, 16, 3); clk[ipu2_podf] = imx_clk_divider("ipu2_podf", "ipu2_sel", base + 0x3c, 16, 3);
clk[ldb_di0_podf] = imx_clk_divider("ldb_di0_podf", "ldb_di0_sel", base + 0x20, 10, 1); clk[ldb_di0_div_3_5] = imx_clk_fixed_factor("ldb_di0_div_3_5", "ldb_di0_sel", 2, 7);
clk[ldb_di1_podf] = imx_clk_divider("ldb_di1_podf", "ldb_di1_sel", base + 0x20, 11, 1); clk[ldb_di0_podf] = imx_clk_divider("ldb_di0_podf", "ldb_di0_div_3_5", base + 0x20, 10, 1);
clk[ldb_di1_div_3_5] = imx_clk_fixed_factor("ldb_di1_div_3_5", "ldb_di1_sel", 2, 7);
clk[ldb_di1_podf] = imx_clk_divider("ldb_di1_podf", "ldb_di1_div_3_5", base + 0x20, 11, 1);
clk[ipu1_di0_pre] = imx_clk_divider("ipu1_di0_pre", "ipu1_di0_pre_sel", base + 0x34, 3, 3); clk[ipu1_di0_pre] = imx_clk_divider("ipu1_di0_pre", "ipu1_di0_pre_sel", base + 0x34, 3, 3);
clk[ipu1_di1_pre] = imx_clk_divider("ipu1_di1_pre", "ipu1_di1_pre_sel", base + 0x34, 12, 3); clk[ipu1_di1_pre] = imx_clk_divider("ipu1_di1_pre", "ipu1_di1_pre_sel", base + 0x34, 12, 3);
clk[ipu2_di0_pre] = imx_clk_divider("ipu2_di0_pre", "ipu2_di0_pre_sel", base + 0x38, 3, 3); clk[ipu2_di0_pre] = imx_clk_divider("ipu2_di0_pre", "ipu2_di0_pre_sel", base + 0x38, 3, 3);
......
...@@ -42,22 +42,6 @@ static inline void cpu_enter_lowpower(void) ...@@ -42,22 +42,6 @@ static inline void cpu_enter_lowpower(void)
: "cc"); : "cc");
} }
static inline void cpu_leave_lowpower(void)
{
unsigned int v;
asm volatile(
"mrc p15, 0, %0, c1, c0, 0\n"
" orr %0, %0, %1\n"
" mcr p15, 0, %0, c1, c0, 0\n"
" mrc p15, 0, %0, c1, c0, 1\n"
" orr %0, %0, %2\n"
" mcr p15, 0, %0, c1, c0, 1\n"
: "=&r" (v)
: "Ir" (CR_C), "Ir" (0x40)
: "cc");
}
/* /*
* platform-specific code to shutdown a CPU * platform-specific code to shutdown a CPU
* *
...@@ -67,11 +51,10 @@ void platform_cpu_die(unsigned int cpu) ...@@ -67,11 +51,10 @@ void platform_cpu_die(unsigned int cpu)
{ {
cpu_enter_lowpower(); cpu_enter_lowpower();
imx_enable_cpu(cpu, false); imx_enable_cpu(cpu, false);
cpu_do_idle();
cpu_leave_lowpower();
/* We should never return from idle */ /* spin here until hardware takes it down */
panic("cpu %d unexpectedly exit from shutdown\n", cpu); while (1)
;
} }
int platform_cpu_disable(unsigned int cpu) int platform_cpu_disable(unsigned int cpu)
......
...@@ -71,7 +71,7 @@ void imx6q_restart(char mode, const char *cmd) ...@@ -71,7 +71,7 @@ void imx6q_restart(char mode, const char *cmd)
/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */ /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
static int ksz9021rn_phy_fixup(struct phy_device *phydev) static int ksz9021rn_phy_fixup(struct phy_device *phydev)
{ {
if (IS_ENABLED(CONFIG_PHYLIB)) { if (IS_BUILTIN(CONFIG_PHYLIB)) {
/* min rx data delay */ /* min rx data delay */
phy_write(phydev, 0x0b, 0x8105); phy_write(phydev, 0x0b, 0x8105);
phy_write(phydev, 0x0c, 0x0000); phy_write(phydev, 0x0c, 0x0000);
...@@ -112,7 +112,7 @@ static void __init imx6q_sabrelite_cko1_setup(void) ...@@ -112,7 +112,7 @@ static void __init imx6q_sabrelite_cko1_setup(void)
static void __init imx6q_sabrelite_init(void) static void __init imx6q_sabrelite_init(void)
{ {
if (IS_ENABLED(CONFIG_PHYLIB)) if (IS_BUILTIN(CONFIG_PHYLIB))
phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
ksz9021rn_phy_fixup); ksz9021rn_phy_fixup);
imx6q_sabrelite_cko1_setup(); imx6q_sabrelite_cko1_setup();
......
...@@ -7,7 +7,8 @@ dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns320.dtb ...@@ -7,7 +7,8 @@ dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns320.dtb
dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns325.dtb dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns325.dtb
dtb-$(CONFIG_MACH_ICONNECT_DT) += kirkwood-iconnect.dtb dtb-$(CONFIG_MACH_ICONNECT_DT) += kirkwood-iconnect.dtb
dtb-$(CONFIG_MACH_IB62X0_DT) += kirkwood-ib62x0.dtb dtb-$(CONFIG_MACH_IB62X0_DT) += kirkwood-ib62x0.dtb
dtb-$(CONFIG_MACH_TS219_DT) += kirkwood-qnap-ts219.dtb dtb-$(CONFIG_MACH_TS219_DT) += kirkwood-ts219-6281.dtb
dtb-$(CONFIG_MACH_TS219_DT) += kirkwood-ts219-6282.dtb
dtb-$(CONFIG_MACH_GOFLEXNET_DT) += kirkwood-goflexnet.dtb dtb-$(CONFIG_MACH_GOFLEXNET_DT) += kirkwood-goflexnet.dtb
dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lschlv2.dtb dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lschlv2.dtb
dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lsxhl.dtb dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lsxhl.dtb
...@@ -301,7 +301,7 @@ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data) ...@@ -301,7 +301,7 @@ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
{ {
orion_ge00_init(eth_data, orion_ge00_init(eth_data,
GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM, GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
IRQ_KIRKWOOD_GE00_ERR); IRQ_KIRKWOOD_GE00_ERR, 1600);
/* The interface forgets the MAC address assigned by u-boot if /* The interface forgets the MAC address assigned by u-boot if
the clock is turned off, so claim the clk now. */ the clock is turned off, so claim the clk now. */
clk_prepare_enable(ge0); clk_prepare_enable(ge0);
...@@ -315,7 +315,7 @@ void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data) ...@@ -315,7 +315,7 @@ void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
{ {
orion_ge01_init(eth_data, orion_ge01_init(eth_data,
GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM, GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
IRQ_KIRKWOOD_GE01_ERR); IRQ_KIRKWOOD_GE01_ERR, 1600);
clk_prepare_enable(ge1); clk_prepare_enable(ge1);
} }
......
...@@ -68,7 +68,7 @@ static int __devinit sram_probe(struct platform_device *pdev) ...@@ -68,7 +68,7 @@ static int __devinit sram_probe(struct platform_device *pdev)
struct resource *res; struct resource *res;
int ret = 0; int ret = 0;
if (!pdata && !pdata->pool_name) if (!pdata || !pdata->pool_name)
return -ENODEV; return -ENODEV;
info = kzalloc(sizeof(*info), GFP_KERNEL); info = kzalloc(sizeof(*info), GFP_KERNEL);
......
...@@ -37,7 +37,7 @@ ...@@ -37,7 +37,7 @@
#define WIN0_OFF(n) (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4)) #define WIN0_OFF(n) (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4))
#define WIN8_OFF(n) (BRIDGE_VIRT_BASE + 0x0900 + (((n) - 8) << 4)) #define WIN8_OFF(n) (BRIDGE_VIRT_BASE + 0x0900 + (((n) - 8) << 4))
static void __init __iomem *win_cfg_base(int win) static void __init __iomem *win_cfg_base(const struct orion_addr_map_cfg *cfg, int win)
{ {
/* /*
* Find the control register base address for this window. * Find the control register base address for this window.
......
...@@ -213,7 +213,8 @@ void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data) ...@@ -213,7 +213,8 @@ void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
{ {
orion_ge00_init(eth_data, orion_ge00_init(eth_data,
GE00_PHYS_BASE, IRQ_MV78XX0_GE00_SUM, GE00_PHYS_BASE, IRQ_MV78XX0_GE00_SUM,
IRQ_MV78XX0_GE_ERR); IRQ_MV78XX0_GE_ERR,
MV643XX_TX_CSUM_DEFAULT_LIMIT);
} }
...@@ -224,7 +225,8 @@ void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data) ...@@ -224,7 +225,8 @@ void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data)
{ {
orion_ge01_init(eth_data, orion_ge01_init(eth_data,
GE01_PHYS_BASE, IRQ_MV78XX0_GE01_SUM, GE01_PHYS_BASE, IRQ_MV78XX0_GE01_SUM,
NO_IRQ); NO_IRQ,
MV643XX_TX_CSUM_DEFAULT_LIMIT);
} }
......
...@@ -62,13 +62,14 @@ config ARCH_OMAP4 ...@@ -62,13 +62,14 @@ config ARCH_OMAP4
select PM_OPP if PM select PM_OPP if PM
select USB_ARCH_HAS_EHCI if USB_SUPPORT select USB_ARCH_HAS_EHCI if USB_SUPPORT
select ARM_CPU_SUSPEND if PM select ARM_CPU_SUSPEND if PM
select ARCH_NEEDS_CPU_IDLE_COUPLED select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
config SOC_OMAP5 config SOC_OMAP5
bool "TI OMAP5" bool "TI OMAP5"
select CPU_V7 select CPU_V7
select ARM_GIC select ARM_GIC
select HAVE_SMP select HAVE_SMP
select ARM_CPU_SUSPEND if PM
comment "OMAP Core Type" comment "OMAP Core Type"
depends on ARCH_OMAP2 depends on ARCH_OMAP2
......
...@@ -554,6 +554,8 @@ static const struct usbhs_omap_board_data igep3_usbhs_bdata __initconst = { ...@@ -554,6 +554,8 @@ static const struct usbhs_omap_board_data igep3_usbhs_bdata __initconst = {
#ifdef CONFIG_OMAP_MUX #ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = { static struct omap_board_mux board_mux[] __initdata = {
/* SMSC9221 LAN Controller ETH IRQ (GPIO_176) */
OMAP3_MUX(MCSPI1_CS2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
{ .reg_offset = OMAP_MUX_TERMINATOR }, { .reg_offset = OMAP_MUX_TERMINATOR },
}; };
#endif #endif
......
...@@ -58,6 +58,7 @@ ...@@ -58,6 +58,7 @@
#include "hsmmc.h" #include "hsmmc.h"
#include "common-board-devices.h" #include "common-board-devices.h"
#define OMAP3_EVM_TS_GPIO 175
#define OMAP3_EVM_EHCI_VBUS 22 #define OMAP3_EVM_EHCI_VBUS 22
#define OMAP3_EVM_EHCI_SELECT 61 #define OMAP3_EVM_EHCI_SELECT 61
......
...@@ -35,16 +35,6 @@ static struct omap2_mcspi_device_config ads7846_mcspi_config = { ...@@ -35,16 +35,6 @@ static struct omap2_mcspi_device_config ads7846_mcspi_config = {
.turbo_mode = 0, .turbo_mode = 0,
}; };
/*
* ADS7846 driver maybe request a gpio according to the value
* of pdata->get_pendown_state, but we have done this. So set
* get_pendown_state to avoid twice gpio requesting.
*/
static int omap3_get_pendown_state(void)
{
return !gpio_get_value(OMAP3_EVM_TS_GPIO);
}
static struct ads7846_platform_data ads7846_config = { static struct ads7846_platform_data ads7846_config = {
.x_max = 0x0fff, .x_max = 0x0fff,
.y_max = 0x0fff, .y_max = 0x0fff,
...@@ -55,7 +45,6 @@ static struct ads7846_platform_data ads7846_config = { ...@@ -55,7 +45,6 @@ static struct ads7846_platform_data ads7846_config = {
.debounce_rep = 1, .debounce_rep = 1,
.gpio_pendown = -EINVAL, .gpio_pendown = -EINVAL,
.keep_vref_on = 1, .keep_vref_on = 1,
.get_pendown_state = &omap3_get_pendown_state,
}; };
static struct spi_board_info ads7846_spi_board_info __initdata = { static struct spi_board_info ads7846_spi_board_info __initdata = {
......
...@@ -4,7 +4,6 @@ ...@@ -4,7 +4,6 @@
#include "twl-common.h" #include "twl-common.h"
#define NAND_BLOCK_SIZE SZ_128K #define NAND_BLOCK_SIZE SZ_128K
#define OMAP3_EVM_TS_GPIO 175
struct mtd_partition; struct mtd_partition;
struct ads7846_platform_data; struct ads7846_platform_data;
......
...@@ -238,8 +238,9 @@ int __init omap4_idle_init(void) ...@@ -238,8 +238,9 @@ int __init omap4_idle_init(void)
for_each_cpu(cpu_id, cpu_online_mask) { for_each_cpu(cpu_id, cpu_online_mask) {
dev = &per_cpu(omap4_idle_dev, cpu_id); dev = &per_cpu(omap4_idle_dev, cpu_id);
dev->cpu = cpu_id; dev->cpu = cpu_id;
#ifdef CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED
dev->coupled_cpus = *cpu_online_mask; dev->coupled_cpus = *cpu_online_mask;
#endif
cpuidle_register_driver(&omap4_idle_driver); cpuidle_register_driver(&omap4_idle_driver);
if (cpuidle_register_device(dev)) { if (cpuidle_register_device(dev)) {
......
...@@ -127,7 +127,6 @@ struct omap_mux_partition { ...@@ -127,7 +127,6 @@ struct omap_mux_partition {
* @gpio: GPIO number * @gpio: GPIO number
* @muxnames: available signal modes for a ball * @muxnames: available signal modes for a ball
* @balls: available balls on the package * @balls: available balls on the package
* @partition: mux partition
*/ */
struct omap_mux { struct omap_mux {
u16 reg_offset; u16 reg_offset;
......
...@@ -94,7 +94,7 @@ int __init omap4_opp_init(void) ...@@ -94,7 +94,7 @@ int __init omap4_opp_init(void)
{ {
int r = -ENODEV; int r = -ENODEV;
if (!cpu_is_omap44xx()) if (!cpu_is_omap443x())
return r; return r;
r = omap_init_opp_table(omap44xx_opp_def_list, r = omap_init_opp_table(omap44xx_opp_def_list,
......
...@@ -272,21 +272,16 @@ void omap_sram_idle(void) ...@@ -272,21 +272,16 @@ void omap_sram_idle(void)
per_next_state = pwrdm_read_next_pwrst(per_pwrdm); per_next_state = pwrdm_read_next_pwrst(per_pwrdm);
core_next_state = pwrdm_read_next_pwrst(core_pwrdm); core_next_state = pwrdm_read_next_pwrst(core_pwrdm);
if (mpu_next_state < PWRDM_POWER_ON) { pwrdm_pre_transition(NULL);
pwrdm_pre_transition(mpu_pwrdm);
pwrdm_pre_transition(neon_pwrdm);
}
/* PER */ /* PER */
if (per_next_state < PWRDM_POWER_ON) { if (per_next_state < PWRDM_POWER_ON) {
pwrdm_pre_transition(per_pwrdm);
per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0; per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
omap2_gpio_prepare_for_idle(per_going_off); omap2_gpio_prepare_for_idle(per_going_off);
} }
/* CORE */ /* CORE */
if (core_next_state < PWRDM_POWER_ON) { if (core_next_state < PWRDM_POWER_ON) {
pwrdm_pre_transition(core_pwrdm);
if (core_next_state == PWRDM_POWER_OFF) { if (core_next_state == PWRDM_POWER_OFF) {
omap3_core_save_context(); omap3_core_save_context();
omap3_cm_save_context(); omap3_cm_save_context();
...@@ -339,20 +334,14 @@ void omap_sram_idle(void) ...@@ -339,20 +334,14 @@ void omap_sram_idle(void)
omap2_prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF_MASK, omap2_prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF_MASK,
OMAP3430_GR_MOD, OMAP3430_GR_MOD,
OMAP3_PRM_VOLTCTRL_OFFSET); OMAP3_PRM_VOLTCTRL_OFFSET);
pwrdm_post_transition(core_pwrdm);
} }
omap3_intc_resume_idle(); omap3_intc_resume_idle();
pwrdm_post_transition(NULL);
/* PER */ /* PER */
if (per_next_state < PWRDM_POWER_ON) { if (per_next_state < PWRDM_POWER_ON)
omap2_gpio_resume_after_idle(); omap2_gpio_resume_after_idle();
pwrdm_post_transition(per_pwrdm);
}
if (mpu_next_state < PWRDM_POWER_ON) {
pwrdm_post_transition(mpu_pwrdm);
pwrdm_post_transition(neon_pwrdm);
}
} }
static void omap3_pm_idle(void) static void omap3_pm_idle(void)
......
...@@ -56,9 +56,13 @@ ppa_por_params: ...@@ -56,9 +56,13 @@ ppa_por_params:
* The restore function pointer is stored at CPUx_WAKEUP_NS_PA_ADDR_OFFSET. * The restore function pointer is stored at CPUx_WAKEUP_NS_PA_ADDR_OFFSET.
* It returns to the caller for CPU INACTIVE and ON power states or in case * It returns to the caller for CPU INACTIVE and ON power states or in case
* CPU failed to transition to targeted OFF/DORMANT state. * CPU failed to transition to targeted OFF/DORMANT state.
*
* omap4_finish_suspend() calls v7_flush_dcache_all() which doesn't save
* stack frame and it expects the caller to take care of it. Hence the entire
* stack frame is saved to avoid possible stack corruption.
*/ */
ENTRY(omap4_finish_suspend) ENTRY(omap4_finish_suspend)
stmfd sp!, {lr} stmfd sp!, {r4-r12, lr}
cmp r0, #0x0 cmp r0, #0x0
beq do_WFI @ No lowpower state, jump to WFI beq do_WFI @ No lowpower state, jump to WFI
...@@ -226,7 +230,7 @@ scu_gp_clear: ...@@ -226,7 +230,7 @@ scu_gp_clear:
skip_scu_gp_clear: skip_scu_gp_clear:
isb isb
dsb dsb
ldmfd sp!, {pc} ldmfd sp!, {r4-r12, pc}
ENDPROC(omap4_finish_suspend) ENDPROC(omap4_finish_suspend)
/* /*
......
...@@ -67,6 +67,7 @@ void __init omap_pmic_init(int bus, u32 clkrate, ...@@ -67,6 +67,7 @@ void __init omap_pmic_init(int bus, u32 clkrate,
const char *pmic_type, int pmic_irq, const char *pmic_type, int pmic_irq,
struct twl4030_platform_data *pmic_data) struct twl4030_platform_data *pmic_data)
{ {
omap_mux_init_signal("sys_nirq", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
strncpy(pmic_i2c_board_info.type, pmic_type, strncpy(pmic_i2c_board_info.type, pmic_type,
sizeof(pmic_i2c_board_info.type)); sizeof(pmic_i2c_board_info.type));
pmic_i2c_board_info.irq = pmic_irq; pmic_i2c_board_info.irq = pmic_irq;
......
...@@ -109,7 +109,8 @@ void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data) ...@@ -109,7 +109,8 @@ void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
{ {
orion_ge00_init(eth_data, orion_ge00_init(eth_data,
ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM, ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM,
IRQ_ORION5X_ETH_ERR); IRQ_ORION5X_ETH_ERR,
MV643XX_TX_CSUM_DEFAULT_LIMIT);
} }
......
...@@ -24,7 +24,8 @@ ...@@ -24,7 +24,8 @@
*/ */
enum dma_ch { enum dma_ch {
DMACH_XD0, DMACH_DT_PROP = -1, /* not yet supported, do not use */
DMACH_XD0 = 0,
DMACH_XD1, DMACH_XD1,
DMACH_SDI, DMACH_SDI,
DMACH_SPI0, DMACH_SPI0,
......
...@@ -41,7 +41,6 @@ config MACH_HREFV60 ...@@ -41,7 +41,6 @@ config MACH_HREFV60
config MACH_SNOWBALL config MACH_SNOWBALL
bool "U8500 Snowball platform" bool "U8500 Snowball platform"
select MACH_MOP500 select MACH_MOP500
select LEDS_GPIO
help help
Include support for the snowball development platform. Include support for the snowball development platform.
......
...@@ -191,9 +191,9 @@ static struct platform_device *db8500_add_msp_i2s(struct device *parent, ...@@ -191,9 +191,9 @@ static struct platform_device *db8500_add_msp_i2s(struct device *parent,
return pdev; return pdev;
} }
/* Platform device for ASoC U8500 machine */ /* Platform device for ASoC MOP500 machine */
static struct platform_device snd_soc_u8500 = { static struct platform_device snd_soc_mop500 = {
.name = "snd-soc-u8500", .name = "snd-soc-mop500",
.id = 0, .id = 0,
.dev = { .dev = {
.platform_data = NULL, .platform_data = NULL,
...@@ -227,8 +227,8 @@ int mop500_msp_init(struct device *parent) ...@@ -227,8 +227,8 @@ int mop500_msp_init(struct device *parent)
{ {
struct platform_device *msp1; struct platform_device *msp1;
pr_info("%s: Register platform-device 'snd-soc-u8500'.\n", __func__); pr_info("%s: Register platform-device 'snd-soc-mop500'.\n", __func__);
platform_device_register(&snd_soc_u8500); platform_device_register(&snd_soc_mop500);
pr_info("Initialize MSP I2S-devices.\n"); pr_info("Initialize MSP I2S-devices.\n");
db8500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0, db8500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0,
......
...@@ -797,6 +797,7 @@ static void __init u8500_init_machine(void) ...@@ -797,6 +797,7 @@ static void __init u8500_init_machine(void)
ARRAY_SIZE(mop500_platform_devs)); ARRAY_SIZE(mop500_platform_devs));
mop500_sdi_init(parent); mop500_sdi_init(parent);
mop500_msp_init(parent);
i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices); i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs); i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
i2c_register_board_info(2, mop500_i2c2_devices, i2c_register_board_info(2, mop500_i2c2_devices,
...@@ -804,6 +805,8 @@ static void __init u8500_init_machine(void) ...@@ -804,6 +805,8 @@ static void __init u8500_init_machine(void)
mop500_uib_init(); mop500_uib_init();
} else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
mop500_msp_init(parent);
} else if (of_machine_is_compatible("st-ericsson,hrefv60+")) { } else if (of_machine_is_compatible("st-ericsson,hrefv60+")) {
/* /*
* The HREFv60 board removed a GPIO expander and routed * The HREFv60 board removed a GPIO expander and routed
...@@ -815,6 +818,7 @@ static void __init u8500_init_machine(void) ...@@ -815,6 +818,7 @@ static void __init u8500_init_machine(void)
ARRAY_SIZE(mop500_platform_devs)); ARRAY_SIZE(mop500_platform_devs));
hrefv60_sdi_init(parent); hrefv60_sdi_init(parent);
mop500_msp_init(parent);
i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices); i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES; i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
......
...@@ -189,6 +189,7 @@ struct omap_dm_timer *omap_dm_timer_request(void) ...@@ -189,6 +189,7 @@ struct omap_dm_timer *omap_dm_timer_request(void)
timer->reserved = 1; timer->reserved = 1;
break; break;
} }
spin_unlock_irqrestore(&dm_timer_lock, flags);
if (timer) { if (timer) {
ret = omap_dm_timer_prepare(timer); ret = omap_dm_timer_prepare(timer);
...@@ -197,7 +198,6 @@ struct omap_dm_timer *omap_dm_timer_request(void) ...@@ -197,7 +198,6 @@ struct omap_dm_timer *omap_dm_timer_request(void)
timer = NULL; timer = NULL;
} }
} }
spin_unlock_irqrestore(&dm_timer_lock, flags);
if (!timer) if (!timer)
pr_debug("%s: timer request failed!\n", __func__); pr_debug("%s: timer request failed!\n", __func__);
...@@ -220,6 +220,7 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id) ...@@ -220,6 +220,7 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
break; break;
} }
} }
spin_unlock_irqrestore(&dm_timer_lock, flags);
if (timer) { if (timer) {
ret = omap_dm_timer_prepare(timer); ret = omap_dm_timer_prepare(timer);
...@@ -228,7 +229,6 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id) ...@@ -228,7 +229,6 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
timer = NULL; timer = NULL;
} }
} }
spin_unlock_irqrestore(&dm_timer_lock, flags);
if (!timer) if (!timer)
pr_debug("%s: timer%d request failed!\n", __func__, id); pr_debug("%s: timer%d request failed!\n", __func__, id);
...@@ -258,7 +258,7 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_enable); ...@@ -258,7 +258,7 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_enable);
void omap_dm_timer_disable(struct omap_dm_timer *timer) void omap_dm_timer_disable(struct omap_dm_timer *timer)
{ {
pm_runtime_put(&timer->pdev->dev); pm_runtime_put_sync(&timer->pdev->dev);
} }
EXPORT_SYMBOL_GPL(omap_dm_timer_disable); EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
......
...@@ -372,7 +372,8 @@ IS_OMAP_TYPE(3430, 0x3430) ...@@ -372,7 +372,8 @@ IS_OMAP_TYPE(3430, 0x3430)
#define cpu_class_is_omap1() (cpu_is_omap7xx() || cpu_is_omap15xx() || \ #define cpu_class_is_omap1() (cpu_is_omap7xx() || cpu_is_omap15xx() || \
cpu_is_omap16xx()) cpu_is_omap16xx())
#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx() || \ #define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx() || \
cpu_is_omap44xx() || soc_is_omap54xx()) cpu_is_omap44xx() || soc_is_omap54xx() || \
soc_is_am33xx())
/* Various silicon revisions for omap2 */ /* Various silicon revisions for omap2 */
#define OMAP242X_CLASS 0x24200024 #define OMAP242X_CLASS 0x24200024
......
...@@ -108,4 +108,13 @@ ...@@ -108,4 +108,13 @@
# endif # endif
#endif #endif
#ifdef CONFIG_SOC_AM33XX
# ifdef OMAP_NAME
# undef MULTI_OMAP2
# define MULTI_OMAP2
# else
# define OMAP_NAME am33xx
# endif
#endif
#endif /* __PLAT_OMAP_MULTI_H */ #endif /* __PLAT_OMAP_MULTI_H */
...@@ -110,7 +110,7 @@ static inline void flush(void) ...@@ -110,7 +110,7 @@ static inline void flush(void)
_DEBUG_LL_ENTRY(mach, AM33XX_UART##p##_BASE, OMAP_PORT_SHIFT, \ _DEBUG_LL_ENTRY(mach, AM33XX_UART##p##_BASE, OMAP_PORT_SHIFT, \
AM33XXUART##p) AM33XXUART##p)
static inline void __arch_decomp_setup(unsigned long arch_id) static inline void arch_decomp_setup(void)
{ {
int port = 0; int port = 0;
...@@ -198,8 +198,6 @@ static inline void __arch_decomp_setup(unsigned long arch_id) ...@@ -198,8 +198,6 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
} while (0); } while (0);
} }
#define arch_decomp_setup() __arch_decomp_setup(arch_id)
/* /*
* nothing to do * nothing to do
*/ */
......
...@@ -291,10 +291,12 @@ static struct platform_device orion_ge00 = { ...@@ -291,10 +291,12 @@ static struct platform_device orion_ge00 = {
void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
unsigned long mapbase, unsigned long mapbase,
unsigned long irq, unsigned long irq,
unsigned long irq_err) unsigned long irq_err,
unsigned int tx_csum_limit)
{ {
fill_resources(&orion_ge00_shared, orion_ge00_shared_resources, fill_resources(&orion_ge00_shared, orion_ge00_shared_resources,
mapbase + 0x2000, SZ_16K - 1, irq_err); mapbase + 0x2000, SZ_16K - 1, irq_err);
orion_ge00_shared_data.tx_csum_limit = tx_csum_limit;
ge_complete(&orion_ge00_shared_data, ge_complete(&orion_ge00_shared_data,
orion_ge00_resources, irq, &orion_ge00_shared, orion_ge00_resources, irq, &orion_ge00_shared,
eth_data, &orion_ge00); eth_data, &orion_ge00);
...@@ -343,10 +345,12 @@ static struct platform_device orion_ge01 = { ...@@ -343,10 +345,12 @@ static struct platform_device orion_ge01 = {
void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
unsigned long mapbase, unsigned long mapbase,
unsigned long irq, unsigned long irq,
unsigned long irq_err) unsigned long irq_err,
unsigned int tx_csum_limit)
{ {
fill_resources(&orion_ge01_shared, orion_ge01_shared_resources, fill_resources(&orion_ge01_shared, orion_ge01_shared_resources,
mapbase + 0x2000, SZ_16K - 1, irq_err); mapbase + 0x2000, SZ_16K - 1, irq_err);
orion_ge01_shared_data.tx_csum_limit = tx_csum_limit;
ge_complete(&orion_ge01_shared_data, ge_complete(&orion_ge01_shared_data,
orion_ge01_resources, irq, &orion_ge01_shared, orion_ge01_resources, irq, &orion_ge01_shared,
eth_data, &orion_ge01); eth_data, &orion_ge01);
......
...@@ -39,12 +39,14 @@ void __init orion_rtc_init(unsigned long mapbase, ...@@ -39,12 +39,14 @@ void __init orion_rtc_init(unsigned long mapbase,
void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
unsigned long mapbase, unsigned long mapbase,
unsigned long irq, unsigned long irq,
unsigned long irq_err); unsigned long irq_err,
unsigned int tx_csum_limit);
void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
unsigned long mapbase, unsigned long mapbase,
unsigned long irq, unsigned long irq,
unsigned long irq_err); unsigned long irq_err,
unsigned int tx_csum_limit);
void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,
unsigned long mapbase, unsigned long mapbase,
......
...@@ -430,7 +430,7 @@ s3c2410_dma_canload(struct s3c2410_dma_chan *chan) ...@@ -430,7 +430,7 @@ s3c2410_dma_canload(struct s3c2410_dma_chan *chan)
* when necessary. * when necessary.
*/ */
int s3c2410_dma_enqueue(unsigned int channel, void *id, int s3c2410_dma_enqueue(enum dma_ch channel, void *id,
dma_addr_t data, int size) dma_addr_t data, int size)
{ {
struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel);
......
...@@ -32,6 +32,8 @@ ...@@ -32,6 +32,8 @@
#include <linux/platform_data/s3c-hsudc.h> #include <linux/platform_data/s3c-hsudc.h>
#include <linux/platform_data/s3c-hsotg.h> #include <linux/platform_data/s3c-hsotg.h>
#include <media/s5p_hdmi.h>
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/pmu.h> #include <asm/pmu.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
...@@ -748,7 +750,8 @@ void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd) ...@@ -748,7 +750,8 @@ void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
if (!pd) { if (!pd) {
pd = &default_i2c_data; pd = &default_i2c_data;
if (soc_is_exynos4210()) if (soc_is_exynos4210() ||
soc_is_exynos4212() || soc_is_exynos4412())
pd->bus_num = 8; pd->bus_num = 8;
else if (soc_is_s5pv210()) else if (soc_is_s5pv210())
pd->bus_num = 3; pd->bus_num = 3;
...@@ -759,6 +762,30 @@ void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd) ...@@ -759,6 +762,30 @@ void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
&s5p_device_i2c_hdmiphy); &s5p_device_i2c_hdmiphy);
} }
struct s5p_hdmi_platform_data s5p_hdmi_def_platdata;
void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
struct i2c_board_info *mhl_info, int mhl_bus)
{
struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
if (soc_is_exynos4210() ||
soc_is_exynos4212() || soc_is_exynos4412())
pd->hdmiphy_bus = 8;
else if (soc_is_s5pv210())
pd->hdmiphy_bus = 3;
else
pd->hdmiphy_bus = 0;
pd->hdmiphy_info = hdmiphy_info;
pd->mhl_info = mhl_info;
pd->mhl_bus = mhl_bus;
s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data),
&s5p_device_hdmi);
}
#endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */ #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
/* I2S */ /* I2S */
......
/*
* Copyright (C) 2012 Samsung Electronics Co.Ltd
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __PLAT_SAMSUNG_HDMI_H
#define __PLAT_SAMSUNG_HDMI_H __FILE__
extern void s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
struct i2c_board_info *mhl_info, int mhl_bus);
#endif /* __PLAT_SAMSUNG_HDMI_H */
...@@ -74,7 +74,7 @@ unsigned char pm_uart_udivslot; ...@@ -74,7 +74,7 @@ unsigned char pm_uart_udivslot;
#ifdef CONFIG_SAMSUNG_PM_DEBUG #ifdef CONFIG_SAMSUNG_PM_DEBUG
struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS]; static struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];
static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save) static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
{ {
......
...@@ -218,7 +218,7 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) ...@@ -218,7 +218,7 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy)
policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu); policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu);
if (atomic_inc_return(&freq_table_users) == 1) if (!freq_table)
result = opp_init_cpufreq_table(mpu_dev, &freq_table); result = opp_init_cpufreq_table(mpu_dev, &freq_table);
if (result) { if (result) {
...@@ -227,6 +227,8 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) ...@@ -227,6 +227,8 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy)
goto fail_ck; goto fail_ck;
} }
atomic_inc_return(&freq_table_users);
result = cpufreq_frequency_table_cpuinfo(policy, freq_table); result = cpufreq_frequency_table_cpuinfo(policy, freq_table);
if (result) if (result)
goto fail_table; goto fail_table;
......
...@@ -194,6 +194,10 @@ static inline int cpuidle_play_dead(void) {return -ENODEV; } ...@@ -194,6 +194,10 @@ static inline int cpuidle_play_dead(void) {return -ENODEV; }
#ifdef CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED #ifdef CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED
void cpuidle_coupled_parallel_barrier(struct cpuidle_device *dev, atomic_t *a); void cpuidle_coupled_parallel_barrier(struct cpuidle_device *dev, atomic_t *a);
#else
static inline void cpuidle_coupled_parallel_barrier(struct cpuidle_device *dev, atomic_t *a)
{
}
#endif #endif
/****************************** /******************************
......
...@@ -15,6 +15,8 @@ ...@@ -15,6 +15,8 @@
#define MV643XX_ETH_SIZE_REG_4 0x2224 #define MV643XX_ETH_SIZE_REG_4 0x2224
#define MV643XX_ETH_BASE_ADDR_ENABLE_REG 0x2290 #define MV643XX_ETH_BASE_ADDR_ENABLE_REG 0x2290
#define MV643XX_TX_CSUM_DEFAULT_LIMIT 0
struct mv643xx_eth_shared_platform_data { struct mv643xx_eth_shared_platform_data {
struct mbus_dram_target_info *dram; struct mbus_dram_target_info *dram;
struct platform_device *shared_smi; struct platform_device *shared_smi;
......
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