Commit 9b6f7e7a authored by Sameer Pujar's avatar Sameer Pujar Committed by Takashi Iwai

ALSA: hda: program stripe bits for controller

Platforms having multiple SORs and hdmi/dp sinks require higher
bandwidth to support simultaneous playbacks of higher resolution.
If hda controller supports multiple SDO lines, STRIPE can be used
to indicate how many of the SDO lines the stream should be striped
across.

During stream start stripe control bits are programmed to use given
number of sdo lines and the same is cleared during stream stop.
Signed-off-by: default avatarSameer Pujar <spujar@nvidia.com>
Reviewed-by: default avatarMohan Kumar D <mkumard@nvidia.com>
Reviewed-by: default avatarRavindra Lokhande <rlokhande@nvidia.com>
Reviewed-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
parent b59c8e7a
...@@ -82,6 +82,7 @@ EXPORT_SYMBOL_GPL(snd_hdac_stream_init); ...@@ -82,6 +82,7 @@ EXPORT_SYMBOL_GPL(snd_hdac_stream_init);
void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start) void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start)
{ {
struct hdac_bus *bus = azx_dev->bus; struct hdac_bus *bus = azx_dev->bus;
int stripe_ctl;
trace_snd_hdac_stream_start(bus, azx_dev); trace_snd_hdac_stream_start(bus, azx_dev);
...@@ -93,6 +94,10 @@ void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start) ...@@ -93,6 +94,10 @@ void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start)
snd_hdac_chip_updatel(bus, INTCTL, snd_hdac_chip_updatel(bus, INTCTL,
1 << azx_dev->index, 1 << azx_dev->index,
1 << azx_dev->index); 1 << azx_dev->index);
/* set stripe control */
stripe_ctl = snd_hdac_get_stream_stripe_ctl(bus, azx_dev->substream);
snd_hdac_stream_updateb(azx_dev, SD_CTL_3B, SD_CTL_STRIPE_MASK,
stripe_ctl);
/* set DMA start and interrupt mask */ /* set DMA start and interrupt mask */
snd_hdac_stream_updateb(azx_dev, SD_CTL, snd_hdac_stream_updateb(azx_dev, SD_CTL,
0, SD_CTL_DMA_START | SD_INT_MASK); 0, SD_CTL_DMA_START | SD_INT_MASK);
...@@ -109,6 +114,7 @@ void snd_hdac_stream_clear(struct hdac_stream *azx_dev) ...@@ -109,6 +114,7 @@ void snd_hdac_stream_clear(struct hdac_stream *azx_dev)
snd_hdac_stream_updateb(azx_dev, SD_CTL, snd_hdac_stream_updateb(azx_dev, SD_CTL,
SD_CTL_DMA_START | SD_INT_MASK, 0); SD_CTL_DMA_START | SD_INT_MASK, 0);
snd_hdac_stream_writeb(azx_dev, SD_STS, SD_INT_MASK); /* to be sure */ snd_hdac_stream_writeb(azx_dev, SD_STS, SD_INT_MASK); /* to be sure */
snd_hdac_stream_updateb(azx_dev, SD_CTL_3B, SD_CTL_STRIPE_MASK, 0);
azx_dev->running = false; azx_dev->running = false;
} }
EXPORT_SYMBOL_GPL(snd_hdac_stream_clear); EXPORT_SYMBOL_GPL(snd_hdac_stream_clear);
......
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