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Kirill Smelkov
linux
Commits
9bb7361d
Commit
9bb7361d
authored
Aug 30, 2011
by
Benjamin Herrenschmidt
Browse files
Options
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Plain Diff
Merge remote-tracking branch 'jwb/next' into next
parents
c6a389f1
9fcd768d
Changes
13
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Showing
13 changed files
with
294 additions
and
339 deletions
+294
-339
arch/powerpc/Kconfig
arch/powerpc/Kconfig
+1
-1
arch/powerpc/boot/dts/hcu4.dts
arch/powerpc/boot/dts/hcu4.dts
+0
-168
arch/powerpc/boot/dts/yosemite.dts
arch/powerpc/boot/dts/yosemite.dts
+36
-0
arch/powerpc/configs/40x/hcu4_defconfig
arch/powerpc/configs/40x/hcu4_defconfig
+0
-80
arch/powerpc/configs/ppc40x_defconfig
arch/powerpc/configs/ppc40x_defconfig
+0
-1
arch/powerpc/include/asm/kexec.h
arch/powerpc/include/asm/kexec.h
+1
-1
arch/powerpc/kernel/misc_32.S
arch/powerpc/kernel/misc_32.S
+171
-0
arch/powerpc/platforms/40x/Kconfig
arch/powerpc/platforms/40x/Kconfig
+0
-8
arch/powerpc/platforms/40x/Makefile
arch/powerpc/platforms/40x/Makefile
+0
-1
arch/powerpc/platforms/40x/hcu4.c
arch/powerpc/platforms/40x/hcu4.c
+0
-61
arch/powerpc/sysdev/ppc4xx_pci.c
arch/powerpc/sysdev/ppc4xx_pci.c
+72
-17
arch/powerpc/sysdev/ppc4xx_pci.h
arch/powerpc/sysdev/ppc4xx_pci.h
+12
-0
drivers/edac/ppc4xx_edac.c
drivers/edac/ppc4xx_edac.c
+1
-1
No files found.
arch/powerpc/Kconfig
View file @
9bb7361d
...
@@ -345,7 +345,7 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE
...
@@ -345,7 +345,7 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE
config KEXEC
config KEXEC
bool "kexec system call (EXPERIMENTAL)"
bool "kexec system call (EXPERIMENTAL)"
depends on (PPC_BOOK3S || FSL_BOOKE) && EXPERIMENTAL
depends on (PPC_BOOK3S || FSL_BOOKE
|| (44x && !SMP && !47x)
) && EXPERIMENTAL
help
help
kexec is a system call that implements the ability to shutdown your
kexec is a system call that implements the ability to shutdown your
current kernel, and to start another kernel. It is like a reboot
current kernel, and to start another kernel. It is like a reboot
...
...
arch/powerpc/boot/dts/hcu4.dts
deleted
100644 → 0
View file @
c6a389f1
/*
*
Device
Tree
Source
for
Netstal
Maschinen
HCU4
*
based
on
the
IBM
Walnut
*
*
Copyright
2008
*
Niklaus
Giger
<
niklaus
.
giger
@
member
.
fsf
.
org
>
*
*
Copyright
2007
IBM
Corp
.
*
Josh
Boyer
<
jwboyer
@
linux
.
vnet
.
ibm
.
com
>
*
*
This
file
is
licensed
under
the
terms
of
the
GNU
General
Public
*
License
version
2.
This
program
is
licensed
"as is"
without
*
any
warranty
of
any
kind
,
whether
express
or
implied
.
*/
/
dts
-
v1
/;
/
{
#
address
-
cells
=
<
0x1
>;
#
size
-
cells
=
<
0x1
>;
model
=
"netstal,hcu4"
;
compatible
=
"netstal,hcu4"
;
dcr
-
parent
=
<
0x1
>;
aliases
{
ethernet0
=
"/plb/opb/ethernet@ef600800"
;
serial0
=
"/plb/opb/serial@ef600300"
;
};
cpus
{
#
address
-
cells
=
<
0x1
>;
#
size
-
cells
=
<
0x0
>;
cpu
@
0
{
device_type
=
"cpu"
;
model
=
"PowerPC,405GPr"
;
reg
=
<
0x0
>;
clock
-
frequency
=
<
0
>;
/*
Filled
in
by
U
-
Boot
*/
timebase
-
frequency
=
<
0x0
>;
/*
Filled
in
by
U
-
Boot
*/
i
-
cache
-
line
-
size
=
<
0x20
>;
d
-
cache
-
line
-
size
=
<
0x20
>;
i
-
cache
-
size
=
<
0x4000
>;
d
-
cache
-
size
=
<
0x4000
>;
dcr
-
controller
;
dcr
-
access
-
method
=
"native"
;
linux
,
phandle
=
<
0x1
>;
};
};
memory
{
device_type
=
"memory"
;
reg
=
<
0x0
0x0
>;
/*
Filled
in
by
U
-
Boot
*/
};
UIC0
:
interrupt
-
controller
{
compatible
=
"ibm,uic"
;
interrupt
-
controller
;
cell
-
index
=
<
0x0
>;
dcr
-
reg
=
<
0xc0
0x9
>;
#
address
-
cells
=
<
0x0
>;
#
size
-
cells
=
<
0x0
>;
#
interrupt
-
cells
=
<
0x2
>;
linux
,
phandle
=
<
0x2
>;
};
plb
{
compatible
=
"ibm,plb3"
;
#
address
-
cells
=
<
0x1
>;
#
size
-
cells
=
<
0x1
>;
ranges
;
clock
-
frequency
=
<
0x0
>;
/*
Filled
in
by
U
-
Boot
*/
SDRAM0
:
memory
-
controller
{
compatible
=
"ibm,sdram-405gp"
;
dcr
-
reg
=
<
0x10
0x2
>;
};
MAL
:
mcmal
{
compatible
=
"ibm,mcmal-405gp"
,
"ibm,mcmal"
;
dcr
-
reg
=
<
0x180
0x62
>;
num
-
tx
-
chans
=
<
0x1
>;
num
-
rx
-
chans
=
<
0x1
>;
interrupt
-
parent
=
<
0x2
>;
interrupts
=
<
0xb
0x4
0xc
0x4
0xa
0x4
0xd
0x4
0xe
0x4
>;
linux
,
phandle
=
<
0x3
>;
};
POB0
:
opb
{
compatible
=
"ibm,opb-405gp"
,
"ibm,opb"
;
#
address
-
cells
=
<
0x1
>;
#
size
-
cells
=
<
0x1
>;
ranges
=
<
0xef600000
0xef600000
0xa00000
>;
dcr
-
reg
=
<
0xa0
0x5
>;
clock
-
frequency
=
<
0x0
>;
/*
Filled
in
by
U
-
Boot
*/
UART0
:
serial
@
ef600300
{
device_type
=
"serial"
;
compatible
=
"ns16550"
;
reg
=
<
0xef600300
0x8
>;
virtual
-
reg
=
<
0xef600300
>;
clock
-
frequency
=
<
0x0
>;/*
Filled
in
by
U
-
Boot
*/
current
-
speed
=
<
0
>;
/*
Filled
in
by
U
-
Boot
*/
interrupt
-
parent
=
<
0x2
>;
interrupts
=
<
0x0
0x4
>;
};
IIC
:
i2c
@
ef600500
{
compatible
=
"ibm,iic-405gp"
,
"ibm,iic"
;
reg
=
<
0xef600500
0x11
>;
interrupt
-
parent
=
<
0x2
>;
interrupts
=
<
0x2
0x4
>;
};
GPIO
:
gpio
@
ef600700
{
compatible
=
"ibm,gpio-405gp"
;
reg
=
<
0xef600700
0x20
>;
};
EMAC
:
ethernet
@
ef600800
{
device_type
=
"network"
;
compatible
=
"ibm,emac-405gp"
,
"ibm,emac"
;
interrupt
-
parent
=
<
0x2
>;
interrupts
=
<
0xf
0x4
0x9
0x4
>;
local
-
mac
-
address
=
[
00
00
00
00
00
00
];
reg
=
<
0xef600800
0x70
>;
mal
-
device
=
<
0x3
>;
mal
-
tx
-
channel
=
<
0x0
>;
mal
-
rx
-
channel
=
<
0x0
>;
cell
-
index
=
<
0x0
>;
max
-
frame
-
size
=
<
0x5dc
>;
rx
-
fifo
-
size
=
<
0x1000
>;
tx
-
fifo
-
size
=
<
0x800
>;
phy
-
mode
=
"rmii"
;
phy
-
map
=
<
0x1
>;
};
};
EBC0
:
ebc
{
compatible
=
"ibm,ebc-405gp"
,
"ibm,ebc"
;
dcr
-
reg
=
<
0x12
0x2
>;
#
address
-
cells
=
<
0x2
>;
#
size
-
cells
=
<
0x1
>;
clock
-
frequency
=
<
0x0
>;
/*
Filled
in
by
U
-
Boot
*/
sram
@
0
,
0
{
reg
=
<
0x0
0x0
0x80000
>;
};
flash
@
0
,
80000
{
compatible
=
"jedec-flash"
;
bank
-
width
=
<
0x1
>;
reg
=
<
0x0
0x80000
0x80000
>;
#
address
-
cells
=
<
0x1
>;
#
size
-
cells
=
<
0x1
>;
partition
@
0
{
label
=
"OpenBIOS"
;
reg
=
<
0x0
0x80000
>;
read
-
only
;
};
};
};
};
chosen
{
linux
,
stdout
-
path
=
"/plb/opb/serial@ef600300"
;
};
};
arch/powerpc/boot/dts/yosemite.dts
View file @
9bb7361d
...
@@ -138,6 +138,42 @@ EBC0: ebc {
...
@@ -138,6 +138,42 @@ EBC0: ebc {
clock-frequency = <0>; /* Filled in by zImage */
clock-frequency = <0>; /* Filled in by zImage */
interrupts = <0x5 0x1>;
interrupts = <0x5 0x1>;
interrupt-parent = <&UIC1>;
interrupt-parent = <&UIC1>;
nor_flash@0,0 {
compatible = "amd,s29gl256n", "cfi-flash";
bank-width = <2>;
reg = <0x00000000 0x00000000 0x04000000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0x00000000 0x001e0000>;
};
partition@1e0000 {
label = "dtb";
reg = <0x001e0000 0x00020000>;
};
partition@200000 {
label = "ramdisk";
reg = <0x00200000 0x01400000>;
};
partition@1600000 {
label = "jffs2";
reg = <0x01600000 0x00400000>;
};
partition@1a00000 {
label = "user";
reg = <0x01a00000 0x02540000>;
};
partition@3f40000 {
label = "env";
reg = <0x03f40000 0x00040000>;
};
partition@3f80000 {
label = "u-boot";
reg = <0x03f80000 0x00080000>;
};
};
};
};
UART0: serial@ef600300 {
UART0: serial@ef600300 {
...
...
arch/powerpc/configs/40x/hcu4_defconfig
deleted
100644 → 0
View file @
c6a389f1
CONFIG_40x=y
CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_EXPERT=y
CONFIG_KALLSYMS_ALL=y
CONFIG_KALLSYMS_EXTRA_PASS=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_HCU4=y
# CONFIG_WALNUT is not set
CONFIG_SPARSE_IRQ=y
CONFIG_PCI=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_IPV6 is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_CONNECTOR=y
CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_OF_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=m
CONFIG_MTD_CFI=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_PHYSMAP_OF=y
CONFIG_PROC_DEVICETREE=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=35000
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_IBM_NEW_EMAC=y
# CONFIG_INPUT is not set
# CONFIG_SERIO is not set
# CONFIG_VT is not set
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set
CONFIG_VIDEO_OUTPUT_CONTROL=m
# CONFIG_USB_SUPPORT is not set
CONFIG_EXT2_FS=y
CONFIG_INOTIFY=y
CONFIG_PROC_KCORE=y
CONFIG_TMPFS=y
CONFIG_CRAMFS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DETECT_HUNG_TASK=y
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
CONFIG_SYSCTL_SYSCALL_CHECK=y
CONFIG_CRYPTO=y
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_PCBC=y
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
arch/powerpc/configs/ppc40x_defconfig
View file @
9bb7361d
...
@@ -14,7 +14,6 @@ CONFIG_MODULE_UNLOAD=y
...
@@ -14,7 +14,6 @@ CONFIG_MODULE_UNLOAD=y
CONFIG_PPC4xx_GPIO=y
CONFIG_PPC4xx_GPIO=y
CONFIG_ACADIA=y
CONFIG_ACADIA=y
CONFIG_EP405=y
CONFIG_EP405=y
CONFIG_HCU4=y
CONFIG_HOTFOOT=y
CONFIG_HOTFOOT=y
CONFIG_KILAUEA=y
CONFIG_KILAUEA=y
CONFIG_MAKALU=y
CONFIG_MAKALU=y
...
...
arch/powerpc/include/asm/kexec.h
View file @
9bb7361d
...
@@ -2,7 +2,7 @@
...
@@ -2,7 +2,7 @@
#define _ASM_POWERPC_KEXEC_H
#define _ASM_POWERPC_KEXEC_H
#ifdef __KERNEL__
#ifdef __KERNEL__
#if
def CONFIG_FSL_BOOKE
#if
defined(CONFIG_FSL_BOOKE) || defined(CONFIG_44x)
/*
/*
* On FSL-BookE we setup a 1:1 mapping which covers the first 2GiB of memory
* On FSL-BookE we setup a 1:1 mapping which covers the first 2GiB of memory
...
...
arch/powerpc/kernel/misc_32.S
View file @
9bb7361d
...
@@ -8,6 +8,8 @@
...
@@ -8,6 +8,8 @@
*
kexec
bits
:
*
kexec
bits
:
*
Copyright
(
C
)
2002
-
2003
Eric
Biederman
<
ebiederm
@
xmission
.
com
>
*
Copyright
(
C
)
2002
-
2003
Eric
Biederman
<
ebiederm
@
xmission
.
com
>
*
GameCube
/
ppc32
port
Copyright
(
C
)
2004
Albert
Herranz
*
GameCube
/
ppc32
port
Copyright
(
C
)
2004
Albert
Herranz
*
PPC44x
port
.
Copyright
(
C
)
2011
,
IBM
Corporation
*
Author
:
Suzuki
Poulose
<
suzuki
@
in
.
ibm
.
com
>
*
*
*
This
program
is
free
software
; you can redistribute it and/or
*
This
program
is
free
software
; you can redistribute it and/or
*
modify
it
under
the
terms
of
the
GNU
General
Public
License
*
modify
it
under
the
terms
of
the
GNU
General
Public
License
...
@@ -735,6 +737,175 @@ relocate_new_kernel:
...
@@ -735,6 +737,175 @@ relocate_new_kernel:
mr
r4
,
r30
mr
r4
,
r30
mr
r5
,
r31
mr
r5
,
r31
li
r0
,
0
#elif defined(CONFIG_44x) && !defined(CONFIG_47x)
/*
*
Code
for
setting
up
1
:
1
mapping
for
PPC440x
for
KEXEC
*
*
We
cannot
switch
off
the
MMU
on
PPC44x
.
*
So
we
:
*
1
)
Invalidate
all
the
mappings
except
the
one
we
are
running
from
.
*
2
)
Create
a
tmp
mapping
for
our
code
in
the
other
address
space
(
TS
)
and
*
jump
to
it
.
Invalidate
the
entry
we
started
in
.
*
3
)
Create
a
1
:
1
mapping
for
0
-
2
GiB
in
chunks
of
256
M
in
original
TS
.
*
4
)
Jump
to
the
1
:
1
mapping
in
original
TS
.
*
5
)
Invalidate
the
tmp
mapping
.
*
*
-
Based
on
the
kexec
support
code
for
FSL
BookE
*
-
Doesn
't support 47x yet.
*
*/
/
*
Save
our
parameters
*/
mr
r29
,
r3
mr
r30
,
r4
mr
r31
,
r5
/
*
Load
our
MSR_IS
and
TID
to
MMUCR
for
TLB
search
*/
mfspr
r3
,
SPRN_PID
mfmsr
r4
andi
.
r4
,
r4
,
MSR_IS
@
l
beq
wmmucr
oris
r3
,
r3
,
PPC44x_MMUCR_STS
@
h
wmmucr
:
mtspr
SPRN_MMUCR
,
r3
sync
/
*
*
Invalidate
all
the
TLB
entries
except
the
current
entry
*
where
we
are
running
from
*/
bl
0
f
/*
Find
our
address
*/
0
:
mflr
r5
/*
Make
it
accessible
*/
tlbsx
r23
,
0
,
r5
/*
Find
entry
we
are
in
*/
li
r4
,
0
/*
Start
at
TLB
entry
0
*/
li
r3
,
0
/*
Set
PAGEID
inval
value
*/
1
:
cmpw
r23
,
r4
/*
Is
this
our
entry
?
*/
beq
skip
/*
If
so
,
skip
the
inval
*/
tlbwe
r3
,
r4
,
PPC44x_TLB_PAGEID
/*
If
not
,
inval
the
entry
*/
skip
:
addi
r4
,
r4
,
1
/*
Increment
*/
cmpwi
r4
,
64
/*
Are
we
done
?
*/
bne
1
b
/*
If
not
,
repeat
*/
isync
/
*
Create
a
temp
mapping
and
jump
to
it
*/
andi
.
r6
,
r23
,
1
/*
Find
the
index
to
use
*/
addi
r24
,
r6
,
1
/*
r24
will
contain
1
or
2
*/
mfmsr
r9
/*
get
the
MSR
*/
rlwinm
r5
,
r9
,
27
,
31
,
31
/*
Extract
the
MSR
[
IS
]
*/
xori
r7
,
r5
,
1
/*
Use
the
other
address
space
*/
/
*
Read
the
current
mapping
entries
*/
tlbre
r3
,
r23
,
PPC44x_TLB_PAGEID
tlbre
r4
,
r23
,
PPC44x_TLB_XLAT
tlbre
r5
,
r23
,
PPC44x_TLB_ATTRIB
/
*
Save
our
current
XLAT
entry
*/
mr
r25
,
r4
/
*
Extract
the
TLB
PageSize
*/
li
r10
,
1
/*
r10
will
hold
PageSize
*/
rlwinm
r11
,
r3
,
0
,
24
,
27
/*
bits
24
-
27
*/
/
*
XXX
:
As
of
now
we
use
256
M
,
4
K
pages
*/
cmpwi
r11
,
PPC44x_TLB_256M
bne
tlb_4k
rotlwi
r10
,
r10
,
28
/*
r10
=
256
M
*/
b
write_out
tlb_4k
:
cmpwi
r11
,
PPC44x_TLB_4K
bne
default
rotlwi
r10
,
r10
,
12
/*
r10
=
4
K
*/
b
write_out
default
:
rotlwi
r10
,
r10
,
10
/*
r10
=
1
K
*/
write_out
:
/
*
*
Write
out
the
tmp
1
:
1
mapping
for
this
code
in
other
address
space
*
Fixup
EPN
=
RPN
,
TS
=
other
address
space
*/
insrwi
r3
,
r7
,
1
,
23
/*
Bit
23
is
TS
for
PAGEID
field
*/
/
*
Write
out
the
tmp
mapping
entries
*/
tlbwe
r3
,
r24
,
PPC44x_TLB_PAGEID
tlbwe
r4
,
r24
,
PPC44x_TLB_XLAT
tlbwe
r5
,
r24
,
PPC44x_TLB_ATTRIB
subi
r11
,
r10
,
1
/*
PageOffset
Mask
=
PageSize
-
1
*/
not
r10
,
r11
/*
Mask
for
PageNum
*/
/
*
Switch
to
other
address
space
in
MSR
*/
insrwi
r9
,
r7
,
1
,
26
/*
Set
MSR
[
IS
]
=
r7
*/
bl
1
f
1
:
mflr
r8
addi
r8
,
r8
,
(
2
f
-
1
b
)
/*
Find
the
target
offset
*/
/
*
Jump
to
the
tmp
mapping
*/
mtspr
SPRN_SRR0
,
r8
mtspr
SPRN_SRR1
,
r9
rfi
2
:
/
*
Invalidate
the
entry
we
were
executing
from
*/
li
r3
,
0
tlbwe
r3
,
r23
,
PPC44x_TLB_PAGEID
/
*
attribute
fields
.
rwx
for
SUPERVISOR
mode
*/
li
r5
,
0
ori
r5
,
r5
,
(
PPC44x_TLB_SW
| PPC44x_TLB_SR |
PPC44x_TLB_SX
|
PPC44x_TLB_G
)
/
*
Create
1
:
1
mapping
in
256
M
pages
*/
xori
r7
,
r7
,
1
/*
Revert
back
to
Original
TS
*/
li
r8
,
0
/*
PageNumber
*/
li
r6
,
3
/*
TLB
Index
,
start
at
3
*/
next_tlb
:
rotlwi
r3
,
r8
,
28
/*
Create
EPN
(
bits
0
-
3
)
*/
mr
r4
,
r3
/*
RPN
=
EPN
*/
ori
r3
,
r3
,
(
PPC44x_TLB_VALID
|
PPC44x_TLB_256M
)
/*
SIZE
=
256
M
,
Valid
*/
insrwi
r3
,
r7
,
1
,
23
/*
Set
TS
from
r7
*/
tlbwe
r3
,
r6
,
PPC44x_TLB_PAGEID
/*
PageID
field
:
EPN
,
V
,
SIZE
*/
tlbwe
r4
,
r6
,
PPC44x_TLB_XLAT
/*
Address
translation
:
RPN
*/
tlbwe
r5
,
r6
,
PPC44x_TLB_ATTRIB
/*
Attributes
*/
addi
r8
,
r8
,
1
/*
Increment
PN
*/
addi
r6
,
r6
,
1
/*
Increment
TLB
Index
*/
cmpwi
r8
,
8
/*
Are
we
done
?
*/
bne
next_tlb
isync
/
*
Jump
to
the
new
mapping
1
:
1
*/
li
r9
,
0
insrwi
r9
,
r7
,
1
,
26
/*
Set
MSR
[
IS
]
=
r7
*/
bl
1
f
1
:
mflr
r8
and
r8
,
r8
,
r11
/*
Get
our
offset
within
page
*/
addi
r8
,
r8
,
(
2
f
-
1
b
)
and
r5
,
r25
,
r10
/*
Get
our
target
PageNum
*/
or
r8
,
r8
,
r5
/*
Target
jump
address
*/
mtspr
SPRN_SRR0
,
r8
mtspr
SPRN_SRR1
,
r9
rfi
2
:
/
*
Invalidate
the
tmp
entry
we
used
*/
li
r3
,
0
tlbwe
r3
,
r24
,
PPC44x_TLB_PAGEID
sync
/
*
Restore
the
parameters
*/
mr
r3
,
r29
mr
r4
,
r30
mr
r5
,
r31
li
r0
,
0
li
r0
,
0
#else
#else
li
r0
,
0
li
r0
,
0
...
...
arch/powerpc/platforms/40x/Kconfig
View file @
9bb7361d
...
@@ -32,14 +32,6 @@ config EP405
...
@@ -32,14 +32,6 @@ config EP405
help
help
This option enables support for the EP405/EP405PC boards.
This option enables support for the EP405/EP405PC boards.
config HCU4
bool "Hcu4"
depends on 40x
default n
select 405GPR
help
This option enables support for the Nestal Maschinen HCU4 board.
config HOTFOOT
config HOTFOOT
bool "Hotfoot"
bool "Hotfoot"
depends on 40x
depends on 40x
...
...
arch/powerpc/platforms/40x/Makefile
View file @
9bb7361d
obj-$(CONFIG_HCU4)
+=
hcu4.o
obj-$(CONFIG_WALNUT)
+=
walnut.o
obj-$(CONFIG_WALNUT)
+=
walnut.o
obj-$(CONFIG_XILINX_VIRTEX_GENERIC_BOARD)
+=
virtex.o
obj-$(CONFIG_XILINX_VIRTEX_GENERIC_BOARD)
+=
virtex.o
obj-$(CONFIG_EP405)
+=
ep405.o
obj-$(CONFIG_EP405)
+=
ep405.o
...
...
arch/powerpc/platforms/40x/hcu4.c
deleted
100644 → 0
View file @
c6a389f1
/*
* Architecture- / platform-specific boot-time initialization code for
* IBM PowerPC 4xx based boards. Adapted from original
* code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
* <dan@net4x.com>.
*
* Copyright(c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
*
* Rewritten and ported to the merged powerpc tree:
* Copyright 2007 IBM Corporation
* Josh Boyer <jwboyer@linux.vnet.ibm.com>
*
* 2002 (c) MontaVista, Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#include <linux/init.h>
#include <linux/of_platform.h>
#include <asm/machdep.h>
#include <asm/prom.h>
#include <asm/udbg.h>
#include <asm/time.h>
#include <asm/uic.h>
#include <asm/ppc4xx.h>
static
__initdata
struct
of_device_id
hcu4_of_bus
[]
=
{
{
.
compatible
=
"ibm,plb3"
,
},
{
.
compatible
=
"ibm,opb"
,
},
{
.
compatible
=
"ibm,ebc"
,
},
{},
};
static
int
__init
hcu4_device_probe
(
void
)
{
of_platform_bus_probe
(
NULL
,
hcu4_of_bus
,
NULL
);
return
0
;
}
machine_device_initcall
(
hcu4
,
hcu4_device_probe
);
static
int
__init
hcu4_probe
(
void
)
{
unsigned
long
root
=
of_get_flat_dt_root
();
if
(
!
of_flat_dt_is_compatible
(
root
,
"netstal,hcu4"
))
return
0
;
return
1
;
}
define_machine
(
hcu4
)
{
.
name
=
"HCU4"
,
.
probe
=
hcu4_probe
,
.
progress
=
udbg_progress
,
.
init_IRQ
=
uic_init_tree
,
.
get_irq
=
uic_get_irq
,
.
restart
=
ppc4xx_reset_system
,
.
calibrate_decr
=
generic_calibrate_decr
,
};
arch/powerpc/sysdev/ppc4xx_pci.c
View file @
9bb7361d
...
@@ -1092,6 +1092,10 @@ static int __init ppc460sx_pciex_core_init(struct device_node *np)
...
@@ -1092,6 +1092,10 @@ static int __init ppc460sx_pciex_core_init(struct device_node *np)
mtdcri
(
SDR0
,
PESDR1_460SX_HSSSLEW
,
0xFFFF0000
);
mtdcri
(
SDR0
,
PESDR1_460SX_HSSSLEW
,
0xFFFF0000
);
mtdcri
(
SDR0
,
PESDR2_460SX_HSSSLEW
,
0xFFFF0000
);
mtdcri
(
SDR0
,
PESDR2_460SX_HSSSLEW
,
0xFFFF0000
);
/* Set HSS PRBS enabled */
mtdcri
(
SDR0
,
PESDR0_460SX_HSSCTLSET
,
0x00001130
);
mtdcri
(
SDR0
,
PESDR2_460SX_HSSCTLSET
,
0x00001130
);
udelay
(
100
);
udelay
(
100
);
/* De-assert PLLRESET */
/* De-assert PLLRESET */
...
@@ -1132,9 +1136,6 @@ static int ppc460sx_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
...
@@ -1132,9 +1136,6 @@ static int ppc460sx_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
dcri_clrset
(
SDR0
,
port
->
sdr_base
+
PESDRn_UTLSET2
,
dcri_clrset
(
SDR0
,
port
->
sdr_base
+
PESDRn_UTLSET2
,
0
,
0x01000000
);
0
,
0x01000000
);
/*Gen-1*/
mtdcri
(
SDR0
,
port
->
sdr_base
+
PESDRn_460SX_RCEI
,
0x08000000
);
dcri_clrset
(
SDR0
,
port
->
sdr_base
+
PESDRn_RCSSET
,
dcri_clrset
(
SDR0
,
port
->
sdr_base
+
PESDRn_RCSSET
,
(
PESDRx_RCSSET_RSTGU
|
PESDRx_RCSSET_RSTDL
),
(
PESDRx_RCSSET_RSTGU
|
PESDRx_RCSSET_RSTDL
),
PESDRx_RCSSET_RSTPYN
);
PESDRx_RCSSET_RSTPYN
);
...
@@ -1148,14 +1149,42 @@ static int ppc460sx_pciex_init_utl(struct ppc4xx_pciex_port *port)
...
@@ -1148,14 +1149,42 @@ static int ppc460sx_pciex_init_utl(struct ppc4xx_pciex_port *port)
{
{
/* Max 128 Bytes */
/* Max 128 Bytes */
out_be32
(
port
->
utl_base
+
PEUTL_PBBSZ
,
0x00000000
);
out_be32
(
port
->
utl_base
+
PEUTL_PBBSZ
,
0x00000000
);
/* Assert VRB and TXE - per datasheet turn off addr validation */
out_be32
(
port
->
utl_base
+
PEUTL_PCTL
,
0x80800000
);
return
0
;
return
0
;
}
}
static
void
__init
ppc460sx_pciex_check_link
(
struct
ppc4xx_pciex_port
*
port
)
{
void
__iomem
*
mbase
;
int
attempt
=
50
;
port
->
link
=
0
;
mbase
=
ioremap
(
port
->
cfg_space
.
start
+
0x10000000
,
0x1000
);
if
(
mbase
==
NULL
)
{
printk
(
KERN_ERR
"%s: Can't map internal config space !"
,
port
->
node
->
full_name
);
goto
done
;
}
while
(
attempt
&&
(
0
==
(
in_le32
(
mbase
+
PECFG_460SX_DLLSTA
)
&
PECFG_460SX_DLLSTA_LINKUP
)))
{
attempt
--
;
mdelay
(
10
);
}
if
(
attempt
)
port
->
link
=
1
;
done:
iounmap
(
mbase
);
}
static
struct
ppc4xx_pciex_hwops
ppc460sx_pcie_hwops
__initdata
=
{
static
struct
ppc4xx_pciex_hwops
ppc460sx_pcie_hwops
__initdata
=
{
.
core_init
=
ppc460sx_pciex_core_init
,
.
core_init
=
ppc460sx_pciex_core_init
,
.
port_init_hw
=
ppc460sx_pciex_init_port_hw
,
.
port_init_hw
=
ppc460sx_pciex_init_port_hw
,
.
setup_utl
=
ppc460sx_pciex_init_utl
,
.
setup_utl
=
ppc460sx_pciex_init_utl
,
.
check_link
=
ppc4
xx_pciex_check_link_sdr
,
.
check_link
=
ppc4
60sx_pciex_check_link
,
};
};
#endif
/* CONFIG_44x */
#endif
/* CONFIG_44x */
...
@@ -1338,15 +1367,15 @@ static int __init ppc4xx_pciex_port_init(struct ppc4xx_pciex_port *port)
...
@@ -1338,15 +1367,15 @@ static int __init ppc4xx_pciex_port_init(struct ppc4xx_pciex_port *port)
if
(
rc
!=
0
)
if
(
rc
!=
0
)
return
rc
;
return
rc
;
if
(
ppc4xx_pciex_hwops
->
check_link
)
ppc4xx_pciex_hwops
->
check_link
(
port
);
/*
/*
* Initialize mapping: disable all regions and configure
* Initialize mapping: disable all regions and configure
* CFG and REG regions based on resources in the device tree
* CFG and REG regions based on resources in the device tree
*/
*/
ppc4xx_pciex_port_init_mapping
(
port
);
ppc4xx_pciex_port_init_mapping
(
port
);
if
(
ppc4xx_pciex_hwops
->
check_link
)
ppc4xx_pciex_hwops
->
check_link
(
port
);
/*
/*
* Map UTL
* Map UTL
*/
*/
...
@@ -1360,13 +1389,23 @@ static int __init ppc4xx_pciex_port_init(struct ppc4xx_pciex_port *port)
...
@@ -1360,13 +1389,23 @@ static int __init ppc4xx_pciex_port_init(struct ppc4xx_pciex_port *port)
ppc4xx_pciex_hwops
->
setup_utl
(
port
);
ppc4xx_pciex_hwops
->
setup_utl
(
port
);
/*
/*
* Check for VC0 active and assert RDY.
* Check for VC0 active
or PLL Locked
and assert RDY.
*/
*/
if
(
port
->
sdr_base
)
{
if
(
port
->
sdr_base
)
{
if
(
port
->
link
&&
if
(
of_device_is_compatible
(
port
->
node
,
ppc4xx_pciex_wait_on_sdr
(
port
,
PESDRn_RCSSTS
,
"ibm,plb-pciex-460sx"
)){
1
<<
16
,
1
<<
16
,
5000
))
{
if
(
port
->
link
&&
ppc4xx_pciex_wait_on_sdr
(
port
,
printk
(
KERN_INFO
"PCIE%d: VC0 not active
\n
"
,
port
->
index
);
PESDRn_RCSSTS
,
1
<<
12
,
1
<<
12
,
5000
))
{
printk
(
KERN_INFO
"PCIE%d: PLL not locked
\n
"
,
port
->
index
);
port
->
link
=
0
;
}
}
else
if
(
port
->
link
&&
ppc4xx_pciex_wait_on_sdr
(
port
,
PESDRn_RCSSTS
,
1
<<
16
,
1
<<
16
,
5000
))
{
printk
(
KERN_INFO
"PCIE%d: VC0 not active
\n
"
,
port
->
index
);
port
->
link
=
0
;
port
->
link
=
0
;
}
}
...
@@ -1573,8 +1612,15 @@ static int __init ppc4xx_setup_one_pciex_POM(struct ppc4xx_pciex_port *port,
...
@@ -1573,8 +1612,15 @@ static int __init ppc4xx_setup_one_pciex_POM(struct ppc4xx_pciex_port *port,
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR1BAH
,
lah
);
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR1BAH
,
lah
);
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR1BAL
,
lal
);
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR1BAL
,
lal
);
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR1MSKH
,
0x7fffffff
);
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR1MSKH
,
0x7fffffff
);
/* Note that 3 here means enabled | single region */
/*Enabled and single region */
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR1MSKL
,
sa
|
3
);
if
(
of_device_is_compatible
(
port
->
node
,
"ibm,plb-pciex-460sx"
))
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR1MSKL
,
sa
|
DCRO_PEGPL_460SX_OMR1MSKL_UOT
|
DCRO_PEGPL_OMRxMSKL_VAL
);
else
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR1MSKL
,
sa
|
DCRO_PEGPL_OMR1MSKL_UOT
|
DCRO_PEGPL_OMRxMSKL_VAL
);
break
;
break
;
case
1
:
case
1
:
out_le32
(
mbase
+
PECFG_POM1LAH
,
pciah
);
out_le32
(
mbase
+
PECFG_POM1LAH
,
pciah
);
...
@@ -1582,8 +1628,8 @@ static int __init ppc4xx_setup_one_pciex_POM(struct ppc4xx_pciex_port *port,
...
@@ -1582,8 +1628,8 @@ static int __init ppc4xx_setup_one_pciex_POM(struct ppc4xx_pciex_port *port,
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR2BAH
,
lah
);
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR2BAH
,
lah
);
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR2BAL
,
lal
);
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR2BAL
,
lal
);
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR2MSKH
,
0x7fffffff
);
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR2MSKH
,
0x7fffffff
);
/* Note that 3 here means enabled | single region */
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR2MSKL
,
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR2MSKL
,
sa
|
3
);
sa
|
DCRO_PEGPL_OMRxMSKL_VAL
);
break
;
break
;
case
2
:
case
2
:
out_le32
(
mbase
+
PECFG_POM2LAH
,
pciah
);
out_le32
(
mbase
+
PECFG_POM2LAH
,
pciah
);
...
@@ -1592,7 +1638,9 @@ static int __init ppc4xx_setup_one_pciex_POM(struct ppc4xx_pciex_port *port,
...
@@ -1592,7 +1638,9 @@ static int __init ppc4xx_setup_one_pciex_POM(struct ppc4xx_pciex_port *port,
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR3BAL
,
lal
);
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR3BAL
,
lal
);
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR3MSKH
,
0x7fffffff
);
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR3MSKH
,
0x7fffffff
);
/* Note that 3 here means enabled | IO space !!! */
/* Note that 3 here means enabled | IO space !!! */
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR3MSKL
,
sa
|
3
);
dcr_write
(
port
->
dcrs
,
DCRO_PEGPL_OMR3MSKL
,
sa
|
DCRO_PEGPL_OMR3MSKL_IO
|
DCRO_PEGPL_OMRxMSKL_VAL
);
break
;
break
;
}
}
...
@@ -1693,6 +1741,9 @@ static void __init ppc4xx_configure_pciex_PIMs(struct ppc4xx_pciex_port *port,
...
@@ -1693,6 +1741,9 @@ static void __init ppc4xx_configure_pciex_PIMs(struct ppc4xx_pciex_port *port,
if
(
res
->
flags
&
IORESOURCE_PREFETCH
)
if
(
res
->
flags
&
IORESOURCE_PREFETCH
)
sa
|=
0x8
;
sa
|=
0x8
;
if
(
of_device_is_compatible
(
port
->
node
,
"ibm,plb-pciex-460sx"
))
sa
|=
PCI_BASE_ADDRESS_MEM_TYPE_64
;
out_le32
(
mbase
+
PECFG_BAR0HMPA
,
RES_TO_U32_HIGH
(
sa
));
out_le32
(
mbase
+
PECFG_BAR0HMPA
,
RES_TO_U32_HIGH
(
sa
));
out_le32
(
mbase
+
PECFG_BAR0LMPA
,
RES_TO_U32_LOW
(
sa
));
out_le32
(
mbase
+
PECFG_BAR0LMPA
,
RES_TO_U32_LOW
(
sa
));
...
@@ -1854,6 +1905,10 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
...
@@ -1854,6 +1905,10 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
}
}
out_le16
(
mbase
+
0x202
,
val
);
out_le16
(
mbase
+
0x202
,
val
);
/* Enable Bus master, memory, and io space */
if
(
of_device_is_compatible
(
port
->
node
,
"ibm,plb-pciex-460sx"
))
out_le16
(
mbase
+
0x204
,
0x7
);
if
(
!
port
->
endpoint
)
{
if
(
!
port
->
endpoint
)
{
/* Set Class Code to PCI-PCI bridge and Revision Id to 1 */
/* Set Class Code to PCI-PCI bridge and Revision Id to 1 */
out_le32
(
mbase
+
0x208
,
0x06040001
);
out_le32
(
mbase
+
0x208
,
0x06040001
);
...
...
arch/powerpc/sysdev/ppc4xx_pci.h
View file @
9bb7361d
...
@@ -464,6 +464,18 @@
...
@@ -464,6 +464,18 @@
#define PECFG_POM2LAL 0x390
#define PECFG_POM2LAL 0x390
#define PECFG_POM2LAH 0x394
#define PECFG_POM2LAH 0x394
/* 460sx only */
#define PECFG_460SX_DLLSTA 0x3f8
/* 460sx Bit Mappings */
#define PECFG_460SX_DLLSTA_LINKUP 0x00000010
#define DCRO_PEGPL_460SX_OMR1MSKL_UOT 0x00000004
/* PEGPL Bit Mappings */
#define DCRO_PEGPL_OMRxMSKL_VAL 0x00000001
#define DCRO_PEGPL_OMR1MSKL_UOT 0x00000002
#define DCRO_PEGPL_OMR3MSKL_IO 0x00000002
/* SDR Bit Mappings */
/* SDR Bit Mappings */
#define PESDRx_RCSSET_HLDPLB 0x10000000
#define PESDRx_RCSSET_HLDPLB 0x10000000
#define PESDRx_RCSSET_RSTGU 0x01000000
#define PESDRx_RCSSET_RSTGU 0x01000000
...
...
drivers/edac/ppc4xx_edac.c
View file @
9bb7361d
...
@@ -205,7 +205,7 @@ static struct platform_driver ppc4xx_edac_driver = {
...
@@ -205,7 +205,7 @@ static struct platform_driver ppc4xx_edac_driver = {
.
remove
=
ppc4xx_edac_remove
,
.
remove
=
ppc4xx_edac_remove
,
.
driver
=
{
.
driver
=
{
.
owner
=
THIS_MODULE
,
.
owner
=
THIS_MODULE
,
.
name
=
PPC4XX_EDAC_MODULE_NAME
.
name
=
PPC4XX_EDAC_MODULE_NAME
,
.
of_match_table
=
ppc4xx_edac_match
,
.
of_match_table
=
ppc4xx_edac_match
,
},
},
};
};
...
...
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