Commit 9da5daa0 authored by Marijn Suijten's avatar Marijn Suijten Committed by Dmitry Baryshkov

drm/msm/dpu: Add DSC configuration for SM8150 and SM8250

These DSC blocks on CTL V1 need to set its corresponding PINGPONG block
index in a hardware register to configure where to send pixel output to,
via the newly-added DPU_DSC_OUTPUT_CTRL feature flag.
Signed-off-by: default avatarMarijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/515689/
Link: https://lore.kernel.org/r/20221221231943.1961117-9-marijn.suijten@somainline.orgSigned-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parent 7aa6f1a1
...@@ -1811,18 +1811,25 @@ static const struct dpu_merge_3d_cfg sm8550_merge_3d[] = { ...@@ -1811,18 +1811,25 @@ static const struct dpu_merge_3d_cfg sm8550_merge_3d[] = {
/************************************************************* /*************************************************************
* DSC sub blocks config * DSC sub blocks config
*************************************************************/ *************************************************************/
#define DSC_BLK(_name, _id, _base) \ #define DSC_BLK(_name, _id, _base, _features) \
{\ {\
.name = _name, .id = _id, \ .name = _name, .id = _id, \
.base = _base, .len = 0x140, \ .base = _base, .len = 0x140, \
.features = 0, \ .features = _features, \
} }
static struct dpu_dsc_cfg sdm845_dsc[] = { static struct dpu_dsc_cfg sdm845_dsc[] = {
DSC_BLK("dsc_0", DSC_0, 0x80000), DSC_BLK("dsc_0", DSC_0, 0x80000, 0),
DSC_BLK("dsc_1", DSC_1, 0x80400), DSC_BLK("dsc_1", DSC_1, 0x80400, 0),
DSC_BLK("dsc_2", DSC_2, 0x80800), DSC_BLK("dsc_2", DSC_2, 0x80800, 0),
DSC_BLK("dsc_3", DSC_3, 0x80c00), DSC_BLK("dsc_3", DSC_3, 0x80c00, 0),
};
static struct dpu_dsc_cfg sm8150_dsc[] = {
DSC_BLK("dsc_0", DSC_0, 0x80000, BIT(DPU_DSC_OUTPUT_CTRL)),
DSC_BLK("dsc_1", DSC_1, 0x80400, BIT(DPU_DSC_OUTPUT_CTRL)),
DSC_BLK("dsc_2", DSC_2, 0x80800, BIT(DPU_DSC_OUTPUT_CTRL)),
DSC_BLK("dsc_3", DSC_3, 0x80c00, BIT(DPU_DSC_OUTPUT_CTRL)),
}; };
/************************************************************* /*************************************************************
...@@ -2610,6 +2617,8 @@ static const struct dpu_mdss_cfg sm8150_dpu_cfg = { ...@@ -2610,6 +2617,8 @@ static const struct dpu_mdss_cfg sm8150_dpu_cfg = {
.mixer = sm8150_lm, .mixer = sm8150_lm,
.dspp_count = ARRAY_SIZE(sm8150_dspp), .dspp_count = ARRAY_SIZE(sm8150_dspp),
.dspp = sm8150_dspp, .dspp = sm8150_dspp,
.dsc_count = ARRAY_SIZE(sm8150_dsc),
.dsc = sm8150_dsc,
.pingpong_count = ARRAY_SIZE(sm8150_pp), .pingpong_count = ARRAY_SIZE(sm8150_pp),
.pingpong = sm8150_pp, .pingpong = sm8150_pp,
.merge_3d_count = ARRAY_SIZE(sm8150_merge_3d), .merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),
...@@ -2684,6 +2693,8 @@ static const struct dpu_mdss_cfg sm8250_dpu_cfg = { ...@@ -2684,6 +2693,8 @@ static const struct dpu_mdss_cfg sm8250_dpu_cfg = {
.mixer = sm8150_lm, .mixer = sm8150_lm,
.dspp_count = ARRAY_SIZE(sm8150_dspp), .dspp_count = ARRAY_SIZE(sm8150_dspp),
.dspp = sm8150_dspp, .dspp = sm8150_dspp,
.dsc_count = ARRAY_SIZE(sm8150_dsc),
.dsc = sm8150_dsc,
.pingpong_count = ARRAY_SIZE(sm8150_pp), .pingpong_count = ARRAY_SIZE(sm8150_pp),
.pingpong = sm8150_pp, .pingpong = sm8150_pp,
.merge_3d_count = ARRAY_SIZE(sm8150_merge_3d), .merge_3d_count = ARRAY_SIZE(sm8150_merge_3d),
......
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