Commit 9dd289a4 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge branch 'renesas/cleanup' into next/dt

Dependency for renesas/dt
parents a362ec8f 04418c23
......@@ -39,8 +39,6 @@ Boards:
compatible = "renesas,armadillo800eva"
- BOCK-W
compatible = "renesas,bockw", "renesas,r8a7778"
- BOCK-W - Reference Device Tree Implementation
compatible = "renesas,bockw-reference", "renesas,r8a7778"
- Genmai (RTK772100BC00000BR)
compatible = "renesas,genmai", "renesas,r7s72100"
- Gose
......@@ -57,7 +55,3 @@ Boards:
compatible = "renesas,lager", "renesas,r8a7790"
- Marzen
compatible = "renesas,marzen", "renesas,r8a7779"
Note: Reference Device Tree Implementations are temporary implementations
to ease the migration from platform devices to Device Tree, and are
intended to be removed in the future.
......@@ -1496,8 +1496,6 @@ F: arch/arm/boot/dts/emev2*
F: arch/arm/boot/dts/r7s*
F: arch/arm/boot/dts/r8a*
F: arch/arm/boot/dts/sh*
F: arch/arm/configs/bockw_defconfig
F: arch/arm/configs/marzen_defconfig
F: arch/arm/configs/shmobile_defconfig
F: arch/arm/include/debug/renesas-scif.S
F: arch/arm/mach-shmobile/
......
......@@ -621,28 +621,6 @@ config ARCH_PXA
help
Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
config ARCH_SHMOBILE_LEGACY
bool "Renesas ARM SoCs (non-multiplatform)"
select ARCH_SHMOBILE
select ARM_PATCH_PHYS_VIRT if MMU
select CLKDEV_LOOKUP
select CPU_V7
select GENERIC_CLOCKEVENTS
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP
select HAVE_SMP
select MIGHT_HAVE_CACHE_L2X0
select MULTI_IRQ_HANDLER
select NO_IOPORT_MAP
select PINCTRL
select PM_GENERIC_DOMAINS if PM
select SH_CLK_CPG
select SPARSE_IRQ
help
Support for Renesas ARM SoC platforms using a non-multiplatform
kernel. This includes the SH-Mobile, R-Mobile, EMMA-Mobile, R-Car
and RZ families.
config ARCH_RPC
bool "RiscPC"
select ARCH_ACORN
......@@ -1534,7 +1512,6 @@ config HZ_FIXED
default 200 if ARCH_EBSA110 || ARCH_S3C24XX || \
ARCH_S5PV210 || ARCH_EXYNOS4
default 128 if SOC_AT91RM9200
default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE_LEGACY
default 0
choice
......@@ -1752,8 +1729,7 @@ config ARM_MODULE_PLTS
source "mm/Kconfig"
config FORCE_MAX_ZONEORDER
int "Maximum zone order" if ARCH_SHMOBILE_LEGACY
range 11 64 if ARCH_SHMOBILE_LEGACY
int "Maximum zone order"
default "12" if SOC_AM33XX
default "9" if SA1111 || ARCH_EFM32
default "11"
......
......@@ -1621,8 +1621,7 @@ config DEBUG_UNCOMPRESS
config UNCOMPRESS_INCLUDE
string
default "debug/uncompress.h" if ARCH_MULTIPLATFORM || ARCH_MSM || \
PLAT_SAMSUNG || ARM_SINGLE_ARMV7M || \
ARCH_SHMOBILE_LEGACY
PLAT_SAMSUNG || ARM_SINGLE_ARMV7M
default "mach/uncompress.h"
config EARLY_PRINTK
......
......@@ -522,9 +522,6 @@ dtb-$(CONFIG_ARCH_S5PV210) += \
s5pv210-smdkc110.dtb \
s5pv210-smdkv210.dtb \
s5pv210-torbreck.dtb
dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += \
r8a7778-bockw.dtb \
r8a7778-bockw-reference.dtb
dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
emev2-kzm9d.dtb \
r7s72100-genmai.dtb \
......
/*
* Reference Device Tree Source for the Bock-W board
*
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
*
* based on r8a7779
*
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013 Simon Horman
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/dts-v1/;
#include "r8a7778.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
/ {
model = "bockw";
compatible = "renesas,bockw-reference", "renesas,r8a7778";
aliases {
serial0 = &scif0;
};
chosen {
bootargs = "ignore_loglevel root=/dev/nfs ip=dhcp rw";
stdout-path = &scif0;
};
memory {
device_type = "memory";
reg = <0x60000000 0x10000000>;
};
fixedregulator3v3: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
ethernet@18300000 {
compatible = "smsc,lan9220", "smsc,lan9115";
reg = <0x18300000 0x1000>;
phy-mode = "mii";
interrupt-parent = <&irqpin>;
interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
reg-io-width = <4>;
vddvario-supply = <&fixedregulator3v3>;
vdd33a-supply = <&fixedregulator3v3>;
};
};
&mmcif {
pinctrl-0 = <&mmc_pins>;
pinctrl-names = "default";
vmmc-supply = <&fixedregulator3v3>;
bus-width = <8>;
broken-cd;
status = "okay";
};
&irqpin {
status = "okay";
};
&tmu0 {
status = "okay";
};
&pfc {
scif0_pins: serial0 {
renesas,groups = "scif0_data_a", "scif0_ctrl";
renesas,function = "scif0";
};
mmc_pins: mmc {
renesas,groups = "mmc_data8", "mmc_ctrl";
renesas,function = "mmc";
};
sdhi0_pins: sd0 {
renesas,groups = "sdhi0_data4", "sdhi0_ctrl",
"sdhi0_cd";
renesas,function = "sdhi0";
};
hspi0_pins: hspi0 {
renesas,groups = "hspi0_a";
renesas,function = "hspi0";
};
};
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default";
vmmc-supply = <&fixedregulator3v3>;
bus-width = <4>;
status = "okay";
wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
};
&hspi0 {
pinctrl-0 = <&hspi0_pins>;
pinctrl-names = "default";
status = "okay";
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spansion,s25fl008k", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <104000000>;
m25p,fast-read;
partition@0 {
label = "data(spi)";
reg = <0x00000000 0x00100000>;
};
};
};
&scif0 {
pinctrl-0 = <&scif0_pins>;
pinctrl-names = "default";
status = "okay";
};
# CONFIG_ARM_PATCH_PHYS_VIRT is not set
CONFIG_KERNEL_LZMA=y
CONFIG_NO_HZ=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
CONFIG_SYSCTL_SYSCALL=y
CONFIG_EMBEDDED=y
CONFIG_SLAB=y
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_SHMOBILE_LEGACY=y
CONFIG_ARCH_R8A7778=y
CONFIG_MACH_BOCKW=y
CONFIG_MEMORY_START=0x60000000
CONFIG_MEMORY_SIZE=0x10000000
CONFIG_SHMOBILE_TIMER_HZ=1024
# CONFIG_SH_TIMER_CMT is not set
# CONFIG_EM_TIMER_STI is not set
CONFIG_ARM_ERRATA_430973=y
CONFIG_ARM_ERRATA_458693=y
CONFIG_ARM_ERRATA_460075=y
CONFIG_ARM_ERRATA_743622=y
CONFIG_ARM_ERRATA_754322=y
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
CONFIG_HIGHMEM=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ARM_APPENDED_DTB=y
CONFIG_VFP=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_PM=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
# CONFIG_FW_LOADER is not set
CONFIG_MTD=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_M25P80=y
CONFIG_MTD_SPI_NOR=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_NETDEVICES=y
# CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_CIRRUS is not set
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_SEEQ is not set
CONFIG_SMSC911X=y
# CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_WIZNET is not set
# CONFIG_INPUT is not set
# CONFIG_SERIO is not set
# CONFIG_VT is not set
# CONFIG_LEGACY_PTYS is not set
# CONFIG_DEVKMEM is not set
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=6
CONFIG_SERIAL_SH_SCI_CONSOLE=y
# CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set
CONFIG_I2C=y
CONFIG_I2C_RCAR=y
CONFIG_GPIO_RCAR=y
CONFIG_REGULATOR=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_V4L_PLATFORM_DRIVERS=y
CONFIG_SOC_CAMERA=y
CONFIG_VIDEO_RCAR_VIN=y
# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
CONFIG_VIDEO_ML86V7667=y
CONFIG_SPI=y
CONFIG_SPI_SH_HSPI=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_SOC=y
CONFIG_SND_SOC_RCAR=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_RCAR_PHY=y
CONFIG_MMC=y
CONFIG_MMC_SDHI=y
CONFIG_MMC_SH_MMCIF=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_RX8581=y
CONFIG_DMADEVICES=y
CONFIG_RCAR_HPB_DMAE=y
CONFIG_UIO=y
CONFIG_UIO_PDRV_GENIRQ=y
# CONFIG_IOMMU_SUPPORT is not set
# CONFIG_DNOTIFY is not set
CONFIG_TMPFS=y
# CONFIG_MISC_FILESYSTEMS is not set
CONFIG_NFS_FS=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_NFS_SWAP=y
CONFIG_NFS_V4_1=y
CONFIG_ROOT_NFS=y
# CONFIG_ENABLE_WARN_DEPRECATED is not set
# CONFIG_ENABLE_MUST_CHECK is not set
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_FTRACE is not set
# CONFIG_ARM_UNWIND is not set
CONFIG_AVERAGE=y
......@@ -98,76 +98,3 @@ config ARCH_SH73A0
comment "Renesas ARM SoCs System Configuration"
endif
if ARCH_SHMOBILE_LEGACY
comment "Renesas ARM SoCs System Type"
config ARCH_R8A7778
bool "R-Car M1A (R8A77781)"
select ARCH_RCAR_GEN1
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_GIC
config ARCH_R8A7779
bool "R-Car H1 (R8A77790)"
select ARCH_RCAR_GEN1
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_GIC
comment "Renesas ARM SoCs Board Type"
config MACH_BOCKW
bool "BOCK-W platform"
depends on ARCH_R8A7778
select ARCH_REQUIRE_GPIOLIB
select REGULATOR_FIXED_VOLTAGE if REGULATOR
select SND_SOC_AK4554 if SND_SIMPLE_CARD
select SND_SOC_AK4642 if SND_SIMPLE_CARD && I2C
select USE_OF
config MACH_BOCKW_REFERENCE
bool "BOCK-W - Reference Device Tree Implementation"
depends on ARCH_R8A7778
select ARCH_REQUIRE_GPIOLIB
select REGULATOR_FIXED_VOLTAGE if REGULATOR
select USE_OF
---help---
Use reference implementation of BockW board support
which makes use of device tree at the expense
of not supporting a number of devices.
This is intended to aid developers
comment "Renesas ARM SoCs System Configuration"
config CPU_HAS_INTEVT
bool
default y
config SH_CLK_CPG
bool
source "drivers/sh/Kconfig"
endif
if ARCH_SHMOBILE
menu "Timer and clock configuration"
config SHMOBILE_TIMER_HZ
int "Kernel HZ (jiffies per second)"
range 32 1024
default "128"
help
Allows the configuration of the timer frequency. It is customary
to have the timer interrupt run at 1000 Hz or 100 Hz, but in the
case of low timer frequencies other values may be more suitable.
Renesas ARM SoC systems using a 32768 Hz RCLK for clock events may
want to select a HZ value such as 128 that can evenly divide RCLK.
A HZ value that does not divide evenly may cause timer drift.
endmenu
endif
......@@ -3,7 +3,7 @@
#
# Common objects
obj-y := timer.o console.o
obj-y := timer.o
# CPU objects
obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o
......@@ -18,12 +18,6 @@ obj-$(CONFIG_ARCH_R8A7794) += setup-r8a7794.o
obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o
obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o
# Clock objects
ifndef CONFIG_COMMON_CLK
obj-y += clock.o
obj-$(CONFIG_ARCH_R8A7778) += clock-r8a7778.o
endif
# CPU reset vector handling objects
cpu-y := platsmp.o headsmp.o
......@@ -49,11 +43,5 @@ obj-$(CONFIG_PM_RCAR) += pm-rcar.o
obj-$(CONFIG_PM_RMOBILE) += pm-rmobile.o
obj-$(CONFIG_ARCH_RCAR_GEN2) += pm-rcar-gen2.o
# Board objects
ifndef CONFIG_ARCH_SHMOBILE_MULTI
obj-$(CONFIG_MACH_BOCKW) += board-bockw.o
obj-$(CONFIG_MACH_BOCKW_REFERENCE) += board-bockw-reference.o
endif
# Framework support
obj-$(CONFIG_SMP) += $(smp-y)
# per-board load address for uImage
loadaddr-y :=
loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
__ZRELADDR := $(sort $(loadaddr-y))
zreladdr-y += $(__ZRELADDR)
# Unsupported legacy stuff
#
#params_phys-y (Instead: Pass atags pointer in r2)
#initrd_phys-y (Instead: Use compiled-in initramfs)
/*
* Bock-W board support
*
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/of_platform.h>
#include <asm/mach/arch.h>
#include "common.h"
#include "r8a7778.h"
/*
* see board-bock.c for checking detail of dip-switch
*/
#define FPGA 0x18200000
#define IRQ0MR 0x30
#define COMCTLR 0x101c
#define PFC 0xfffc0000
#define PUPR4 0x110
static void __init bockw_init(void)
{
void __iomem *fpga;
void __iomem *pfc;
#ifndef CONFIG_COMMON_CLK
r8a7778_clock_init();
#endif
r8a7778_init_irq_extpin_dt(1);
r8a7778_add_dt_devices();
fpga = ioremap_nocache(FPGA, SZ_1M);
if (fpga) {
/*
* CAUTION
*
* IRQ0/1 is cascaded interrupt from FPGA.
* it should be cared in the future
* Now, it is assuming IRQ0 was used only from SMSC.
*/
u16 val = ioread16(fpga + IRQ0MR);
val &= ~(1 << 4); /* enable SMSC911x */
iowrite16(val, fpga + IRQ0MR);
iounmap(fpga);
}
pfc = ioremap_nocache(PFC, 0x200);
if (pfc) {
/*
* FIXME
*
* SDHI CD/WP pin needs pull-up
*/
iowrite32(ioread32(pfc + PUPR4) | (3 << 26), pfc + PUPR4);
iounmap(pfc);
}
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
static const char *const bockw_boards_compat_dt[] __initconst = {
"renesas,bockw-reference",
NULL,
};
DT_MACHINE_START(BOCKW_DT, "bockw")
.init_early = shmobile_init_delay,
.init_irq = r8a7778_init_irq_dt,
.init_machine = bockw_init,
.init_late = shmobile_init_late,
.dt_compat = bockw_boards_compat_dt,
MACHINE_END
This diff is collapsed.
This diff is collapsed.
/*
* SH-Mobile Clock Framework
*
* Copyright (C) 2010 Magnus Damm
*
* Used together with arch/arm/common/clkdev.c and drivers/sh/clk.c.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <linux/export.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/sh_clk.h>
#include "clock.h"
#include "common.h"
unsigned long shmobile_fixed_ratio_clk_recalc(struct clk *clk)
{
struct clk_ratio *p = clk->priv;
return clk->parent->rate / p->div * p->mul;
};
struct sh_clk_ops shmobile_fixed_ratio_clk_ops = {
.recalc = shmobile_fixed_ratio_clk_recalc,
};
int __init shmobile_clk_init(void)
{
/* Kick the child clocks.. */
recalculate_root_clocks();
/* Enable the necessary init clocks */
clk_enable_init_clocks();
return 0;
}
#ifndef CLOCK_H
#define CLOCK_H
/* legacy clock implementation */
struct clk;
unsigned long shmobile_fixed_ratio_clk_recalc(struct clk *clk);
extern struct sh_clk_ops shmobile_fixed_ratio_clk_ops;
/* clock ratio */
struct clk_ratio {
int mul;
int div;
};
#define SH_CLK_RATIO(name, m, d) \
static struct clk_ratio name ##_ratio = { \
.mul = m, \
.div = d, \
}
#define SH_FIXED_RATIO_CLKg(name, p, r) \
struct clk name = { \
.parent = &p, \
.ops = &shmobile_fixed_ratio_clk_ops,\
.priv = &r ## _ratio, \
}
#define SH_FIXED_RATIO_CLK(name, p, r) \
static SH_FIXED_RATIO_CLKg(name, p, r)
#define SH_FIXED_RATIO_CLK_SET(name, p, m, d) \
SH_CLK_RATIO(name, m, d); \
SH_FIXED_RATIO_CLK(name, p, name)
#define SH_CLK_SET_RATIO(p, m, d) \
do { \
(p)->mul = m; \
(p)->div = d; \
} while (0)
#endif
#ifndef __ARCH_MACH_COMMON_H
#define __ARCH_MACH_COMMON_H
extern void shmobile_earlytimer_init(void);
extern void shmobile_init_delay(void);
struct twd_local_timer;
extern void shmobile_setup_console(void);
extern void shmobile_boot_vector(void);
extern unsigned long shmobile_boot_fn;
extern unsigned long shmobile_boot_arg;
......@@ -18,8 +15,6 @@ extern void shmobile_boot_scu(void);
extern void shmobile_smp_scu_prepare_cpus(unsigned int max_cpus);
extern void shmobile_smp_scu_cpu_die(unsigned int cpu);
extern int shmobile_smp_scu_cpu_kill(unsigned int cpu);
struct clk;
extern int shmobile_clk_init(void);
extern struct platform_suspend_ops shmobile_suspend_ops;
#ifdef CONFIG_SUSPEND
......
/*
* SH-Mobile Console
*
* Copyright (C) 2010 Magnus Damm
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <asm/mach/map.h>
#include "common.h"
void __init shmobile_setup_console(void)
{
parse_early_param();
/* Let earlyprintk output early console messages */
early_platform_driver_probe("earlyprintk", 1, 1);
}
This diff is collapsed.
......@@ -12,10 +12,6 @@
#include <linux/pm_domain.h>
#define DEFAULT_DEV_LATENCY_NS 250000
struct platform_device;
struct rmobile_pm_domain {
struct generic_pm_domain genpd;
struct dev_power_governor *gov;
......@@ -26,9 +22,4 @@ struct rmobile_pm_domain {
bool no_debug;
};
struct pm_domain_device {
const char *domain_name;
struct platform_device *pdev;
};
#endif /* PM_RMOBILE_H */
/*
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
* Copyright (C) 2013 Cogent Embedded, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __ASM_R8A7778_H__
#define __ASM_R8A7778_H__
#include <linux/sh_eth.h>
/* HPB-DMA slave IDs */
enum {
HPBDMA_SLAVE_DUMMY,
HPBDMA_SLAVE_SDHI0_TX,
HPBDMA_SLAVE_SDHI0_RX,
HPBDMA_SLAVE_SSI0_TX,
HPBDMA_SLAVE_SSI0_RX,
HPBDMA_SLAVE_SSI1_TX,
HPBDMA_SLAVE_SSI1_RX,
HPBDMA_SLAVE_SSI2_TX,
HPBDMA_SLAVE_SSI2_RX,
HPBDMA_SLAVE_SSI3_TX,
HPBDMA_SLAVE_SSI3_RX,
HPBDMA_SLAVE_SSI4_TX,
HPBDMA_SLAVE_SSI4_RX,
HPBDMA_SLAVE_SSI5_TX,
HPBDMA_SLAVE_SSI5_RX,
HPBDMA_SLAVE_SSI6_TX,
HPBDMA_SLAVE_SSI6_RX,
HPBDMA_SLAVE_SSI7_TX,
HPBDMA_SLAVE_SSI7_RX,
HPBDMA_SLAVE_SSI8_TX,
HPBDMA_SLAVE_SSI8_RX,
HPBDMA_SLAVE_HPBIF0_TX,
HPBDMA_SLAVE_HPBIF0_RX,
HPBDMA_SLAVE_HPBIF1_TX,
HPBDMA_SLAVE_HPBIF1_RX,
HPBDMA_SLAVE_HPBIF2_TX,
HPBDMA_SLAVE_HPBIF2_RX,
HPBDMA_SLAVE_HPBIF3_TX,
HPBDMA_SLAVE_HPBIF3_RX,
HPBDMA_SLAVE_HPBIF4_TX,
HPBDMA_SLAVE_HPBIF4_RX,
HPBDMA_SLAVE_HPBIF5_TX,
HPBDMA_SLAVE_HPBIF5_RX,
HPBDMA_SLAVE_HPBIF6_TX,
HPBDMA_SLAVE_HPBIF6_RX,
HPBDMA_SLAVE_HPBIF7_TX,
HPBDMA_SLAVE_HPBIF7_RX,
HPBDMA_SLAVE_HPBIF8_TX,
HPBDMA_SLAVE_HPBIF8_RX,
HPBDMA_SLAVE_USBFUNC_TX,
HPBDMA_SLAVE_USBFUNC_RX,
};
extern void r8a7778_add_standard_devices(void);
extern void r8a7778_add_standard_devices_dt(void);
extern void r8a7778_add_dt_devices(void);
extern void r8a7778_init_late(void);
extern void r8a7778_init_irq_dt(void);
extern void r8a7778_clock_init(void);
extern void r8a7778_init_irq_extpin(int irlm);
extern void r8a7778_init_irq_extpin_dt(int irlm);
extern void r8a7778_pinmux_init(void);
extern int r8a7778_usb_phy_power(bool enable);
#endif /* __ASM_R8A7778_H__ */
#ifndef __ASM_R8A7779_H__
#define __ASM_R8A7779_H__
#include <linux/sh_clk.h>
extern void r8a7779_pm_init(void);
#ifdef CONFIG_PM
......
This diff is collapsed.
/*
* Generic GPIO API and pinmux table support
*
* Copyright (c) 2008 Magnus Damm
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#ifndef __ASM_ARCH_GPIO_H
#define __ASM_ARCH_GPIO_H
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/io.h>
/*
* FIXME !!
*
* current gpio frame work doesn't have
* the method to control only pull up/down/free.
* this function should be replaced by correct gpio function
*/
static inline void __init gpio_direction_none(void __iomem * addr)
{
__raw_writeb(0x00, addr);
}
#endif /* __ASM_ARCH_GPIO_H */
......@@ -77,24 +77,3 @@ void __init shmobile_init_delay(void)
shmobile_setup_delay_hz(max_freq, 2, 4);
}
}
static void __init shmobile_late_time_init(void)
{
/*
* Make sure all compiled-in early timers register themselves.
*
* Run probe() for two "earlytimer" devices, these will be the
* clockevents and clocksource devices respectively. In the event
* that only a clockevents device is available, we -ENODEV on the
* clocksource and the jiffies clocksource is used transparently
* instead. No error handling is necessary here.
*/
early_platform_driver_register_all("earlytimer");
early_platform_driver_probe("earlytimer", 2, 0);
}
void __init shmobile_earlytimer_init(void)
{
late_time_init = shmobile_late_time_init;
}
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