Commit 9e585236 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Simon Horman

ARM: dts: r8a7790: Add INTC-SYS clock to device tree

Link the ARM GIC to the INTC-SYS module clock, and add it to the "always
on" PM Domain, so it can be power managed using that clock.

Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent c11333cc
...@@ -185,6 +185,9 @@ gic: interrupt-controller@f1001000 { ...@@ -185,6 +185,9 @@ gic: interrupt-controller@f1001000 {
<0 0xf1004000 0 0x2000>, <0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>; <0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&mstp4_clks R8A7790_CLK_INTC_SYS>;
clock-names = "clk";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
}; };
gpio0: gpio@e6050000 { gpio0: gpio@e6050000 {
...@@ -1364,10 +1367,10 @@ R8A7790_CLK_USBDMAC0 R8A7790_CLK_USBDMAC1 ...@@ -1364,10 +1367,10 @@ R8A7790_CLK_USBDMAC0 R8A7790_CLK_USBDMAC1
mstp4_clks: mstp4_clks@e6150140 { mstp4_clks: mstp4_clks@e6150140 {
compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>; reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
clocks = <&cp_clk>; clocks = <&cp_clk>, <&zs_clk>;
#clock-cells = <1>; #clock-cells = <1>;
clock-indices = <R8A7790_CLK_IRQC>; clock-indices = <R8A7790_CLK_IRQC R8A7790_CLK_INTC_SYS>;
clock-output-names = "irqc"; clock-output-names = "irqc", "intc-sys";
}; };
mstp5_clks: mstp5_clks@e6150144 { mstp5_clks: mstp5_clks@e6150144 {
compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
......
...@@ -82,6 +82,7 @@ ...@@ -82,6 +82,7 @@
/* MSTP4 */ /* MSTP4 */
#define R8A7790_CLK_IRQC 7 #define R8A7790_CLK_IRQC 7
#define R8A7790_CLK_INTC_SYS 8
/* MSTP5 */ /* MSTP5 */
#define R8A7790_CLK_AUDIO_DMAC1 1 #define R8A7790_CLK_AUDIO_DMAC1 1
......
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