Commit 9e5de3e0 authored by Nagadheeraj Rottela's avatar Nagadheeraj Rottela Committed by Herbert Xu

crypto: cavium/nitrox - Add mailbox message to get mcode info in VF

Add support to get microcode information in VF from PF via mailbox
message.
Signed-off-by: default avatarNagadheeraj Rottela <rnagadheeraj@marvell.com>
Reviewed-by: default avatarSrikanth Jampala <jsrikanth@marvell.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 0600e9c0
...@@ -109,6 +109,13 @@ struct nitrox_q_vector { ...@@ -109,6 +109,13 @@ struct nitrox_q_vector {
}; };
}; };
enum mcode_type {
MCODE_TYPE_INVALID,
MCODE_TYPE_AE,
MCODE_TYPE_SE_SSL,
MCODE_TYPE_SE_IPSEC,
};
/** /**
* mbox_msg - Mailbox message data * mbox_msg - Mailbox message data
* @type: message type * @type: message type
...@@ -128,6 +135,14 @@ union mbox_msg { ...@@ -128,6 +135,14 @@ union mbox_msg {
u64 chipid: 8; u64 chipid: 8;
u64 vfid: 8; u64 vfid: 8;
} id; } id;
struct {
u64 type: 2;
u64 opcode: 6;
u64 count: 4;
u64 info: 40;
u64 next_se_grp: 3;
u64 next_ae_grp: 3;
} mcode_info;
}; };
/** /**
......
...@@ -25,6 +25,7 @@ enum mbx_msg_opcode { ...@@ -25,6 +25,7 @@ enum mbx_msg_opcode {
MSG_OP_VF_UP, MSG_OP_VF_UP,
MSG_OP_VF_DOWN, MSG_OP_VF_DOWN,
MSG_OP_CHIPID_VFID, MSG_OP_CHIPID_VFID,
MSG_OP_MCODE_INFO = 11,
}; };
struct pf2vf_work { struct pf2vf_work {
...@@ -73,6 +74,13 @@ static void pf2vf_send_response(struct nitrox_device *ndev, ...@@ -73,6 +74,13 @@ static void pf2vf_send_response(struct nitrox_device *ndev,
vfdev->nr_queues = 0; vfdev->nr_queues = 0;
atomic_set(&vfdev->state, __NDEV_NOT_READY); atomic_set(&vfdev->state, __NDEV_NOT_READY);
break; break;
case MSG_OP_MCODE_INFO:
msg.data = 0;
msg.mcode_info.count = 2;
msg.mcode_info.info = MCODE_TYPE_SE_SSL | (MCODE_TYPE_AE << 5);
msg.mcode_info.next_se_grp = 1;
msg.mcode_info.next_ae_grp = 1;
break;
default: default:
msg.type = MBX_MSG_TYPE_NOP; msg.type = MBX_MSG_TYPE_NOP;
break; break;
......
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