Commit 9e67886b authored by Roy Zang's avatar Roy Zang Committed by Kumar Gala

powerpc/pci: Use PCIe IP block revision register instead of compatible

Freescale PCIe IP block revision bigger than rev2.2 will also need
redefine the sequence of inbound windows. So change to use IP block
revision instead of compatible for the judgment.
Signed-off-by: default avatarRoy Zang <tie-fei.zang@freescale.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent 6cc1b4e9
...@@ -143,18 +143,20 @@ static void __init setup_pci_atmu(struct pci_controller *hose, ...@@ -143,18 +143,20 @@ static void __init setup_pci_atmu(struct pci_controller *hose,
pr_debug("PCI memory map start 0x%016llx, size 0x%016llx\n", pr_debug("PCI memory map start 0x%016llx, size 0x%016llx\n",
(u64)rsrc->start, (u64)resource_size(rsrc)); (u64)rsrc->start, (u64)resource_size(rsrc));
if (of_device_is_compatible(hose->dn, "fsl,qoriq-pcie-v2.2")) {
win_idx = 2;
start_idx = 0;
end_idx = 3;
}
pci = ioremap(rsrc->start, resource_size(rsrc)); pci = ioremap(rsrc->start, resource_size(rsrc));
if (!pci) { if (!pci) {
dev_err(hose->parent, "Unable to map ATMU registers\n"); dev_err(hose->parent, "Unable to map ATMU registers\n");
return; return;
} }
if (early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) {
if (in_be32(&pci->block_rev1) >= PCIE_IP_REV_2_2) {
win_idx = 2;
start_idx = 0;
end_idx = 3;
}
}
/* Disable all windows (except powar0 since it's ignored) */ /* Disable all windows (except powar0 since it's ignored) */
for(i = 1; i < 5; i++) for(i = 1; i < 5; i++)
out_be32(&pci->pow[i].powar, 0); out_be32(&pci->pow[i].powar, 0);
......
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