Skip to content

L
linux
Commit 9eaa98a6 authored by Masahiro Yamada's avatar Masahiro Yamada Committed by Linus Walleij
Browse files
Options

pinctrl: uniphier: rename macros for drive strength control 

The new ARMv8 SoC, PH1-LD20, supports more fine-grained drive
strength control.  Some of the configuration registers on it have
3-bit width.

The feature will be supported in the next commit, but a problem is
that macro names are getting longer and longer in the current naming
scheme.

Before moving forward, this commit renames macros as follows:

  UNIPHIER_PIN_DRV_4_8        -> UNIPHIER_PIN_DRV_1BIT
  UNIPHIER_PIN_DRV_8_12_16_20 -> UNIPHIER_PIN_DRV_2BIT
  UNIPHIER_PIN_DRV_FIXED_4    -> UNIPHIER_PIN_DRV_FIXED4
  UNIPHIER_PIN_DRV_FIXED_5    -> UNIPHIER_PIN_DRV_FIXED5
  UNIPHIER_PIN_DRV_FIXED_8    -> UNIPHIER_PIN_DRV_FIXED8
Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent fc78a566
Expand all Hide whitespace changes
Inline Side-by-side
Showing with 1407 additions and 1407 deletions
drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
View file @ 9eaa98a6
......@@ -65,7 +65,7 @@ static void uniphier_pctl_pin_dbg_show(struct pinctrl_dev *pctldev,
struct seq_file *s, unsigned offset)
{
const struct pinctrl_pin_desc *pin = &pctldev->desc->pins[offset];
const char *pull_dir, *drv_str;
const char *pull_dir, *drv_type;
switch (uniphier_pin_get_pull_dir(pin->drv_data)) {
case UNIPHIER_PIN_PULL_UP:
......@@ -87,30 +87,30 @@ static void uniphier_pctl_pin_dbg_show(struct pinctrl_dev *pctldev,
BUG();
}
switch (uniphier_pin_get_drv_str(pin->drv_data)) {
case UNIPHIER_PIN_DRV_4_8:
drv_str = "4/8(mA)";
switch (uniphier_pin_get_drv_type(pin->drv_data)) {
case UNIPHIER_PIN_DRV_1BIT:
drv_type = "4/8(mA)";
break;
case UNIPHIER_PIN_DRV_8_12_16_20:
drv_str = "8/12/16/20(mA)";
case UNIPHIER_PIN_DRV_2BIT:
drv_type = "8/12/16/20(mA)";
break;
case UNIPHIER_PIN_DRV_FIXED_4:
drv_str = "4(mA)";
case UNIPHIER_PIN_DRV_FIXED4:
drv_type = "4(mA)";
break;
case UNIPHIER_PIN_DRV_FIXED_5:
drv_str = "5(mA)";
case UNIPHIER_PIN_DRV_FIXED5:
drv_type = "5(mA)";
break;
case UNIPHIER_PIN_DRV_FIXED_8:
drv_str = "8(mA)";
case UNIPHIER_PIN_DRV_FIXED8:
drv_type = "8(mA)";
break;
case UNIPHIER_PIN_DRV_NONE:
drv_str = "NONE";
drv_type = "NONE";
break;
default:
BUG();
}
seq_printf(s, " PULL_DIR=%s DRV_STR=%s", pull_dir, drv_str);
seq_printf(s, " PULL_DIR=%s DRV_TYPE=%s", pull_dir, drv_type);
}
#endif
......@@ -180,30 +180,30 @@ static int uniphier_conf_pin_drive_get(struct pinctrl_dev *pctldev,
u16 *strength)
{
struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
enum uniphier_pin_drv_str drv_str =
uniphier_pin_get_drv_str(pin->drv_data);
const unsigned int strength_4_8[] = {4, 8};
const unsigned int strength_8_12_16_20[] = {8, 12, 16, 20};
enum uniphier_pin_drv_type type =
uniphier_pin_get_drv_type(pin->drv_data);
const unsigned int strength_1bit[] = {4, 8};
const unsigned int strength_2bit[] = {8, 12, 16, 20};
const unsigned int *supported_strength;
unsigned int drvctrl, reg, shift, mask, width, val;
int ret;
switch (drv_str) {
case UNIPHIER_PIN_DRV_4_8:
supported_strength = strength_4_8;
switch (type) {
case UNIPHIER_PIN_DRV_1BIT:
supported_strength = strength_1bit;
width = 1;
break;
case UNIPHIER_PIN_DRV_8_12_16_20:
supported_strength = strength_8_12_16_20;
case UNIPHIER_PIN_DRV_2BIT:
supported_strength = strength_2bit;
width = 2;
break;
case UNIPHIER_PIN_DRV_FIXED_4:
case UNIPHIER_PIN_DRV_FIXED4:
*strength = 4;
return 0;
case UNIPHIER_PIN_DRV_FIXED_5:
case UNIPHIER_PIN_DRV_FIXED5:
*strength = 5;
return 0;
case UNIPHIER_PIN_DRV_FIXED_8:
case UNIPHIER_PIN_DRV_FIXED8:
*strength = 8;
return 0;
default:
......@@ -364,20 +364,20 @@ static int uniphier_conf_pin_drive_set(struct pinctrl_dev *pctldev,
u16 strength)
{
struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
enum uniphier_pin_drv_str drv_str =
uniphier_pin_get_drv_str(pin->drv_data);
const unsigned int strength_4_8[] = {4, 8, -1};
const unsigned int strength_8_12_16_20[] = {8, 12, 16, 20, -1};
enum uniphier_pin_drv_type type =
uniphier_pin_get_drv_type(pin->drv_data);
const unsigned int strength_1bit[] = {4, 8, -1};
const unsigned int strength_2bit[] = {8, 12, 16, 20, -1};
const unsigned int *supported_strength;
unsigned int drvctrl, reg, shift, mask, width, val;
switch (drv_str) {
case UNIPHIER_PIN_DRV_4_8:
supported_strength = strength_4_8;
switch (type) {
case UNIPHIER_PIN_DRV_1BIT:
supported_strength = strength_1bit;
width = 1;
break;
case UNIPHIER_PIN_DRV_8_12_16_20:
supported_strength = strength_8_12_16_20;
case UNIPHIER_PIN_DRV_2BIT:
supported_strength = strength_2bit;
width = 2;
break;
default:
......
drivers/pinctrl/uniphier/pinctrl-uniphier.h
View file @ 9eaa98a6
......@@ -41,16 +41,16 @@ struct platform_device;
#define UNIPHIER_PIN_DRVCTRL_MASK ((1UL << (UNIPHIER_PIN_DRVCTRL_BITS)) \
- 1)
/* supported drive strength (mA) */
#define UNIPHIER_PIN_DRV_STR_SHIFT ((UNIPHIER_PIN_DRVCTRL_SHIFT) + \
/* drive control type */
#define UNIPHIER_PIN_DRV_TYPE_SHIFT ((UNIPHIER_PIN_DRVCTRL_SHIFT) + \
(UNIPHIER_PIN_DRVCTRL_BITS))
#define UNIPHIER_PIN_DRV_STR_BITS 3
#define UNIPHIER_PIN_DRV_STR_MASK ((1UL << (UNIPHIER_PIN_DRV_STR_BITS)) \
#define UNIPHIER_PIN_DRV_TYPE_BITS 3
#define UNIPHIER_PIN_DRV_TYPE_MASK ((1UL << (UNIPHIER_PIN_DRV_TYPE_BITS)) \
- 1)
/* pull-up / pull-down register number */
#define UNIPHIER_PIN_PUPDCTRL_SHIFT ((UNIPHIER_PIN_DRV_STR_SHIFT) + \
(UNIPHIER_PIN_DRV_STR_BITS))
#define UNIPHIER_PIN_PUPDCTRL_SHIFT ((UNIPHIER_PIN_DRV_TYPE_SHIFT) + \
(UNIPHIER_PIN_DRV_TYPE_BITS))
#define UNIPHIER_PIN_PUPDCTRL_BITS 9
#define UNIPHIER_PIN_PUPDCTRL_MASK ((1UL << (UNIPHIER_PIN_PUPDCTRL_BITS))\
- 1)
......@@ -68,13 +68,13 @@ struct platform_device;
#define UNIPHIER_PIN_IECTRL_NONE (UNIPHIER_PIN_IECTRL_MASK)
/* selectable drive strength */
enum uniphier_pin_drv_str {
UNIPHIER_PIN_DRV_4_8, /* 2 level control: 4/8 mA */
UNIPHIER_PIN_DRV_8_12_16_20, /* 4 level control: 8/12/16/20 mA */
UNIPHIER_PIN_DRV_FIXED_4, /* fixed to 4mA */
UNIPHIER_PIN_DRV_FIXED_5, /* fixed to 5mA */
UNIPHIER_PIN_DRV_FIXED_8, /* fixed to 8mA */
/* drive control type */
enum uniphier_pin_drv_type {
UNIPHIER_PIN_DRV_1BIT, /* 2 level control: 4/8 mA */
UNIPHIER_PIN_DRV_2BIT, /* 4 level control: 8/12/16/20 mA */
UNIPHIER_PIN_DRV_FIXED4, /* fixed to 4mA */
UNIPHIER_PIN_DRV_FIXED5, /* fixed to 5mA */
UNIPHIER_PIN_DRV_FIXED8, /* fixed to 8mA */
UNIPHIER_PIN_DRV_NONE, /* no support (input only pin) */
};
......@@ -91,17 +91,17 @@ enum uniphier_pin_pull_dir {
(((x) & (UNIPHIER_PIN_IECTRL_MASK)) << (UNIPHIER_PIN_IECTRL_SHIFT))
#define UNIPHIER_PIN_DRVCTRL(x) \
(((x) & (UNIPHIER_PIN_DRVCTRL_MASK)) << (UNIPHIER_PIN_DRVCTRL_SHIFT))
#define UNIPHIER_PIN_DRV_STR(x) \
(((x) & (UNIPHIER_PIN_DRV_STR_MASK)) << (UNIPHIER_PIN_DRV_STR_SHIFT))
#define UNIPHIER_PIN_DRV_TYPE(x) \
(((x) & (UNIPHIER_PIN_DRV_TYPE_MASK)) << (UNIPHIER_PIN_DRV_TYPE_SHIFT))
#define UNIPHIER_PIN_PUPDCTRL(x) \
(((x) & (UNIPHIER_PIN_PUPDCTRL_MASK)) << (UNIPHIER_PIN_PUPDCTRL_SHIFT))
#define UNIPHIER_PIN_PULL_DIR(x) \
(((x) & (UNIPHIER_PIN_PULL_DIR_MASK)) << (UNIPHIER_PIN_PULL_DIR_SHIFT))
#define UNIPHIER_PIN_ATTR_PACKED(iectrl, drvctrl, drv_str, pupdctrl, pull_dir)\
#define UNIPHIER_PIN_ATTR_PACKED(iectrl, drvctrl, drv_type, pupdctrl, pull_dir)\
(UNIPHIER_PIN_IECTRL(iectrl) | \
UNIPHIER_PIN_DRVCTRL(drvctrl) | \
UNIPHIER_PIN_DRV_STR(drv_str) | \
UNIPHIER_PIN_DRV_TYPE(drv_type) | \
UNIPHIER_PIN_PUPDCTRL(pupdctrl) | \
UNIPHIER_PIN_PULL_DIR(pull_dir))
......@@ -117,10 +117,10 @@ static inline unsigned int uniphier_pin_get_drvctrl(void *drv_data)
UNIPHIER_PIN_DRVCTRL_MASK;
}
static inline unsigned int uniphier_pin_get_drv_str(void *drv_data)
static inline unsigned int uniphier_pin_get_drv_type(void *drv_data)
{
return ((unsigned long)drv_data >> UNIPHIER_PIN_DRV_STR_SHIFT) &
UNIPHIER_PIN_DRV_STR_MASK;
return ((unsigned long)drv_data >> UNIPHIER_PIN_DRV_TYPE_SHIFT) &
UNIPHIER_PIN_DRV_TYPE_MASK;
}
static inline unsigned int uniphier_pin_get_pupdctrl(void *drv_data)
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7