Commit 9f3ba456 authored by Arnd Bergmann's avatar Arnd Bergmann

ARM: tegra: make debug_ll code build for ARMv6

In a combined ARMv6/v7 kernel, we cannot use the
movt/movw instructions to load an immediate, as they
are not valid on ARMv6.

This changes the file to use an indirect load instead,
as lots of other implementations do.
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
Tested-by: default avatarStephen Warren <swarren@wwwdotorg.org>
Acked-by: default avatarStephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: linux-tegra@vger.kernel.org
parent 1146b600
...@@ -53,8 +53,7 @@ ...@@ -53,8 +53,7 @@
#define checkuart(rp, rv, lhu, bit, uart) \ #define checkuart(rp, rv, lhu, bit, uart) \
/* Load address of CLK_RST register */ \ /* Load address of CLK_RST register */ \
movw rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \ ldr rp, =TEGRA_CLK_RST_DEVICES_##lhu ; \
movt rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \
/* Load value from CLK_RST register */ \ /* Load value from CLK_RST register */ \
ldr rp, [rp, #0] ; \ ldr rp, [rp, #0] ; \
/* Test UART's reset bit */ \ /* Test UART's reset bit */ \
...@@ -62,8 +61,7 @@ ...@@ -62,8 +61,7 @@
/* If set, can't use UART; jump to save no UART */ \ /* If set, can't use UART; jump to save no UART */ \
bne 90f ; \ bne 90f ; \
/* Load address of CLK_OUT_ENB register */ \ /* Load address of CLK_OUT_ENB register */ \
movw rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \ ldr rp, =TEGRA_CLK_OUT_ENB_##lhu ; \
movt rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \
/* Load value from CLK_OUT_ENB register */ \ /* Load value from CLK_OUT_ENB register */ \
ldr rp, [rp, #0] ; \ ldr rp, [rp, #0] ; \
/* Test UART's clock enable bit */ \ /* Test UART's clock enable bit */ \
...@@ -71,8 +69,7 @@ ...@@ -71,8 +69,7 @@
/* If clear, can't use UART; jump to save no UART */ \ /* If clear, can't use UART; jump to save no UART */ \
beq 90f ; \ beq 90f ; \
/* Passed all tests, load address of UART registers */ \ /* Passed all tests, load address of UART registers */ \
movw rp, #TEGRA_UART##uart##_BASE & 0xffff ; \ ldr rp, =TEGRA_UART##uart##_BASE ; \
movt rp, #TEGRA_UART##uart##_BASE >> 16 ; \
/* Jump to save UART address */ \ /* Jump to save UART address */ \
b 91f b 91f
...@@ -90,15 +87,16 @@ ...@@ -90,15 +87,16 @@
#ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA #ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA
/* Check ODMDATA */ /* Check ODMDATA */
10: movw \rp, #TEGRA_PMC_SCRATCH20 & 0xffff 10: ldr \rp, =TEGRA_PMC_SCRATCH20
movt \rp, #TEGRA_PMC_SCRATCH20 >> 16
ldr \rp, [\rp, #0] @ Load PMC_SCRATCH20 ldr \rp, [\rp, #0] @ Load PMC_SCRATCH20
ubfx \rv, \rp, #18, #2 @ 19:18 are console type lsr \rv, \rp, #18 @ 19:18 are console type
and \rv, \rv, #3
cmp \rv, #2 @ 2 and 3 mean DCC, UART cmp \rv, #2 @ 2 and 3 mean DCC, UART
beq 11f @ some boards swap the meaning beq 11f @ some boards swap the meaning
cmp \rv, #3 @ so accept either cmp \rv, #3 @ so accept either
bne 90f bne 90f
11: ubfx \rv, \rp, #15, #3 @ 17:15 are UART ID 11: lsr \rv, \rp, #15 @ 17:15 are UART ID
and \rv, #7
cmp \rv, #0 @ UART 0? cmp \rv, #0 @ UART 0?
beq 20f beq 20f
cmp \rv, #1 @ UART 1? cmp \rv, #1 @ UART 1?
......
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