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Commit a055b02f authored by David S. Miller's avatar David S. Miller
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Merge branch 'pch_gbe-Cleanups' 

Paul Burton says:

====================
net: pch_gbe: Cleanups

This series begins the process of cleaning up the pch_gbe network
driver. Whilst my ultimate goal is to add support for using this driver
on the MIPS Boston development board, this series sets that aside in
favor of making some more general cleanups. My hope is that this will
both make the driver a little more maleable & reduce the probability of
me gouging out my eyes.

Applies cleanly atop net-next as of 5424ea27 ("netns: get more
entropy from net_hash_mix()").
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 5424ea27 418e7dab
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drivers/net/ethernet/oki-semi/pch_gbe/Makefile
View file @ a055b02f
obj-$(CONFIG_PCH_GBE) += pch_gbe.o
pch_gbe-y := pch_gbe_phy.o pch_gbe_ethtool.o pch_gbe_param.o
pch_gbe-y += pch_gbe_api.o pch_gbe_main.o
pch_gbe-y += pch_gbe_main.o
drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h
View file @ a055b02f
......@@ -326,32 +326,6 @@ struct pch_gbe_regs {
#define PCH_GBE_FC_FULL 3
#define PCH_GBE_FC_DEFAULT PCH_GBE_FC_FULL
struct pch_gbe_hw;
/**
* struct pch_gbe_functions - HAL APi function pointer
* @get_bus_info: for pch_gbe_hal_get_bus_info
* @init_hw: for pch_gbe_hal_init_hw
* @read_phy_reg: for pch_gbe_hal_read_phy_reg
* @write_phy_reg: for pch_gbe_hal_write_phy_reg
* @reset_phy: for pch_gbe_hal_phy_hw_reset
* @sw_reset_phy: for pch_gbe_hal_phy_sw_reset
* @power_up_phy: for pch_gbe_hal_power_up_phy
* @power_down_phy: for pch_gbe_hal_power_down_phy
* @read_mac_addr: for pch_gbe_hal_read_mac_addr
*/
struct pch_gbe_functions {
void (*get_bus_info) (struct pch_gbe_hw *);
s32 (*init_hw) (struct pch_gbe_hw *);
s32 (*read_phy_reg) (struct pch_gbe_hw *, u32, u16 *);
s32 (*write_phy_reg) (struct pch_gbe_hw *, u32, u16);
void (*reset_phy) (struct pch_gbe_hw *);
void (*sw_reset_phy) (struct pch_gbe_hw *);
void (*power_up_phy) (struct pch_gbe_hw *hw);
void (*power_down_phy) (struct pch_gbe_hw *hw);
s32 (*read_mac_addr) (struct pch_gbe_hw *);
};
/**
* struct pch_gbe_mac_info - MAC information
* @addr[6]: Store the MAC address
......@@ -392,17 +366,6 @@ struct pch_gbe_phy_info {
u16 autoneg_advertised;
};
/*!
* @ingroup Gigabit Ether driver Layer
* @struct pch_gbe_bus_info
* @brief Bus information
*/
struct pch_gbe_bus_info {
u8 type;
u8 speed;
u8 width;
};
/*!
* @ingroup Gigabit Ether driver Layer
* @struct pch_gbe_hw
......@@ -414,10 +377,8 @@ struct pch_gbe_hw {
struct pch_gbe_regs __iomem *reg;
spinlock_t miim_lock;
const struct pch_gbe_functions *func;
struct pch_gbe_mac_info mac;
struct pch_gbe_phy_info phy;
struct pch_gbe_bus_info bus;
};
/**
......@@ -680,7 +641,6 @@ void pch_gbe_set_ethtool_ops(struct net_device *netdev);
/* pch_gbe_mac.c */
s32 pch_gbe_mac_force_mac_fc(struct pch_gbe_hw *hw);
s32 pch_gbe_mac_read_mac_addr(struct pch_gbe_hw *hw);
u16 pch_gbe_mac_ctrl_miim(struct pch_gbe_hw *hw, u32 addr, u32 dir, u32 reg,
u16 data);
#endif /* _PCH_GBE_H_ */
drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_api.c deleted 100644 → 0
View file @ 5424ea27
/*
* Copyright (C) 1999 - 2010 Intel Corporation.
* Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD.
*
* This code was derived from the Intel e1000e Linux driver.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "pch_gbe.h"
#include "pch_gbe_phy.h"
#include "pch_gbe_api.h"
/* bus type values */
#define pch_gbe_bus_type_unknown 0
#define pch_gbe_bus_type_pci 1
#define pch_gbe_bus_type_pcix 2
#define pch_gbe_bus_type_pci_express 3
#define pch_gbe_bus_type_reserved 4
/* bus speed values */
#define pch_gbe_bus_speed_unknown 0
#define pch_gbe_bus_speed_33 1
#define pch_gbe_bus_speed_66 2
#define pch_gbe_bus_speed_100 3
#define pch_gbe_bus_speed_120 4
#define pch_gbe_bus_speed_133 5
#define pch_gbe_bus_speed_2500 6
#define pch_gbe_bus_speed_reserved 7
/* bus width values */
#define pch_gbe_bus_width_unknown 0
#define pch_gbe_bus_width_pcie_x1 1
#define pch_gbe_bus_width_pcie_x2 2
#define pch_gbe_bus_width_pcie_x4 4
#define pch_gbe_bus_width_32 5
#define pch_gbe_bus_width_64 6
#define pch_gbe_bus_width_reserved 7
/**
* pch_gbe_plat_get_bus_info - Obtain bus information for adapter
* @hw: Pointer to the HW structure
*/
static void pch_gbe_plat_get_bus_info(struct pch_gbe_hw *hw)
{
hw->bus.type = pch_gbe_bus_type_pci_express;
hw->bus.speed = pch_gbe_bus_speed_2500;
hw->bus.width = pch_gbe_bus_width_pcie_x1;
}
/**
* pch_gbe_plat_init_hw - Initialize hardware
* @hw: Pointer to the HW structure
* Returns:
* 0: Successfully
* Negative value: Failed-EBUSY
*/
static s32 pch_gbe_plat_init_hw(struct pch_gbe_hw *hw)
{
s32 ret_val;
ret_val = pch_gbe_phy_get_id(hw);
if (ret_val) {
struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
netdev_err(adapter->netdev, "pch_gbe_phy_get_id error\n");
return ret_val;
}
pch_gbe_phy_init_setting(hw);
/* Setup Mac interface option RGMII */
#ifdef PCH_GBE_MAC_IFOP_RGMII
pch_gbe_phy_set_rgmii(hw);
#endif
return ret_val;
}
static const struct pch_gbe_functions pch_gbe_ops = {
.get_bus_info = pch_gbe_plat_get_bus_info,
.init_hw = pch_gbe_plat_init_hw,
.read_phy_reg = pch_gbe_phy_read_reg_miic,
.write_phy_reg = pch_gbe_phy_write_reg_miic,
.reset_phy = pch_gbe_phy_hw_reset,
.sw_reset_phy = pch_gbe_phy_sw_reset,
.power_up_phy = pch_gbe_phy_power_up,
.power_down_phy = pch_gbe_phy_power_down,
.read_mac_addr = pch_gbe_mac_read_mac_addr
};
/**
* pch_gbe_plat_init_function_pointers - Init func ptrs
* @hw: Pointer to the HW structure
*/
static void pch_gbe_plat_init_function_pointers(struct pch_gbe_hw *hw)
{
/* Set PHY parameter */
hw->phy.reset_delay_us = PCH_GBE_PHY_RESET_DELAY_US;
/* Set function pointers */
hw->func = &pch_gbe_ops;
}
/**
* pch_gbe_hal_setup_init_funcs - Initializes function pointers
* @hw: Pointer to the HW structure
* Returns:
* 0: Successfully
* ENOSYS: Function is not registered
*/
s32 pch_gbe_hal_setup_init_funcs(struct pch_gbe_hw *hw)
{
if (!hw->reg) {
struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
netdev_err(adapter->netdev, "ERROR: Registers not mapped\n");
return -ENOSYS;
}
pch_gbe_plat_init_function_pointers(hw);
return 0;
}
/**
* pch_gbe_hal_get_bus_info - Obtain bus information for adapter
* @hw: Pointer to the HW structure
*/
void pch_gbe_hal_get_bus_info(struct pch_gbe_hw *hw)
{
if (!hw->func->get_bus_info) {
struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
netdev_err(adapter->netdev, "ERROR: configuration\n");
return;
}
hw->func->get_bus_info(hw);
}
/**
* pch_gbe_hal_init_hw - Initialize hardware
* @hw: Pointer to the HW structure
* Returns:
* 0: Successfully
* ENOSYS: Function is not registered
*/
s32 pch_gbe_hal_init_hw(struct pch_gbe_hw *hw)
{
if (!hw->func->init_hw) {
struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
netdev_err(adapter->netdev, "ERROR: configuration\n");
return -ENOSYS;
}
return hw->func->init_hw(hw);
}
/**
* pch_gbe_hal_read_phy_reg - Reads PHY register
* @hw: Pointer to the HW structure
* @offset: The register to read
* @data: The buffer to store the 16-bit read.
* Returns:
* 0: Successfully
* Negative value: Failed
*/
s32 pch_gbe_hal_read_phy_reg(struct pch_gbe_hw *hw, u32 offset,
u16 *data)
{
if (!hw->func->read_phy_reg)
return 0;
return hw->func->read_phy_reg(hw, offset, data);
}
/**
* pch_gbe_hal_write_phy_reg - Writes PHY register
* @hw: Pointer to the HW structure
* @offset: The register to read
* @data: The value to write.
* Returns:
* 0: Successfully
* Negative value: Failed
*/
s32 pch_gbe_hal_write_phy_reg(struct pch_gbe_hw *hw, u32 offset,
u16 data)
{
if (!hw->func->write_phy_reg)
return 0;
return hw->func->write_phy_reg(hw, offset, data);
}
/**
* pch_gbe_hal_phy_hw_reset - Hard PHY reset
* @hw: Pointer to the HW structure
*/
void pch_gbe_hal_phy_hw_reset(struct pch_gbe_hw *hw)
{
if (!hw->func->reset_phy) {
struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
netdev_err(adapter->netdev, "ERROR: configuration\n");
return;
}
hw->func->reset_phy(hw);
}
/**
* pch_gbe_hal_phy_sw_reset - Soft PHY reset
* @hw: Pointer to the HW structure
*/
void pch_gbe_hal_phy_sw_reset(struct pch_gbe_hw *hw)
{
if (!hw->func->sw_reset_phy) {
struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
netdev_err(adapter->netdev, "ERROR: configuration\n");
return;
}
hw->func->sw_reset_phy(hw);
}
/**
* pch_gbe_hal_read_mac_addr - Reads MAC address
* @hw: Pointer to the HW structure
* Returns:
* 0: Successfully
* ENOSYS: Function is not registered
*/
s32 pch_gbe_hal_read_mac_addr(struct pch_gbe_hw *hw)
{
if (!hw->func->read_mac_addr) {
struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
netdev_err(adapter->netdev, "ERROR: configuration\n");
return -ENOSYS;
}
return hw->func->read_mac_addr(hw);
}
/**
* pch_gbe_hal_power_up_phy - Power up PHY
* @hw: Pointer to the HW structure
*/
void pch_gbe_hal_power_up_phy(struct pch_gbe_hw *hw)
{
if (hw->func->power_up_phy)
hw->func->power_up_phy(hw);
}
/**
* pch_gbe_hal_power_down_phy - Power down PHY
* @hw: Pointer to the HW structure
*/
void pch_gbe_hal_power_down_phy(struct pch_gbe_hw *hw)
{
if (hw->func->power_down_phy)
hw->func->power_down_phy(hw);
}
drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_api.h deleted 100644 → 0
View file @ 5424ea27
/*
* Copyright (C) 1999 - 2010 Intel Corporation.
* Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD.
*
* This code was derived from the Intel e1000e Linux driver.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _PCH_GBE_API_H_
#define _PCH_GBE_API_H_
#include "pch_gbe_phy.h"
s32 pch_gbe_hal_setup_init_funcs(struct pch_gbe_hw *hw);
void pch_gbe_hal_get_bus_info(struct pch_gbe_hw *hw);
s32 pch_gbe_hal_init_hw(struct pch_gbe_hw *hw);
s32 pch_gbe_hal_read_phy_reg(struct pch_gbe_hw *hw, u32 offset, u16 *data);
s32 pch_gbe_hal_write_phy_reg(struct pch_gbe_hw *hw, u32 offset, u16 data);
void pch_gbe_hal_phy_hw_reset(struct pch_gbe_hw *hw);
void pch_gbe_hal_phy_sw_reset(struct pch_gbe_hw *hw);
s32 pch_gbe_hal_read_mac_addr(struct pch_gbe_hw *hw);
void pch_gbe_hal_power_up_phy(struct pch_gbe_hw *hw);
void pch_gbe_hal_power_down_phy(struct pch_gbe_hw *hw);
#endif
drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_ethtool.c
View file @ a055b02f
......@@ -17,7 +17,7 @@
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "pch_gbe.h"
#include "pch_gbe_api.h"
#include "pch_gbe_phy.h"
/**
* pch_gbe_stats - Stats item information
......@@ -125,7 +125,7 @@ static int pch_gbe_set_link_ksettings(struct net_device *netdev,
u32 advertising;
int ret;
pch_gbe_hal_write_phy_reg(hw, MII_BMCR, BMCR_RESET);
pch_gbe_phy_write_reg_miic(hw, MII_BMCR, BMCR_RESET);
memcpy(&copy_ecmd, ecmd, sizeof(*ecmd));
......@@ -204,7 +204,7 @@ static void pch_gbe_get_regs(struct net_device *netdev,
*regs_buff++ = ioread32(&hw->reg->INT_ST + i);
/* PHY register */
for (i = 0; i < PCH_GBE_PHY_REGS_LEN; i++) {
pch_gbe_hal_read_phy_reg(&adapter->hw, i, &tmp);
pch_gbe_phy_read_reg_miic(&adapter->hw, i, &tmp);
*regs_buff++ = tmp;
}
}
......@@ -349,25 +349,12 @@ static int pch_gbe_set_ringparam(struct net_device *netdev,
err = pch_gbe_setup_tx_resources(adapter, adapter->tx_ring);
if (err)
goto err_setup_tx;
/* save the new, restore the old in order to free it,
* then restore the new back again */
#ifdef RINGFREE
adapter->rx_ring = rx_old;
adapter->tx_ring = tx_old;
pch_gbe_free_rx_resources(adapter, adapter->rx_ring);
pch_gbe_free_tx_resources(adapter, adapter->tx_ring);
kfree(tx_old);
kfree(rx_old);
adapter->rx_ring = rxdr;
adapter->tx_ring = txdr;
#else
pch_gbe_free_rx_resources(adapter, rx_old);
pch_gbe_free_tx_resources(adapter, tx_old);
kfree(tx_old);
kfree(rx_old);
adapter->rx_ring = rxdr;
adapter->tx_ring = txdr;
#endif
err = pch_gbe_up(adapter);
}
return err;
......
drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c
View file @ a055b02f
......@@ -184,7 +184,7 @@ s32 pch_gbe_phy_write_reg_miic(struct pch_gbe_hw *hw, u32 offset, u16 data)
* pch_gbe_phy_sw_reset - PHY software reset
* @hw: Pointer to the HW structure
*/
void pch_gbe_phy_sw_reset(struct pch_gbe_hw *hw)
static void pch_gbe_phy_sw_reset(struct pch_gbe_hw *hw)
{
u16 phy_ctrl;
......
drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.h
View file @ a055b02f
......@@ -21,12 +21,10 @@
#define PCH_GBE_PHY_REGS_LEN 32
#define PCH_GBE_PHY_RESET_DELAY_US 10
#define PCH_GBE_MAC_IFOP_RGMII
s32 pch_gbe_phy_get_id(struct pch_gbe_hw *hw);
s32 pch_gbe_phy_read_reg_miic(struct pch_gbe_hw *hw, u32 offset, u16 *data);
s32 pch_gbe_phy_write_reg_miic(struct pch_gbe_hw *hw, u32 offset, u16 data);
void pch_gbe_phy_sw_reset(struct pch_gbe_hw *hw);
void pch_gbe_phy_hw_reset(struct pch_gbe_hw *hw);
void pch_gbe_phy_power_up(struct pch_gbe_hw *hw);
void pch_gbe_phy_power_down(struct pch_gbe_hw *hw);
......
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