Commit a0b18907 authored by Adam Belay's avatar Adam Belay

Merge http://linux.bkbits.net/linux-2.5

into neo.rr.com:/home/ambx1/linux/bk/linus-2.5
parents c0ccfc9c 366bf3a0
......@@ -1864,6 +1864,13 @@ S: Am Muehlenweg 38
S: D53424 Remagen
S: Germany
N: Colin Leroy
E: colin@colino.net
W: http://www.geekounet.org/
D: PowerMac adt7467 fan driver
S: Toulouse
S: France
N: Achim Leubner
E: achim_leubner@adaptec.com
D: GDT Disk Array Controller/Storage RAID controller driver
......
......@@ -136,7 +136,7 @@ PCI
IOMMU
iommu=[size][,noagp][,off][,force][,noforce][,leak][,memaper[=order]]
iommu=[size][,noagp][,off][,force][,noforce][,leak][,memaper[=order]][,soft]
size set size of iommu (in bytes)
noagp don't initialize the AGP driver and use full aperture.
off don't use the IOMMU
......@@ -144,5 +144,9 @@ IOMMU
memaper[=order] allocate an own aperture over RAM with size 32MB^order.
noforce don't force IOMMU usage. Default.
force Force IOMMU
soft Use software bounce buffering for non 32bit IO. Default on Intel
machines.
swiotlb=pages
Prereserve that many 4K pages for the software IO bounce buffering.
......@@ -188,7 +188,7 @@ config ALPHA_MIATA
help
The Digital PersonalWorkStation (PWS 433a, 433au, 500a, 500au, 600a,
or 600au). There is an Installation HOWTO for this hardware at
<http://members.brabant.chello.nl/~s.vandereijk/miata.html>.
<http://eijk.homelinux.org/~stefan/miata.html>.
config ALPHA_MIKASA
bool "Mikasa"
......@@ -486,19 +486,8 @@ config SMP
singleprocessor machines. On a singleprocessor machine, the kernel
will run faster if you say N here.
Note that if you say Y here and choose architecture "586" or
"Pentium" under "Processor family", the kernel will not work on 486
architectures. Similarly, multiprocessor kernels for the "PPro"
architecture may not work on all Pentium based boards.
People using multiprocessor machines who say Y here should also say
Y to "Enhanced Real Time Clock Support", below. The "Advanced Power
Management" code will be disabled if you say Y here.
See also the <file:Documentation/smp.txt>,
<file:Documentation/i386/IO-APIC.txt>,
<file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
<http://www.tldp.org/docs.html#howto>.
See also the <file:Documentation/smp.tex>, and the SMP-HOWTO
available at <http://www.tldp.org/docs.html#howto>.
If you don't know what to do here, say N.
......
This diff is collapsed.
......@@ -35,6 +35,9 @@
#include <asm/cacheflush.h>
#include <asm/vga.h>
#define __KERNEL_SYSCALLS__
#include <asm/unistd.h>
extern struct hwrpb_struct *hwrpb;
extern void dump_thread(struct pt_regs *, struct user *);
extern spinlock_t rtc_lock;
......
......@@ -24,6 +24,8 @@
* 2000-08-13 Jan-Benedict Glaw <jbglaw@lug-owl.de>
* Fixed time_init to be aware of epoches != 1900. This prevents
* booting up in 2048 for me;) Code is stolen from rtc.c.
* 2003-06-03 R. Scott Bailey <scott.bailey@eds.com>
* Tighten sanity in time_init from 1% (10,000 PPM) to 250 PPM
*/
#include <linux/config.h>
#include <linux/errno.h>
......@@ -306,7 +308,7 @@ void __init
time_init(void)
{
unsigned int year, mon, day, hour, min, sec, cc1, cc2, epoch;
unsigned long cycle_freq, one_percent;
unsigned long cycle_freq, tolerance;
long diff;
/* Calibrate CPU clock -- attempt #1. */
......@@ -324,13 +326,13 @@ time_init(void)
cycle_freq = hwrpb->cycle_freq;
if (est_cycle_freq) {
/* If the given value is within 1% of what we calculated,
/* If the given value is within 250 PPM of what we calculated,
accept it. Otherwise, use what we found. */
one_percent = cycle_freq / 100;
tolerance = cycle_freq / 4000;
diff = cycle_freq - est_cycle_freq;
if (diff < 0)
diff = -diff;
if ((unsigned long)diff > one_percent) {
if ((unsigned long)diff > tolerance) {
cycle_freq = est_cycle_freq;
printk("HWRPB cycle frequency bogus. "
"Estimated %lu Hz\n", cycle_freq);
......
......@@ -15,6 +15,7 @@
#include <linux/delay.h>
#include <linux/smp_lock.h>
#include <linux/module.h>
#include <linux/init.h>
#include <asm/gentrap.h>
#include <asm/uaccess.h>
......@@ -25,35 +26,37 @@
#include "proto.h"
/* data/code implementing a work-around for some SRMs which
mishandle opDEC faults
*/
static int opDEC_testing = 0;
static int opDEC_fix = 0;
static int opDEC_checked = 0;
static unsigned long opDEC_test_pc = 0;
/* Work-around for some SRMs which mishandle opDEC faults. */
static void
static int opDEC_fix;
static void __init
opDEC_check(void)
{
unsigned long test_pc;
if (opDEC_checked) return;
lock_kernel();
opDEC_testing = 1;
__asm__ __volatile__(
" br %0,1f\n"
"1: addq %0,8,%0\n"
" stq %0,%1\n"
" cvttq/svm $f31,$f31\n"
: "=&r"(test_pc), "=m"(opDEC_test_pc)
: );
opDEC_testing = 0;
opDEC_checked = 1;
unlock_kernel();
__asm__ __volatile__ (
/* Load the address of... */
" br $16, 1f\n"
/* A stub instruction fault handler. Just add 4 to the
pc and continue. */
" ldq $16, 8($sp)\n"
" addq $16, 4, $16\n"
" stq $16, 8($sp)\n"
" call_pal %[rti]\n"
/* Install the instruction fault handler. */
"1: lda $17, 3\n"
" call_pal %[wrent]\n"
/* With that in place, the fault from the round-to-minf fp
insn will arrive either at the "lda 4" insn (bad) or one
past that (good). This places the correct fixup in %0. */
" lda %[fix], 0\n"
" cvttq/svm $f31,$f31\n"
" lda %[fix], 4"
: [fix] "=r" (opDEC_fix)
: [rti] "n" (PAL_rti), [wrent] "n" (PAL_wrent)
: "$0", "$1", "$16", "$17", "$22", "$23", "$24", "$25");
if (opDEC_fix)
printk("opDEC fixup enabled.\n");
}
void
......@@ -244,7 +247,7 @@ do_entIF(unsigned long type, struct pt_regs *regs)
siginfo_t info;
int signo, code;
if (!opDEC_testing || type != 4) {
if (regs->ps == 0) {
if (type == 1) {
const unsigned int *data
= (const unsigned int *) regs->pc;
......@@ -359,14 +362,6 @@ do_entIF(unsigned long type, struct pt_regs *regs)
fault during the boot sequence and testing if
we get the correct PC. If not, we set a flag
to correct it every time through. */
if (opDEC_testing) {
if (regs->pc == opDEC_test_pc) {
opDEC_fix = 4;
regs->pc += 4;
printk("opDEC fixup enabled.\n");
}
return;
}
regs->pc += opDEC_fix;
/* EV4 does not implement anything except normal
......@@ -1083,22 +1078,22 @@ do_entUnaUser(void * va, unsigned long opcode,
return;
}
void
void __init
trap_init(void)
{
/* Tell PAL-code what global pointer we want in the kernel. */
register unsigned long gptr __asm__("$29");
wrkgp(gptr);
/* Hack for Multia (UDB) and JENSEN: some of their SRMs have
a bug in the handling of the opDEC fault. Fix it up if so. */
if (implver() == IMPLVER_EV4)
opDEC_check();
wrent(entArith, 1);
wrent(entMM, 2);
wrent(entIF, 3);
wrent(entUna, 4);
wrent(entSys, 5);
wrent(entDbg, 6);
/* Hack for Multia (UDB) and JENSEN: some of their SRMs have
a bug in the handling of the opDEC fault. Fix it up if so. */
if (implver() == IMPLVER_EV4)
opDEC_check();
}
This diff is collapsed.
......@@ -366,6 +366,17 @@ __setup("acpi_pic_sci=", acpi_pic_sci_setup);
#endif /* CONFIG_ACPI_BUS */
int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
{
#ifdef CONFIG_X86_IO_APIC
if (use_pci_vector() && !platform_legacy_irq(gsi))
*irq = IO_APIC_VECTOR(gsi);
else
#endif
*irq = gsi;
return 0;
}
static unsigned long __init
acpi_scan_rsdp (
unsigned long start,
......
......@@ -402,9 +402,9 @@ ENTRY(stub_rt_sigreturn)
/* 0(%rsp): interrupt number */
.macro interrupt func
CFI_STARTPROC simple
CFI_DEF_CFA rsp,(SS-ORIG_RAX)
CFI_OFFSET rsp,(RSP-SS)
CFI_OFFSET rip,(RIP-SS)
CFI_DEF_CFA rsp,(SS-RDI)
CFI_REL_OFFSET rsp,(RSP-ORIG_RAX)
CFI_REL_OFFSET rip,(RIP-ORIG_RAX)
cld
#ifdef CONFIG_DEBUG_INFO
SAVE_ALL
......@@ -805,6 +805,8 @@ ENTRY(debug)
paranoidentry do_debug
/* switch back to process stack to restore the state ptrace touched */
movq %rax,%rsp
testl $3,CS(%rsp)
jnz paranoid_userspace
jmp paranoid_exit
CFI_ENDPROC
......@@ -816,8 +818,6 @@ ENTRY(nmi)
paranoidentry do_nmi
/* ebx: no swapgs flag */
paranoid_exit:
testl $3,CS(%rsp)
jnz paranoid_userspace
testl %ebx,%ebx /* swapgs needed? */
jnz paranoid_restore
paranoid_swapgs:
......@@ -870,6 +870,8 @@ ENTRY(double_fault)
CFI_STARTPROC
paranoidentry do_double_fault
movq %rax,%rsp
testl $3,CS(%rsp)
jnz paranoid_userspace
jmp paranoid_exit
CFI_ENDPROC
......@@ -884,6 +886,8 @@ ENTRY(stack_segment)
CFI_STARTPROC
paranoidentry do_stack_segment
movq %rax,%rsp
testl $3,CS(%rsp)
jnz paranoid_userspace
jmp paranoid_exit
CFI_ENDPROC
......
......@@ -22,12 +22,13 @@
#include <asm/uaccess.h>
#define MISC_MCELOG_MINOR 227
#define NR_BANKS 5
static int mce_disabled __initdata;
/* 0: always panic, 1: panic if deadlock possible, 2: try to avoid panic */
static int tolerant = 2;
static int banks;
static unsigned long disabled_banks;
static unsigned long bank[NR_BANKS] = { [0 ... NR_BANKS-1] = ~0UL };
/*
* Lockless MCE logging infrastructure.
......@@ -144,7 +145,7 @@ void do_machine_check(struct pt_regs * regs, long error_code)
mb();
for (i = 0; i < banks; i++) {
if (test_bit(i, &disabled_banks))
if (!bank[i])
continue;
rdmsrl(MSR_IA32_MC0_STATUS + i*4, m.status);
......@@ -179,7 +180,7 @@ void do_machine_check(struct pt_regs * regs, long error_code)
confused it's normally not necessary to panic, unless you are
paranoid (tolerant == 0) */
if (!user_space && (panic_on_oops || tolerant < 2))
mce_panic("Uncorrected machine check in kernel", &m, mcestart);
mce_panic("Uncorrected machine check", &m, mcestart);
/* do_exit takes an awful lot of locks and has as slight risk
of deadlocking. If you don't want that don't set tolerant >= 2 */
......@@ -238,17 +239,31 @@ static void mce_init(void *dummy)
wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
banks = cap & 0xff;
if (banks > NR_BANKS) {
printk(KERN_INFO "MCE: warning: using only %d banks\n", banks);
banks = NR_BANKS;
}
mce_clear_all();
for (i = 0; i < banks; i++) {
u64 val = test_bit(i, &disabled_banks) ? 0 : ~0UL;
wrmsrl(MSR_IA32_MC0_CTL+4*i, val);
wrmsrl(MSR_IA32_MC0_CTL+4*i, bank[i]);
wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0);
}
set_in_cr4(X86_CR4_MCE);
}
/* Add per CPU specific workarounds here */
static void __init mce_cpu_quirks(struct cpuinfo_x86 *c)
{
/* This should be disabled by the BIOS, but isn't always */
if (c->x86_vendor == X86_VENDOR_AMD && c->x86 == 15) {
/* disable GART TBL walk error reporting, which trips off
incorrectly with the IOMMU & 3ware & Cerberus. */
clear_bit(10, &bank[4]);
}
}
/*
* Called for each booted CPU to set up machine checks.
* Must be called with preempt off.
......@@ -257,6 +272,8 @@ void __init mcheck_init(struct cpuinfo_x86 *c)
{
static unsigned long mce_cpus __initdata = 0;
mce_cpu_quirks(c);
if (test_and_set_bit(smp_processor_id(), &mce_cpus) || !mce_available(c))
return;
......@@ -343,23 +360,9 @@ static int mce_ioctl(struct inode *i, struct file *f,unsigned int cmd, unsigned
}
}
#if 0 /* for testing */
static ssize_t mce_write(struct file *f, const char __user *buf, size_t sz, loff_t *off)
{
struct mce m;
if (sz != sizeof(struct mce))
return -EINVAL;
copy_from_user(&m, buf, sizeof(struct mce));
m.finished = 0;
mce_log(&m);
return sizeof(struct mce);
}
#endif
static struct file_operations mce_chrdev_ops = {
.read = mce_read,
.ioctl = mce_ioctl,
//.write = mce_write
};
static struct miscdevice mce_log_device = {
......@@ -425,23 +428,27 @@ static struct sys_device device_mce = {
};
/* Why are there no generic functions for this? */
#define ACCESSOR(name, start) \
#define ACCESSOR(name, var, start) \
static ssize_t show_ ## name(struct sys_device *s, char *buf) { \
return sprintf(buf, "%lu\n", (unsigned long)name); \
return sprintf(buf, "%lu\n", (unsigned long)var); \
} \
static ssize_t set_ ## name(struct sys_device *s,const char *buf,size_t siz) { \
char *end; \
unsigned long new = simple_strtoul(buf, &end, 0); \
if (end == buf) return -EINVAL; \
name = new; \
var = new; \
start; \
return end-buf; \
} \
static SYSDEV_ATTR(name, 0644, show_ ## name, set_ ## name);
ACCESSOR(disabled_banks,mce_restart())
ACCESSOR(tolerant,)
ACCESSOR(check_interval,mce_restart())
ACCESSOR(bank0ctl,bank[0],mce_restart())
ACCESSOR(bank1ctl,bank[1],mce_restart())
ACCESSOR(bank2ctl,bank[2],mce_restart())
ACCESSOR(bank3ctl,bank[3],mce_restart())
ACCESSOR(bank4ctl,bank[4],mce_restart())
ACCESSOR(tolerant,tolerant,)
ACCESSOR(check_interval,check_interval,mce_restart())
static __init int mce_init_device(void)
{
......@@ -453,7 +460,11 @@ static __init int mce_init_device(void)
err = sysdev_register(&device_mce);
if (!err) {
/* could create per CPU objects, but is not worth it. */
sysdev_create_file(&device_mce, &attr_disabled_banks);
sysdev_create_file(&device_mce, &attr_bank0ctl);
sysdev_create_file(&device_mce, &attr_bank1ctl);
sysdev_create_file(&device_mce, &attr_bank2ctl);
sysdev_create_file(&device_mce, &attr_bank3ctl);
sysdev_create_file(&device_mce, &attr_bank4ctl);
sysdev_create_file(&device_mce, &attr_tolerant);
sysdev_create_file(&device_mce, &attr_check_interval);
}
......
......@@ -9,7 +9,7 @@
* Erich Boleyn : MP v1.4 and additional changes.
* Alan Cox : Added EBDA scanning
* Ingo Molnar : various cleanups and rewrites
* Maciej W. Rozycki : Bits for default MP configurations
* Maciej W. Rozycki: Bits for default MP configurations
* Paul Diefenbaugh: Added full ACPI support
*/
......@@ -690,25 +690,25 @@ void __init mp_register_lapic (
struct mp_ioapic_routing {
int apic_id;
int irq_start;
int irq_end;
int gsi_start;
int gsi_end;
u32 pin_programmed[4];
} mp_ioapic_routing[MAX_IO_APICS];
static int __init mp_find_ioapic (
int irq)
int gsi)
{
int i = 0;
/* Find the IOAPIC that manages this IRQ. */
/* Find the IOAPIC that manages this GSI. */
for (i = 0; i < nr_ioapics; i++) {
if ((irq >= mp_ioapic_routing[i].irq_start)
&& (irq <= mp_ioapic_routing[i].irq_end))
if ((gsi >= mp_ioapic_routing[i].gsi_start)
&& (gsi <= mp_ioapic_routing[i].gsi_end))
return i;
}
printk(KERN_ERR "ERROR: Unable to locate IOAPIC for IRQ %d\n", irq);
printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi);
return -1;
}
......@@ -717,7 +717,7 @@ static int __init mp_find_ioapic (
void __init mp_register_ioapic (
u8 id,
u32 address,
u32 irq_base)
u32 gsi_base)
{
int idx = 0;
......@@ -743,19 +743,19 @@ void __init mp_register_ioapic (
mp_ioapics[idx].mpc_apicver = io_apic_get_version(idx);
/*
* Build basic IRQ lookup table to facilitate irq->io_apic lookups
* Build basic IRQ lookup table to facilitate gsi->io_apic lookups
* and to prevent reprogramming of IOAPIC pins (PCI IRQs).
*/
mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mpc_apicid;
mp_ioapic_routing[idx].irq_start = irq_base;
mp_ioapic_routing[idx].irq_end = irq_base +
mp_ioapic_routing[idx].gsi_start = gsi_base;
mp_ioapic_routing[idx].gsi_end = gsi_base +
io_apic_get_redir_entries(idx);
printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%x, "
"IRQ %d-%d\n", idx, mp_ioapics[idx].mpc_apicid,
"GSI %d-%d\n", idx, mp_ioapics[idx].mpc_apicid,
mp_ioapics[idx].mpc_apicver, mp_ioapics[idx].mpc_apicaddr,
mp_ioapic_routing[idx].irq_start,
mp_ioapic_routing[idx].irq_end);
mp_ioapic_routing[idx].gsi_start,
mp_ioapic_routing[idx].gsi_end);
return;
}
......@@ -765,7 +765,7 @@ void __init mp_override_legacy_irq (
u8 bus_irq,
u8 polarity,
u8 trigger,
u32 global_irq)
u32 gsi)
{
struct mpc_config_intsrc intsrc;
int i = 0;
......@@ -774,12 +774,12 @@ void __init mp_override_legacy_irq (
int pin = -1;
/*
* Convert 'global_irq' to 'ioapic.pin'.
* Convert 'gsi' to 'ioapic.pin'.
*/
ioapic = mp_find_ioapic(global_irq);
ioapic = mp_find_ioapic(gsi);
if (ioapic < 0)
return;
pin = global_irq - mp_ioapic_routing[ioapic].irq_start;
pin = gsi - mp_ioapic_routing[ioapic].gsi_start;
/*
* TBD: This check is for faulty timer entries, where the override
......@@ -804,7 +804,7 @@ void __init mp_override_legacy_irq (
/*
* If an existing [IOAPIC.PIN -> IRQ] routing entry exists we override it.
* Otherwise create a new entry (e.g. global_irq == 2).
* Otherwise create a new entry (e.g. gsi == 2).
*/
for (i = 0; i < mp_irq_entries; i++) {
if ((mp_irqs[i].mpc_srcbus == intsrc.mpc_srcbus)
......@@ -878,7 +878,7 @@ void __init mp_config_acpi_legacy_irqs (void)
extern FADT_DESCRIPTOR acpi_fadt;
void __init mp_config_ioapic_for_sci(int irq)
void __init mp_config_ioapic_for_sci(u32 gsi)
{
#ifdef CONFIG_ACPI_INTERPRETER
int ioapic;
......@@ -926,11 +926,11 @@ void __init mp_config_ioapic_for_sci(int irq)
*/
flags = entry->flags;
acpi_fadt.sci_int = entry->global_irq;
irq = entry->global_irq;
gsi = entry->global_irq;
ioapic = mp_find_ioapic(irq);
ioapic = mp_find_ioapic(gsi);
ioapic_pin = irq - mp_ioapic_routing[ioapic].irq_start;
ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_start;
/*
* MPS INTI flags:
......@@ -938,7 +938,7 @@ void __init mp_config_ioapic_for_sci(int irq)
* polarity: 0=default, 1=high, 3=low
* Per ACPI spec, default for SCI means level/low.
*/
io_apic_set_pci_routing(ioapic, ioapic_pin, irq,
io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
(flags.trigger == 1 ? 0 : 1), (flags.polarity == 1 ? 0 : 1));
#endif
}
......@@ -951,7 +951,7 @@ void __init mp_parse_prt (void)
struct acpi_prt_entry *entry = NULL;
int ioapic = -1;
int ioapic_pin = 0;
int irq = 0;
int gsi = 0;
int idx, bit = 0;
int edge_level = 0;
int active_high_low = 0;
......@@ -963,30 +963,30 @@ void __init mp_parse_prt (void)
list_for_each(node, &acpi_prt.entries) {
entry = list_entry(node, struct acpi_prt_entry, node);
/* Need to get irq for dynamic entry */
/* Need to get gsi for dynamic entry */
if (entry->link.handle) {
irq = acpi_pci_link_get_irq(entry->link.handle, entry->link.index, &edge_level, &active_high_low);
if (!irq)
gsi = acpi_pci_link_get_irq(entry->link.handle, entry->link.index, &edge_level, &active_high_low);
if (!gsi)
continue;
} else {
/* Hardwired IRQ. Assume PCI standard settings */
irq = entry->link.index;
/* Hardwired GSI. Assume PCI standard settings */
gsi = entry->link.index;
edge_level = 1;
active_high_low = 1;
}
/* Don't set up the ACPI SCI because it's already set up */
if (acpi_fadt.sci_int == irq)
if (acpi_fadt.sci_int == gsi)
continue;
ioapic = mp_find_ioapic(irq);
ioapic = mp_find_ioapic(gsi);
if (ioapic < 0)
continue;
ioapic_pin = irq - mp_ioapic_routing[ioapic].irq_start;
ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_start;
/*
* Avoid pin reprogramming. PRTs typically include entries
* with redundant pin->irq mappings (but unique PCI devices);
* with redundant pin->gsi mappings (but unique PCI devices);
* we only only program the IOAPIC on the first.
*/
bit = ioapic_pin % 32;
......@@ -1000,20 +1000,16 @@ void __init mp_parse_prt (void)
if ((1<<bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {
Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
if (use_pci_vector() && !platform_legacy_irq(irq))
irq = IO_APIC_VECTOR(irq);
entry->irq = irq;
acpi_gsi_to_irq(gsi, &entry->irq);
continue;
}
mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit);
if (!io_apic_set_pci_routing(ioapic, ioapic_pin, irq, edge_level, active_high_low)) {
if (use_pci_vector() && !platform_legacy_irq(irq))
irq = IO_APIC_VECTOR(irq);
entry->irq = irq;
if (!io_apic_set_pci_routing(ioapic, ioapic_pin, gsi, edge_level, active_high_low)) {
acpi_gsi_to_irq(gsi, &entry->irq);
}
printk(KERN_DEBUG "%02x:%02x:%02x[%c] -> %d-%d"
" -> IRQ %d\n", entry->id.segment, entry->id.bus,
printk(KERN_DEBUG "%02x:%02x:%02x[%c] -> %d-%d -> IRQ %d\n",
entry->id.segment, entry->id.bus,
entry->id.device, ('A' + entry->pin),
mp_ioapic_routing[ioapic].apic_id, ioapic_pin,
entry->irq);
......
......@@ -21,6 +21,7 @@
#include <linux/pci.h>
#include <linux/module.h>
#include <linux/topology.h>
#include <linux/interrupt.h>
#include <asm/atomic.h>
#include <asm/io.h>
#include <asm/mtrr.h>
......@@ -31,6 +32,12 @@
#include <asm/kdebug.h>
#include <asm/proto.h>
#ifdef CONFIG_PREEMPT
#define preempt_atomic() in_atomic()
#else
#define preempt_atomic() 1
#endif
dma_addr_t bad_dma_address;
unsigned long iommu_bus_base; /* GART remapping area (physical) */
......@@ -96,6 +103,8 @@ AGPEXTERN __u32 *agp_gatt_table;
static unsigned long next_bit; /* protected by iommu_bitmap_lock */
static int need_flush; /* global flush state. set for each gart wrap */
static dma_addr_t pci_map_area(struct pci_dev *dev, unsigned long phys_mem,
size_t size, int dir);
static unsigned long alloc_iommu(int size)
{
......@@ -169,43 +178,44 @@ static void flush_gart(struct pci_dev *dev)
/*
* Allocate memory for a consistent mapping.
* All mappings are consistent here, so this is just a wrapper around
* pci_map_single.
*/
void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
dma_addr_t *dma_handle)
{
void *memory;
int gfp = GFP_ATOMIC;
unsigned long dma_mask;
int gfp = preempt_atomic() ? GFP_ATOMIC : GFP_KERNEL;
unsigned long dma_mask = 0;
u64 bus;
if (hwdev == NULL) {
gfp |= GFP_DMA;
dma_mask = 0xffffffff;
} else {
if (hwdev)
dma_mask = hwdev->dev.coherent_dma_mask;
}
if (dma_mask == 0)
dma_mask = 0xffffffff;
if (dma_mask < 0xffffffff || no_iommu)
gfp |= GFP_DMA;
/* Kludge to make it bug-to-bug compatible with i386. i386
uses the normal dma_mask for alloc_consistent. */
dma_mask &= hwdev->dma_mask;
again:
memory = (void *)__get_free_pages(gfp, get_order(size));
if (memory == NULL) {
if (memory == NULL)
return NULL;
} else {
{
int high, mmu;
high = ((unsigned long)virt_to_bus(memory) + size) >= dma_mask;
bus = virt_to_bus(memory);
high = (bus + size) >= dma_mask;
mmu = high;
if (force_iommu && !(gfp & GFP_DMA))
mmu = 1;
if (no_iommu) {
if (high) goto error;
if (no_iommu || dma_mask < 0xffffffffUL) {
if (high) {
if (!(gfp & GFP_DMA)) {
gfp |= GFP_DMA;
goto again;
}
goto free;
}
mmu = 0;
}
memset(memory, 0, size);
......@@ -215,15 +225,16 @@ void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
}
}
*dma_handle = pci_map_single(hwdev, memory, size, 0);
*dma_handle = pci_map_area(hwdev, bus, size, PCI_DMA_BIDIRECTIONAL);
if (*dma_handle == bad_dma_address)
goto error;
flush_gart(hwdev);
return memory;
error:
if (panic_on_overflow)
panic("pci_map_single: overflow %lu bytes\n", size);
panic("pci_alloc_consistent: overflow %lu bytes\n", size);
free:
free_pages((unsigned long)memory, get_order(size));
return NULL;
}
......@@ -608,6 +619,7 @@ EXPORT_SYMBOL(pci_unmap_single);
EXPORT_SYMBOL(pci_dma_supported);
EXPORT_SYMBOL(no_iommu);
EXPORT_SYMBOL(force_iommu);
EXPORT_SYMBOL(bad_dma_address);
static __init unsigned long check_iommu_size(unsigned long aper, u64 aper_size)
{
......@@ -733,7 +745,7 @@ static int __init pci_iommu_init(void)
if (swiotlb) {
no_iommu = 1;
printk(KERN_INFO "PCI-DMA: Using SWIOTLB :-(\n");
printk(KERN_INFO "PCI-DMA: Using software bounce buffering for IO (SWIOTLB)\n");
return -1;
}
......@@ -837,6 +849,7 @@ fs_initcall(pci_iommu_init);
forcesac For SAC mode for masks <40bits (experimental)
fullflush Flush IOMMU on each allocation (default)
nofullflush Don't use IOMMU fullflush
soft Use software bounce buffering (default for Intel machines)
*/
__init int iommu_setup(char *opt)
{
......@@ -876,6 +889,8 @@ __init int iommu_setup(char *opt)
iommu_fullflush = 1;
if (!memcmp(p, "nofullflush", 11))
iommu_fullflush = 0;
if (!memcmp(p, "soft", 4))
swiotlb = 1;
#ifdef CONFIG_IOMMU_LEAK
if (!memcmp(p,"leak", 4)) {
leak_trace = 1;
......
......@@ -32,6 +32,7 @@
#include <linux/delay.h>
#include <linux/irq.h>
#include <linux/ptrace.h>
#include <linux/version.h>
#include <asm/uaccess.h>
#include <asm/pgtable.h>
......@@ -205,7 +206,8 @@ void __show_regs(struct pt_regs * regs)
printk("\n");
print_modules();
printk("Pid: %d, comm: %.20s %s\n", current->pid, current->comm, print_tainted());
printk("Pid: %d, comm: %.20s %s %s\n",
current->pid, current->comm, print_tainted(), UTS_RELEASE);
printk("RIP: %04lx:[<%016lx>] ", regs->cs & 0xffff, regs->rip);
printk_address(regs->rip);
printk("\nRSP: %04lx:%016lx EFLAGS: %08lx\n", regs->ss, regs->rsp, regs->eflags);
......
......@@ -232,7 +232,7 @@ static __init void parse_cmdline_early (char ** cmdline_p)
if (!memcmp(from, "noapic", 6))
skip_ioapic_setup = 1;
if (!memcmp(from, "apic", 6)) {
if (!memcmp(from, "apic", 4)) {
skip_ioapic_setup = 0;
ioapic_force = 1;
}
......@@ -453,9 +453,7 @@ void __init setup_arch(char **cmdline_p)
paging_init();
#ifndef CONFIG_SMP
/* Temporary hack: disable the IO-APIC for UP Nvidia and
This is until we sort out the ACPI problems. */
if (!acpi_disabled)
/* Temporary hack: disable the IO-APIC for UP Nvidia and VIA. */
check_ioapic();
#endif
#ifdef CONFIG_ACPI_BOOT
......
......@@ -405,10 +405,10 @@ void __init mem_init(void)
int tmp;
#ifdef CONFIG_SWIOTLB
if (!iommu_aperture && end_pfn >= 0xffffffff>>PAGE_SHIFT) {
swiotlb_init();
if (!iommu_aperture && end_pfn >= 0xffffffff>>PAGE_SHIFT)
swiotlb = 1;
}
if (swiotlb)
swiotlb_init();
#endif
/* How many end-of-memory variables you have, grandma! */
......
......@@ -88,7 +88,7 @@ static int __init pci_mmcfg_init(void)
return 0;
}
printk(KERN_INFO "PCI: Using MMCONFIG at %lx\n", pci_mmcfg_base_addr);
printk(KERN_INFO "PCI: Using MMCONFIG at %x\n", pci_mmcfg_base_addr);
raw_pci_ops = &pci_mmcfg;
pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF;
......
......@@ -110,6 +110,8 @@ static int rtc_has_irq = 1;
#define hpet_rtc_timer_init() do { } while (0)
#define hpet_rtc_dropped_irq() 0
static inline irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs) {return 0;}
#else
extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
#endif
/*
......
......@@ -2481,19 +2481,18 @@ static int con_open(struct tty_struct *tty, struct file * filp)
return 0;
}
static void con_close(struct tty_struct *tty, struct file * filp)
static void con_close(struct tty_struct *tty, struct file *filp)
{
struct vt_struct *vt;
if (!tty || tty->count != 1)
return;
vcs_remove_devfs(tty);
acquire_console_sem();
vt = (struct vt_struct*)tty->driver_data;
if (vt)
vc_cons[vt->vc_num].d->vc_tty = NULL;
tty->driver_data = 0;
if (tty && tty->count == 1) {
struct vt_struct *vt;
vcs_remove_devfs(tty);
vt = tty->driver_data;
if (vt)
vc_cons[vt->vc_num].d->vc_tty = NULL;
tty->driver_data = 0;
}
release_console_sem();
}
......
......@@ -175,8 +175,8 @@ config THERM_WINDTUNNEL
This driver provides some thermostat and fan control for the desktop
G4 "Windtunnel"
config THERM_ADT7467
tristate "Support for thermal mgmnt on laptops with ADT 7467 chipset"
config THERM_ADT746X
tristate "Support for thermal mgmnt on laptops with ADT 746x chipset"
depends on I2C && I2C_KEYWEST && PPC_PMAC && !PPC_PMAC64
help
This driver provides some thermostat and fan control for the
......
......@@ -25,4 +25,4 @@ obj-$(CONFIG_ADB_MACIO) += macio-adb.o
obj-$(CONFIG_THERM_PM72) += therm_pm72.o
obj-$(CONFIG_THERM_WINDTUNNEL) += therm_windtunnel.o
obj-$(CONFIG_THERM_ADT7467) += therm_adt7467.o
obj-$(CONFIG_THERM_ADT746X) += therm_adt746x.o
......@@ -49,7 +49,7 @@ static int limit_adjust = 0;
static int fan_speed = -1;
MODULE_AUTHOR("Colin Leroy <colin@colino.net>");
MODULE_DESCRIPTION("Driver for ADT7467 thermostat in iBook G4");
MODULE_DESCRIPTION("Driver for ADT746x thermostat in iBook G4 and Powerbook G4 Alu");
MODULE_LICENSE("GPL");
MODULE_PARM(limit_adjust,"i");
......@@ -161,7 +161,7 @@ detach_thermostat(struct i2c_adapter *adapter)
}
static struct i2c_driver thermostat_driver = {
.name ="Apple Thermostat ADT7467",
.name ="Apple Thermostat ADT746x",
.id =0xDEAD7467,
.flags =I2C_DF_NOTIFY,
.attach_adapter =&attach_thermostat,
......@@ -494,9 +494,6 @@ thermostat_init(void)
struct device_node* np;
u32 *prop;
/* Currently, we only deal with the iBook G4, we will support
* all "2003" powerbooks later on
*/
np = of_find_node_by_name(NULL, "fan");
if (!np)
return -ENODEV;
......
......@@ -33,7 +33,7 @@
#include <scsi/scsi_transport.h>
#include <scsi/scsi_transport_spi.h>
#define SPI_PRINTK(x, l, f, a...) printk(l "scsi(%d:%d:%d:%d): " f, (x)->host->host_no, (x)->channel, (x)->id, (x)->lun, ##a)
#define SPI_PRINTK(x, l, f, a...) printk(l "scsi(%d:%d:%d:%d): " f, (x)->host->host_no, (x)->channel, (x)->id, (x)->lun , ##a)
static void transport_class_release(struct class_device *class_dev);
......
......@@ -109,6 +109,8 @@ extern int acpi_strict;
/* Fixmap pages to reserve for ACPI boot-time tables (see fixmap.h) */
#define FIX_ACPI_PAGES 4
extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq);
#else /* !CONFIG_ACPI_BOOT */
#define acpi_lapic 0
#define acpi_ioapic 0
......
......@@ -35,28 +35,28 @@
subq $9*8+\addskip,%rsp
CFI_ADJUST_CFA_OFFSET 9*8+\addskip
movq %rdi,8*8(%rsp)
CFI_OFFSET rdi,8*8-(9*8+\addskip)
CFI_REL_OFFSET rdi,8*8
movq %rsi,7*8(%rsp)
CFI_OFFSET rsi,7*8-(9*8+\addskip)
CFI_REL_OFFSET rsi,7*8
movq %rdx,6*8(%rsp)
CFI_OFFSET rdx,6*8-(9*8+\addskip)
CFI_REL_OFFSET rdx,6*8
.if \norcx
.else
movq %rcx,5*8(%rsp)
CFI_OFFSET rcx,5*8-(9*8+\addskip)
CFI_REL_OFFSET rcx,5*8
.endif
movq %rax,4*8(%rsp)
CFI_OFFSET rax,4*8-(9*8+\addskip)
CFI_REL_OFFSET rax,4*8
.if \nor891011
.else
movq %r8,3*8(%rsp)
CFI_OFFSET r8,3*8-(9*8+\addskip)
CFI_REL_OFFSET r8,3*8
movq %r9,2*8(%rsp)
CFI_OFFSET r9,2*8-(9*8+\addskip)
CFI_REL_OFFSET r9,2*8
movq %r10,1*8(%rsp)
CFI_OFFSET r10,1*8-(9*8+\addskip)
CFI_REL_OFFSET r10,1*8
movq %r11,(%rsp)
CFI_OFFSET r11,-(9*8+\addskip)
CFI_OFFSET r11
.endif
.endm
......@@ -109,17 +109,17 @@
subq $REST_SKIP,%rsp
CFI_ADJUST_CFA_OFFSET REST_SKIP
movq %rbx,5*8(%rsp)
CFI_OFFSET rbx,5*8-(REST_SKIP)
CFI_REL_OFFSET rbx,5*8
movq %rbp,4*8(%rsp)
CFI_OFFSET rbp,4*8-(REST_SKIP)
CFI_REL_OFFSET rbp,4*8
movq %r12,3*8(%rsp)
CFI_OFFSET r12,3*8-(REST_SKIP)
CFI_REL_OFFSET r12,3*8
movq %r13,2*8(%rsp)
CFI_OFFSET r13,2*8-(REST_SKIP)
CFI_REL_OFFSET r13,2*8
movq %r14,1*8(%rsp)
CFI_OFFSET r14,1*8-(REST_SKIP)
CFI_REL_OFFSET r14,1*8
movq %r15,(%rsp)
CFI_OFFSET r15,0*8-(REST_SKIP)
CFI_REL_OFFSET r15,0*8
.endm
.macro RESTORE_REST
......
......@@ -78,6 +78,7 @@
#ifdef CONFIG_PREEMPT
# include <linux/smp_lock.h>
# define in_atomic() ((preempt_count() & ~PREEMPT_ACTIVE) != kernel_locked())
# define IRQ_EXIT_OFFSET (HARDIRQ_OFFSET-1)
#else
......
#ifndef _ASM_X8664_HPET_H
#define _ASM_X8664_HPET_H 1
#include <linux/interrupt.h>
/*
* Documentation on HPET can be found at:
* http://www.intel.com/ial/home/sp/pcmmspec.htm
......@@ -53,7 +51,6 @@ extern int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned ch
extern int hpet_set_periodic_freq(unsigned long freq);
extern int hpet_rtc_dropped_irq(void);
extern int hpet_rtc_timer_init(void);
extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
#endif /* CONFIG_HPET_EMULATE_RTC */
#endif
......@@ -186,14 +186,14 @@ extern void mp_register_lapic (u8 id, u8 enabled);
extern void mp_register_lapic_address (u64 address);
#ifdef CONFIG_X86_IO_APIC
extern void mp_register_ioapic (u8 id, u32 address, u32 irq_base);
extern void mp_override_legacy_irq (u8 bus_irq, u8 polarity, u8 trigger, u32 global_irq);
extern void mp_register_ioapic (u8 id, u32 address, u32 gsi_base);
extern void mp_override_legacy_irq (u8 bus_irq, u8 polarity, u8 trigger, u32 gsi);
extern void mp_config_acpi_legacy_irqs (void);
extern void mp_parse_prt (void);
#endif /*CONFIG_X86_IO_APIC*/
#endif
extern void mp_config_ioapic_for_sci(int irq);
extern void mp_config_ioapic_for_sci(u32 gsi);
extern int using_apic_timer;
......
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