Commit a1ef48e1 authored by David S. Miller's avatar David S. Miller

Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue

Jeff Kirsher says:

====================
Intel Wired LAN Driver Updates 2015-09-17

This series contains updates to i40e and i40evf.

Shannon provides updates to i40e and i40evf to resolve an issue with the
nvmupdate utility.  First renames a variable name to reduce confusion and
to differentiate it from the actual user variable.  Then added the ability
to save the admin queue write back descriptor if a caller supplies a
buffer for it to be saved into.  Added a new GetStatus command so that
the NVM update tool can query the current status instead of doing fake
write requests to probe for readiness.  Added wait states to the NVM
update state machine to signify when waiting for an update operation to
finish, whether we are in the middle of a set of write operations, or we
are now idle but waiting.  Then added a facility to run admin queue
commands through the NVM update utility in order to allow the update
tools to interact with the firmware and do special commands needed for
updates and configuration changes.  Also added a facility to recover the
result of a previously run admin queue command.
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents eaf9a992 f91638af
...@@ -657,6 +657,9 @@ i40e_status i40e_shutdown_adminq(struct i40e_hw *hw) ...@@ -657,6 +657,9 @@ i40e_status i40e_shutdown_adminq(struct i40e_hw *hw)
/* destroy the locks */ /* destroy the locks */
if (hw->nvm_buff.va)
i40e_free_virt_mem(hw, &hw->nvm_buff);
return ret_code; return ret_code;
} }
...@@ -889,6 +892,10 @@ i40e_status i40e_asq_send_command(struct i40e_hw *hw, ...@@ -889,6 +892,10 @@ i40e_status i40e_asq_send_command(struct i40e_hw *hw,
"AQTX: desc and buffer writeback:\n"); "AQTX: desc and buffer writeback:\n");
i40e_debug_aq(hw, I40E_DEBUG_AQ_COMMAND, (void *)desc, buff, buff_size); i40e_debug_aq(hw, I40E_DEBUG_AQ_COMMAND, (void *)desc, buff, buff_size);
/* save writeback aq if requested */
if (details->wb_desc)
*details->wb_desc = *desc_on_ring;
/* update the error if time out occurred */ /* update the error if time out occurred */
if ((!cmd_completed) && if ((!cmd_completed) &&
(!details->async && !details->postpone)) { (!details->async && !details->postpone)) {
...@@ -1014,6 +1021,19 @@ i40e_status i40e_clean_arq_element(struct i40e_hw *hw, ...@@ -1014,6 +1021,19 @@ i40e_status i40e_clean_arq_element(struct i40e_hw *hw,
i40e_release_nvm(hw); i40e_release_nvm(hw);
hw->aq.nvm_release_on_done = false; hw->aq.nvm_release_on_done = false;
} }
switch (hw->nvmupd_state) {
case I40E_NVMUPD_STATE_INIT_WAIT:
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
break;
case I40E_NVMUPD_STATE_WRITE_WAIT:
hw->nvmupd_state = I40E_NVMUPD_STATE_WRITING;
break;
default:
break;
}
} }
return ret_code; return ret_code;
......
...@@ -69,6 +69,7 @@ struct i40e_asq_cmd_details { ...@@ -69,6 +69,7 @@ struct i40e_asq_cmd_details {
u16 flags_dis; u16 flags_dis;
bool async; bool async;
bool postpone; bool postpone;
struct i40e_aq_desc *wb_desc;
}; };
#define I40E_ADMINQ_DETAILS(R, i) \ #define I40E_ADMINQ_DETAILS(R, i) \
......
...@@ -39,7 +39,7 @@ static const char i40e_driver_string[] = ...@@ -39,7 +39,7 @@ static const char i40e_driver_string[] =
#define DRV_VERSION_MAJOR 1 #define DRV_VERSION_MAJOR 1
#define DRV_VERSION_MINOR 3 #define DRV_VERSION_MINOR 3
#define DRV_VERSION_BUILD 9 #define DRV_VERSION_BUILD 21
#define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \ #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
__stringify(DRV_VERSION_MINOR) "." \ __stringify(DRV_VERSION_MINOR) "." \
__stringify(DRV_VERSION_BUILD) DRV_KERN __stringify(DRV_VERSION_BUILD) DRV_KERN
......
This diff is collapsed.
...@@ -305,12 +305,17 @@ enum i40e_nvmupd_cmd { ...@@ -305,12 +305,17 @@ enum i40e_nvmupd_cmd {
I40E_NVMUPD_CSUM_CON, I40E_NVMUPD_CSUM_CON,
I40E_NVMUPD_CSUM_SA, I40E_NVMUPD_CSUM_SA,
I40E_NVMUPD_CSUM_LCB, I40E_NVMUPD_CSUM_LCB,
I40E_NVMUPD_STATUS,
I40E_NVMUPD_EXEC_AQ,
I40E_NVMUPD_GET_AQ_RESULT,
}; };
enum i40e_nvmupd_state { enum i40e_nvmupd_state {
I40E_NVMUPD_STATE_INIT, I40E_NVMUPD_STATE_INIT,
I40E_NVMUPD_STATE_READING, I40E_NVMUPD_STATE_READING,
I40E_NVMUPD_STATE_WRITING I40E_NVMUPD_STATE_WRITING,
I40E_NVMUPD_STATE_INIT_WAIT,
I40E_NVMUPD_STATE_WRITE_WAIT,
}; };
/* nvm_access definition and its masks/shifts need to be accessible to /* nvm_access definition and its masks/shifts need to be accessible to
...@@ -329,6 +334,7 @@ enum i40e_nvmupd_state { ...@@ -329,6 +334,7 @@ enum i40e_nvmupd_state {
#define I40E_NVM_SA (I40E_NVM_SNT | I40E_NVM_LCB) #define I40E_NVM_SA (I40E_NVM_SNT | I40E_NVM_LCB)
#define I40E_NVM_ERA 0x4 #define I40E_NVM_ERA 0x4
#define I40E_NVM_CSUM 0x8 #define I40E_NVM_CSUM 0x8
#define I40E_NVM_EXEC 0xf
#define I40E_NVM_ADAPT_SHIFT 16 #define I40E_NVM_ADAPT_SHIFT 16
#define I40E_NVM_ADAPT_MASK (0xffff << I40E_NVM_ADAPT_SHIFT) #define I40E_NVM_ADAPT_MASK (0xffff << I40E_NVM_ADAPT_SHIFT)
...@@ -492,6 +498,8 @@ struct i40e_hw { ...@@ -492,6 +498,8 @@ struct i40e_hw {
/* state of nvm update process */ /* state of nvm update process */
enum i40e_nvmupd_state nvmupd_state; enum i40e_nvmupd_state nvmupd_state;
struct i40e_aq_desc nvm_wb_desc;
struct i40e_virt_mem nvm_buff;
/* HMC info */ /* HMC info */
struct i40e_hmc_info hmc; /* HMC info struct */ struct i40e_hmc_info hmc; /* HMC info struct */
......
...@@ -596,6 +596,9 @@ i40e_status i40evf_shutdown_adminq(struct i40e_hw *hw) ...@@ -596,6 +596,9 @@ i40e_status i40evf_shutdown_adminq(struct i40e_hw *hw)
/* destroy the locks */ /* destroy the locks */
if (hw->nvm_buff.va)
i40e_free_virt_mem(hw, &hw->nvm_buff);
return ret_code; return ret_code;
} }
...@@ -830,6 +833,10 @@ i40e_status i40evf_asq_send_command(struct i40e_hw *hw, ...@@ -830,6 +833,10 @@ i40e_status i40evf_asq_send_command(struct i40e_hw *hw,
i40evf_debug_aq(hw, I40E_DEBUG_AQ_COMMAND, (void *)desc, buff, i40evf_debug_aq(hw, I40E_DEBUG_AQ_COMMAND, (void *)desc, buff,
buff_size); buff_size);
/* save writeback aq if requested */
if (details->wb_desc)
*details->wb_desc = *desc_on_ring;
/* update the error if time out occurred */ /* update the error if time out occurred */
if ((!cmd_completed) && if ((!cmd_completed) &&
(!details->async && !details->postpone)) { (!details->async && !details->postpone)) {
......
...@@ -69,6 +69,7 @@ struct i40e_asq_cmd_details { ...@@ -69,6 +69,7 @@ struct i40e_asq_cmd_details {
u16 flags_dis; u16 flags_dis;
bool async; bool async;
bool postpone; bool postpone;
struct i40e_aq_desc *wb_desc;
}; };
#define I40E_ADMINQ_DETAILS(R, i) \ #define I40E_ADMINQ_DETAILS(R, i) \
......
...@@ -304,12 +304,17 @@ enum i40e_nvmupd_cmd { ...@@ -304,12 +304,17 @@ enum i40e_nvmupd_cmd {
I40E_NVMUPD_CSUM_CON, I40E_NVMUPD_CSUM_CON,
I40E_NVMUPD_CSUM_SA, I40E_NVMUPD_CSUM_SA,
I40E_NVMUPD_CSUM_LCB, I40E_NVMUPD_CSUM_LCB,
I40E_NVMUPD_STATUS,
I40E_NVMUPD_EXEC_AQ,
I40E_NVMUPD_GET_AQ_RESULT,
}; };
enum i40e_nvmupd_state { enum i40e_nvmupd_state {
I40E_NVMUPD_STATE_INIT, I40E_NVMUPD_STATE_INIT,
I40E_NVMUPD_STATE_READING, I40E_NVMUPD_STATE_READING,
I40E_NVMUPD_STATE_WRITING I40E_NVMUPD_STATE_WRITING,
I40E_NVMUPD_STATE_INIT_WAIT,
I40E_NVMUPD_STATE_WRITE_WAIT,
}; };
/* nvm_access definition and its masks/shifts need to be accessible to /* nvm_access definition and its masks/shifts need to be accessible to
...@@ -328,6 +333,7 @@ enum i40e_nvmupd_state { ...@@ -328,6 +333,7 @@ enum i40e_nvmupd_state {
#define I40E_NVM_SA (I40E_NVM_SNT | I40E_NVM_LCB) #define I40E_NVM_SA (I40E_NVM_SNT | I40E_NVM_LCB)
#define I40E_NVM_ERA 0x4 #define I40E_NVM_ERA 0x4
#define I40E_NVM_CSUM 0x8 #define I40E_NVM_CSUM 0x8
#define I40E_NVM_EXEC 0xf
#define I40E_NVM_ADAPT_SHIFT 16 #define I40E_NVM_ADAPT_SHIFT 16
#define I40E_NVM_ADAPT_MASK (0xffff << I40E_NVM_ADAPT_SHIFT) #define I40E_NVM_ADAPT_MASK (0xffff << I40E_NVM_ADAPT_SHIFT)
...@@ -486,6 +492,8 @@ struct i40e_hw { ...@@ -486,6 +492,8 @@ struct i40e_hw {
/* state of nvm update process */ /* state of nvm update process */
enum i40e_nvmupd_state nvmupd_state; enum i40e_nvmupd_state nvmupd_state;
struct i40e_aq_desc nvm_wb_desc;
struct i40e_virt_mem nvm_buff;
/* HMC info */ /* HMC info */
struct i40e_hmc_info hmc; /* HMC info struct */ struct i40e_hmc_info hmc; /* HMC info struct */
......
...@@ -34,7 +34,7 @@ char i40evf_driver_name[] = "i40evf"; ...@@ -34,7 +34,7 @@ char i40evf_driver_name[] = "i40evf";
static const char i40evf_driver_string[] = static const char i40evf_driver_string[] =
"Intel(R) XL710/X710 Virtual Function Network Driver"; "Intel(R) XL710/X710 Virtual Function Network Driver";
#define DRV_VERSION "1.3.5" #define DRV_VERSION "1.3.13"
const char i40evf_driver_version[] = DRV_VERSION; const char i40evf_driver_version[] = DRV_VERSION;
static const char i40evf_copyright[] = static const char i40evf_copyright[] =
"Copyright (c) 2013 - 2015 Intel Corporation."; "Copyright (c) 2013 - 2015 Intel Corporation.";
......
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