Commit a233811e authored by Anilkumar Kolli's avatar Anilkumar Kolli Committed by Kalle Valo

ath11k: Add qcn9074 mhi controller config

Add MHI config for QCN9074 also populate ath11k_hw_params for QCN9074.

Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.4.0.1.r2-00012-QCAHKSWPL_SILICONZ-1
Signed-off-by: default avatarAnilkumar Kolli <akolli@codeaurora.org>
Signed-off-by: default avatarKalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/1612946530-28504-6-git-send-email-akolli@codeaurora.org
parent 5f67d306
...@@ -147,6 +147,18 @@ static const struct ath11k_hw_params ath11k_hw_params[] = { ...@@ -147,6 +147,18 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.cold_boot_calib = false, .cold_boot_calib = false,
.supports_suspend = true, .supports_suspend = true,
}, },
{
.name = "qcn9074 hw1.0",
.hw_rev = ATH11K_HW_QCN9074_HW10,
.fw = {
.dir = "QCN9074/hw1.0",
.board_size = 256 * 1024,
.cal_size = 256 * 1024,
},
.max_radios = 1,
.single_pdev_only = false,
.qmi_service_ins_id = ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCN9074,
},
}; };
int ath11k_core_suspend(struct ath11k_base *ab) int ath11k_core_suspend(struct ath11k_base *ab)
......
...@@ -105,6 +105,7 @@ enum ath11k_hw_rev { ...@@ -105,6 +105,7 @@ enum ath11k_hw_rev {
ATH11K_HW_IPQ8074, ATH11K_HW_IPQ8074,
ATH11K_HW_QCA6390_HW20, ATH11K_HW_QCA6390_HW20,
ATH11K_HW_IPQ6018_HW10, ATH11K_HW_IPQ6018_HW10,
ATH11K_HW_QCN9074_HW10,
}; };
enum ath11k_firmware_mode { enum ath11k_firmware_mode {
......
...@@ -7,10 +7,11 @@ ...@@ -7,10 +7,11 @@
#include "core.h" #include "core.h"
#include "debug.h" #include "debug.h"
#include "mhi.h" #include "mhi.h"
#include "pci.h"
#define MHI_TIMEOUT_DEFAULT_MS 90000 #define MHI_TIMEOUT_DEFAULT_MS 90000
static struct mhi_channel_config ath11k_mhi_channels[] = { static struct mhi_channel_config ath11k_mhi_channels_qca6390[] = {
{ {
.num = 0, .num = 0,
.name = "LOOPBACK", .name = "LOOPBACK",
...@@ -69,7 +70,7 @@ static struct mhi_channel_config ath11k_mhi_channels[] = { ...@@ -69,7 +70,7 @@ static struct mhi_channel_config ath11k_mhi_channels[] = {
}, },
}; };
static struct mhi_event_config ath11k_mhi_events[] = { static struct mhi_event_config ath11k_mhi_events_qca6390[] = {
{ {
.num_elements = 32, .num_elements = 32,
.irq_moderation_ms = 0, .irq_moderation_ms = 0,
...@@ -92,15 +93,108 @@ static struct mhi_event_config ath11k_mhi_events[] = { ...@@ -92,15 +93,108 @@ static struct mhi_event_config ath11k_mhi_events[] = {
}, },
}; };
static struct mhi_controller_config ath11k_mhi_config = { static struct mhi_controller_config ath11k_mhi_config_qca6390 = {
.max_channels = 128, .max_channels = 128,
.timeout_ms = 2000, .timeout_ms = 2000,
.use_bounce_buf = false, .use_bounce_buf = false,
.buf_len = 0, .buf_len = 0,
.num_channels = ARRAY_SIZE(ath11k_mhi_channels), .num_channels = ARRAY_SIZE(ath11k_mhi_channels_qca6390),
.ch_cfg = ath11k_mhi_channels, .ch_cfg = ath11k_mhi_channels_qca6390,
.num_events = ARRAY_SIZE(ath11k_mhi_events), .num_events = ARRAY_SIZE(ath11k_mhi_events_qca6390),
.event_cfg = ath11k_mhi_events, .event_cfg = ath11k_mhi_events_qca6390,
};
static struct mhi_channel_config ath11k_mhi_channels_qcn9074[] = {
{
.num = 0,
.name = "LOOPBACK",
.num_elements = 32,
.event_ring = 1,
.dir = DMA_TO_DEVICE,
.ee_mask = 0x14,
.pollcfg = 0,
.doorbell = MHI_DB_BRST_DISABLE,
.lpm_notify = false,
.offload_channel = false,
.doorbell_mode_switch = false,
.auto_queue = false,
},
{
.num = 1,
.name = "LOOPBACK",
.num_elements = 32,
.event_ring = 1,
.dir = DMA_FROM_DEVICE,
.ee_mask = 0x14,
.pollcfg = 0,
.doorbell = MHI_DB_BRST_DISABLE,
.lpm_notify = false,
.offload_channel = false,
.doorbell_mode_switch = false,
.auto_queue = false,
},
{
.num = 20,
.name = "IPCR",
.num_elements = 32,
.event_ring = 1,
.dir = DMA_TO_DEVICE,
.ee_mask = 0x14,
.pollcfg = 0,
.doorbell = MHI_DB_BRST_DISABLE,
.lpm_notify = false,
.offload_channel = false,
.doorbell_mode_switch = false,
.auto_queue = false,
},
{
.num = 21,
.name = "IPCR",
.num_elements = 32,
.event_ring = 1,
.dir = DMA_FROM_DEVICE,
.ee_mask = 0x14,
.pollcfg = 0,
.doorbell = MHI_DB_BRST_DISABLE,
.lpm_notify = false,
.offload_channel = false,
.doorbell_mode_switch = false,
.auto_queue = true,
},
};
static struct mhi_event_config ath11k_mhi_events_qcn9074[] = {
{
.num_elements = 32,
.irq_moderation_ms = 0,
.irq = 1,
.data_type = MHI_ER_CTRL,
.mode = MHI_DB_BRST_DISABLE,
.hardware_event = false,
.client_managed = false,
.offload_channel = false,
},
{
.num_elements = 256,
.irq_moderation_ms = 1,
.irq = 2,
.mode = MHI_DB_BRST_DISABLE,
.priority = 1,
.hardware_event = false,
.client_managed = false,
.offload_channel = false,
},
};
static struct mhi_controller_config ath11k_mhi_config_qcn9074 = {
.max_channels = 30,
.timeout_ms = 10000,
.use_bounce_buf = false,
.buf_len = 0,
.num_channels = ARRAY_SIZE(ath11k_mhi_channels_qcn9074),
.ch_cfg = ath11k_mhi_channels_qcn9074,
.num_events = ARRAY_SIZE(ath11k_mhi_events_qcn9074),
.event_cfg = ath11k_mhi_events_qcn9074,
}; };
void ath11k_mhi_set_mhictrl_reset(struct ath11k_base *ab) void ath11k_mhi_set_mhictrl_reset(struct ath11k_base *ab)
...@@ -221,6 +315,7 @@ int ath11k_mhi_register(struct ath11k_pci *ab_pci) ...@@ -221,6 +315,7 @@ int ath11k_mhi_register(struct ath11k_pci *ab_pci)
{ {
struct ath11k_base *ab = ab_pci->ab; struct ath11k_base *ab = ab_pci->ab;
struct mhi_controller *mhi_ctrl; struct mhi_controller *mhi_ctrl;
struct mhi_controller_config *ath11k_mhi_config;
int ret; int ret;
mhi_ctrl = mhi_alloc_controller(); mhi_ctrl = mhi_alloc_controller();
...@@ -254,7 +349,12 @@ int ath11k_mhi_register(struct ath11k_pci *ab_pci) ...@@ -254,7 +349,12 @@ int ath11k_mhi_register(struct ath11k_pci *ab_pci)
mhi_ctrl->read_reg = ath11k_mhi_op_read_reg; mhi_ctrl->read_reg = ath11k_mhi_op_read_reg;
mhi_ctrl->write_reg = ath11k_mhi_op_write_reg; mhi_ctrl->write_reg = ath11k_mhi_op_write_reg;
ret = mhi_register_controller(mhi_ctrl, &ath11k_mhi_config); if (ab->hw_rev == ATH11K_HW_QCA6390_HW20)
ath11k_mhi_config = &ath11k_mhi_config_qca6390;
else if (ab->hw_rev == ATH11K_HW_QCN9074_HW10)
ath11k_mhi_config = &ath11k_mhi_config_qcn9074;
ret = mhi_register_controller(mhi_ctrl, ath11k_mhi_config);
if (ret) { if (ret) {
ath11k_err(ab, "failed to register to mhi bus, err = %d\n", ret); ath11k_err(ab, "failed to register to mhi bus, err = %d\n", ret);
mhi_free_controller(mhi_ctrl); mhi_free_controller(mhi_ctrl);
......
...@@ -21,6 +21,7 @@ ...@@ -21,6 +21,7 @@
#define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01 0x02 #define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01 0x02
#define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390 0x01 #define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390 0x01
#define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ8074 0x02 #define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ8074 0x02
#define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCN9074 0x07
#define ATH11K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 32 #define ATH11K_QMI_WLANFW_MAX_TIMESTAMP_LEN_V01 32
#define ATH11K_QMI_RESP_LEN_MAX 8192 #define ATH11K_QMI_RESP_LEN_MAX 8192
#define ATH11K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01 52 #define ATH11K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01 52
......
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