Commit a3cff81a authored by Dimitris Papastamos's avatar Dimitris Papastamos Committed by Mark Brown

ASoC: WM8994: Don't disable the AIF[1|2]CLK_ENA unconditionaly

Since we began using the late clock disable functionality, ensure that
we don't disable the clock if any of the ADC or DAC paths are still
enabled.  This happens when we have simultaneous playback and recording.
Signed-off-by: default avatarDimitris Papastamos <dp@opensource.wolfsonmicro.com>
Acked-by: default avatarLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@kernel.org
parent 3ee845ac
...@@ -110,6 +110,9 @@ struct wm8994_priv { ...@@ -110,6 +110,9 @@ struct wm8994_priv {
unsigned int aif1clk_enable:1; unsigned int aif1clk_enable:1;
unsigned int aif2clk_enable:1; unsigned int aif2clk_enable:1;
unsigned int aif1clk_disable:1;
unsigned int aif2clk_disable:1;
}; };
static int wm8994_readable(unsigned int reg) static int wm8994_readable(unsigned int reg)
...@@ -1015,14 +1018,18 @@ static int late_enable_ev(struct snd_soc_dapm_widget *w, ...@@ -1015,14 +1018,18 @@ static int late_enable_ev(struct snd_soc_dapm_widget *w,
switch (event) { switch (event) {
case SND_SOC_DAPM_PRE_PMU: case SND_SOC_DAPM_PRE_PMU:
if (wm8994->aif1clk_enable) if (wm8994->aif1clk_enable) {
snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1, snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1,
WM8994_AIF1CLK_ENA_MASK, WM8994_AIF1CLK_ENA_MASK,
WM8994_AIF1CLK_ENA); WM8994_AIF1CLK_ENA);
if (wm8994->aif2clk_enable) wm8994->aif1clk_enable = 0;
}
if (wm8994->aif2clk_enable) {
snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1, snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1,
WM8994_AIF2CLK_ENA_MASK, WM8994_AIF2CLK_ENA_MASK,
WM8994_AIF2CLK_ENA); WM8994_AIF2CLK_ENA);
wm8994->aif2clk_enable = 0;
}
break; break;
} }
...@@ -1037,15 +1044,15 @@ static int late_disable_ev(struct snd_soc_dapm_widget *w, ...@@ -1037,15 +1044,15 @@ static int late_disable_ev(struct snd_soc_dapm_widget *w,
switch (event) { switch (event) {
case SND_SOC_DAPM_POST_PMD: case SND_SOC_DAPM_POST_PMD:
if (wm8994->aif1clk_enable) { if (wm8994->aif1clk_disable) {
snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1, snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1,
WM8994_AIF1CLK_ENA_MASK, 0); WM8994_AIF1CLK_ENA_MASK, 0);
wm8994->aif1clk_enable = 0; wm8994->aif1clk_disable = 0;
} }
if (wm8994->aif2clk_enable) { if (wm8994->aif2clk_disable) {
snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1, snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1,
WM8994_AIF2CLK_ENA_MASK, 0); WM8994_AIF2CLK_ENA_MASK, 0);
wm8994->aif2clk_enable = 0; wm8994->aif2clk_disable = 0;
} }
break; break;
} }
...@@ -1063,6 +1070,9 @@ static int aif1clk_ev(struct snd_soc_dapm_widget *w, ...@@ -1063,6 +1070,9 @@ static int aif1clk_ev(struct snd_soc_dapm_widget *w,
case SND_SOC_DAPM_PRE_PMU: case SND_SOC_DAPM_PRE_PMU:
wm8994->aif1clk_enable = 1; wm8994->aif1clk_enable = 1;
break; break;
case SND_SOC_DAPM_POST_PMD:
wm8994->aif1clk_disable = 1;
break;
} }
return 0; return 0;
...@@ -1078,6 +1088,9 @@ static int aif2clk_ev(struct snd_soc_dapm_widget *w, ...@@ -1078,6 +1088,9 @@ static int aif2clk_ev(struct snd_soc_dapm_widget *w,
case SND_SOC_DAPM_PRE_PMU: case SND_SOC_DAPM_PRE_PMU:
wm8994->aif2clk_enable = 1; wm8994->aif2clk_enable = 1;
break; break;
case SND_SOC_DAPM_POST_PMD:
wm8994->aif2clk_disable = 1;
break;
} }
return 0; return 0;
......
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