Commit a3e81117 authored by Ben Skeggs's avatar Ben Skeggs

drm/nouveau/disp/g94-: port OR DP link power control to nvkm_ior

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 7dc0bac4
...@@ -249,7 +249,7 @@ nvkm_dp_train_links(struct nvkm_dp *dp) ...@@ -249,7 +249,7 @@ nvkm_dp_train_links(struct nvkm_dp *dp)
return 0; return 0;
} }
dp->func->lnk_pwr(dp, ior->dp.nr); ior->func->dp.power(ior, ior->dp.nr);
/* Set desired link configuration on the sink. */ /* Set desired link configuration on the sink. */
sink[0] = ior->dp.bw; sink[0] = ior->dp.bw;
......
...@@ -34,7 +34,6 @@ struct nvkm_dp { ...@@ -34,7 +34,6 @@ struct nvkm_dp {
struct nvkm_output_dp_func { struct nvkm_output_dp_func {
int (*pattern)(struct nvkm_output_dp *, int); int (*pattern)(struct nvkm_output_dp *, int);
int (*lnk_pwr)(struct nvkm_output_dp *, int nr);
int (*drv_ctl)(struct nvkm_output_dp *, int ln, int vs, int pe, int pc); int (*drv_ctl)(struct nvkm_output_dp *, int ln, int vs, int pe, int pc);
void (*vcpi)(struct nvkm_output_dp *, int head, u8 start_slot, void (*vcpi)(struct nvkm_output_dp *, int head, u8 start_slot,
u8 num_slots, u16 pbn, u16 aligned_pbn); u8 num_slots, u16 pbn, u16 aligned_pbn);
...@@ -50,7 +49,6 @@ int nv50_pior_dp_new(struct nvkm_disp *, int, struct dcb_output *, ...@@ -50,7 +49,6 @@ int nv50_pior_dp_new(struct nvkm_disp *, int, struct dcb_output *,
int g94_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *, int g94_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,
struct nvkm_output **); struct nvkm_output **);
int g94_sor_dp_lnk_pwr(struct nvkm_dp *, int);
int gf119_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *, int gf119_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,
struct nvkm_output **); struct nvkm_output **);
......
...@@ -54,6 +54,7 @@ struct nvkm_ior_func { ...@@ -54,6 +54,7 @@ struct nvkm_ior_func {
struct { struct {
u8 lanes[4]; u8 lanes[4];
int (*links)(struct nvkm_ior *, struct nvkm_i2c_aux *); int (*links)(struct nvkm_ior *, struct nvkm_i2c_aux *);
void (*power)(struct nvkm_ior *, int nr);
} dp; } dp;
}; };
...@@ -82,6 +83,7 @@ void nv50_sor_power(struct nvkm_ior *, bool, bool, bool, bool, bool); ...@@ -82,6 +83,7 @@ void nv50_sor_power(struct nvkm_ior *, bool, bool, bool, bool, bool);
void g94_sor_state(struct nvkm_ior *, struct nvkm_ior_state *); void g94_sor_state(struct nvkm_ior *, struct nvkm_ior_state *);
int g94_sor_dp_links(struct nvkm_ior *, struct nvkm_i2c_aux *); int g94_sor_dp_links(struct nvkm_ior *, struct nvkm_i2c_aux *);
void g94_sor_dp_power(struct nvkm_ior *, int);
void gf119_sor_state(struct nvkm_ior *, struct nvkm_ior_state *); void gf119_sor_state(struct nvkm_ior *, struct nvkm_ior_state *);
int gf119_sor_dp_links(struct nvkm_ior *, struct nvkm_i2c_aux *); int gf119_sor_dp_links(struct nvkm_ior *, struct nvkm_i2c_aux *);
......
...@@ -51,12 +51,6 @@ nv50_pior_output_dp_pattern(struct nvkm_output_dp *outp, int pattern) ...@@ -51,12 +51,6 @@ nv50_pior_output_dp_pattern(struct nvkm_output_dp *outp, int pattern)
return 0; return 0;
} }
static int
nv50_pior_output_dp_lnk_pwr(struct nvkm_output_dp *outp, int nr)
{
return 0;
}
static int static int
nv50_pior_dp_links(struct nvkm_ior *pior, struct nvkm_i2c_aux *aux) nv50_pior_dp_links(struct nvkm_ior *pior, struct nvkm_i2c_aux *aux)
{ {
...@@ -70,7 +64,6 @@ nv50_pior_dp_links(struct nvkm_ior *pior, struct nvkm_i2c_aux *aux) ...@@ -70,7 +64,6 @@ nv50_pior_dp_links(struct nvkm_ior *pior, struct nvkm_i2c_aux *aux)
static const struct nvkm_output_dp_func static const struct nvkm_output_dp_func
nv50_pior_output_dp_func = { nv50_pior_output_dp_func = {
.pattern = nv50_pior_output_dp_pattern, .pattern = nv50_pior_output_dp_pattern,
.lnk_pwr = nv50_pior_output_dp_lnk_pwr,
}; };
int int
......
...@@ -90,16 +90,16 @@ g94_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern) ...@@ -90,16 +90,16 @@ g94_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern)
return 0; return 0;
} }
int void
g94_sor_dp_lnk_pwr(struct nvkm_output_dp *outp, int nr) g94_sor_dp_power(struct nvkm_ior *sor, int nr)
{ {
struct nvkm_device *device = outp->base.disp->engine.subdev.device; struct nvkm_device *device = sor->disp->engine.subdev.device;
const u32 soff = g94_sor_soff(outp); const u32 soff = nv50_ior_base(sor);
const u32 loff = g94_sor_loff(outp); const u32 loff = nv50_sor_link(sor);
u32 mask = 0, i; u32 mask = 0, i;
for (i = 0; i < nr; i++) for (i = 0; i < nr; i++)
mask |= 1 << (g94_sor_dp_lane_map(device, i) >> 3); mask |= 1 << sor->func->dp.lanes[i];
nvkm_mask(device, 0x61c130 + loff, 0x0000000f, mask); nvkm_mask(device, 0x61c130 + loff, 0x0000000f, mask);
nvkm_mask(device, 0x61c034 + soff, 0x80000000, 0x80000000); nvkm_mask(device, 0x61c034 + soff, 0x80000000, 0x80000000);
...@@ -107,7 +107,6 @@ g94_sor_dp_lnk_pwr(struct nvkm_output_dp *outp, int nr) ...@@ -107,7 +107,6 @@ g94_sor_dp_lnk_pwr(struct nvkm_output_dp *outp, int nr)
if (!(nvkm_rd32(device, 0x61c034 + soff) & 0x80000000)) if (!(nvkm_rd32(device, 0x61c034 + soff) & 0x80000000))
break; break;
); );
return 0;
} }
int int
...@@ -133,7 +132,6 @@ g94_sor_dp_links(struct nvkm_ior *sor, struct nvkm_i2c_aux *aux) ...@@ -133,7 +132,6 @@ g94_sor_dp_links(struct nvkm_ior *sor, struct nvkm_i2c_aux *aux)
static const struct nvkm_output_dp_func static const struct nvkm_output_dp_func
g94_sor_dp_func = { g94_sor_dp_func = {
.pattern = g94_sor_dp_pattern, .pattern = g94_sor_dp_pattern,
.lnk_pwr = g94_sor_dp_lnk_pwr,
.drv_ctl = g94_sor_dp_drv_ctl, .drv_ctl = g94_sor_dp_drv_ctl,
}; };
...@@ -300,6 +298,7 @@ g94_sor = { ...@@ -300,6 +298,7 @@ g94_sor = {
.dp = { .dp = {
.lanes = { 2, 1, 0, 3}, .lanes = { 2, 1, 0, 3},
.links = g94_sor_dp_links, .links = g94_sor_dp_links,
.power = g94_sor_dp_power,
}, },
}; };
......
...@@ -117,7 +117,6 @@ gf119_sor_dp_links(struct nvkm_ior *sor, struct nvkm_i2c_aux *aux) ...@@ -117,7 +117,6 @@ gf119_sor_dp_links(struct nvkm_ior *sor, struct nvkm_i2c_aux *aux)
static const struct nvkm_output_dp_func static const struct nvkm_output_dp_func
gf119_sor_dp_func = { gf119_sor_dp_func = {
.pattern = gf119_sor_dp_pattern, .pattern = gf119_sor_dp_pattern,
.lnk_pwr = g94_sor_dp_lnk_pwr,
.drv_ctl = gf119_sor_dp_drv_ctl, .drv_ctl = gf119_sor_dp_drv_ctl,
.vcpi = gf119_sor_dp_vcpi, .vcpi = gf119_sor_dp_vcpi,
}; };
...@@ -162,6 +161,7 @@ gf119_sor = { ...@@ -162,6 +161,7 @@ gf119_sor = {
.dp = { .dp = {
.lanes = { 2, 1, 0, 3 }, .lanes = { 2, 1, 0, 3 },
.links = gf119_sor_dp_links, .links = gf119_sor_dp_links,
.power = g94_sor_dp_power,
}, },
}; };
......
...@@ -31,6 +31,7 @@ gk104_sor = { ...@@ -31,6 +31,7 @@ gk104_sor = {
.dp = { .dp = {
.lanes = { 2, 1, 0, 3 }, .lanes = { 2, 1, 0, 3 },
.links = gf119_sor_dp_links, .links = gf119_sor_dp_links,
.power = g94_sor_dp_power,
}, },
}; };
......
...@@ -40,7 +40,6 @@ gm107_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern) ...@@ -40,7 +40,6 @@ gm107_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern)
static const struct nvkm_output_dp_func static const struct nvkm_output_dp_func
gm107_sor_dp_func = { gm107_sor_dp_func = {
.pattern = gm107_sor_dp_pattern, .pattern = gm107_sor_dp_pattern,
.lnk_pwr = g94_sor_dp_lnk_pwr,
.drv_ctl = gf119_sor_dp_drv_ctl, .drv_ctl = gf119_sor_dp_drv_ctl,
.vcpi = gf119_sor_dp_vcpi, .vcpi = gf119_sor_dp_vcpi,
}; };
...@@ -62,6 +61,7 @@ gm107_sor = { ...@@ -62,6 +61,7 @@ gm107_sor = {
.dp = { .dp = {
.lanes = { 0, 1, 2, 3 }, .lanes = { 0, 1, 2, 3 },
.links = gf119_sor_dp_links, .links = gf119_sor_dp_links,
.power = g94_sor_dp_power,
}, },
}; };
......
...@@ -24,8 +24,6 @@ ...@@ -24,8 +24,6 @@
#include "ior.h" #include "ior.h"
#include "nv50.h" #include "nv50.h"
#include <subdev/timer.h>
static inline u32 static inline u32
gm200_sor_soff(struct nvkm_output_dp *outp) gm200_sor_soff(struct nvkm_output_dp *outp)
{ {
...@@ -82,30 +80,9 @@ gm200_sor_dp_drv_ctl(struct nvkm_output_dp *outp, ...@@ -82,30 +80,9 @@ gm200_sor_dp_drv_ctl(struct nvkm_output_dp *outp,
return 0; return 0;
} }
static int
gm200_sor_dp_lnk_pwr(struct nvkm_output_dp *outp, int nr)
{
struct nvkm_device *device = outp->base.disp->engine.subdev.device;
const u32 soff = gm200_sor_soff(outp);
const u32 loff = gm200_sor_loff(outp);
u32 mask = 0, i;
for (i = 0; i < nr; i++)
mask |= 1 << (gm200_sor_dp_lane_map(device, i) >> 3);
nvkm_mask(device, 0x61c130 + loff, 0x0000000f, mask);
nvkm_mask(device, 0x61c034 + soff, 0x80000000, 0x80000000);
nvkm_msec(device, 2000,
if (!(nvkm_rd32(device, 0x61c034 + soff) & 0x80000000))
break;
);
return 0;
}
static const struct nvkm_output_dp_func static const struct nvkm_output_dp_func
gm200_sor_dp_func = { gm200_sor_dp_func = {
.pattern = gm107_sor_dp_pattern, .pattern = gm107_sor_dp_pattern,
.lnk_pwr = gm200_sor_dp_lnk_pwr,
.drv_ctl = gm200_sor_dp_drv_ctl, .drv_ctl = gm200_sor_dp_drv_ctl,
.vcpi = gf119_sor_dp_vcpi, .vcpi = gf119_sor_dp_vcpi,
}; };
...@@ -139,6 +116,7 @@ gm200_sor = { ...@@ -139,6 +116,7 @@ gm200_sor = {
.dp = { .dp = {
.lanes = { 0, 1, 2, 3 }, .lanes = { 0, 1, 2, 3 },
.links = gf119_sor_dp_links, .links = gf119_sor_dp_links,
.power = g94_sor_dp_power,
}, },
}; };
......
...@@ -31,6 +31,7 @@ gt215_sor = { ...@@ -31,6 +31,7 @@ gt215_sor = {
.dp = { .dp = {
.lanes = { 2, 1, 0, 3 }, .lanes = { 2, 1, 0, 3 },
.links = g94_sor_dp_links, .links = g94_sor_dp_links,
.power = g94_sor_dp_power,
}, },
}; };
......
...@@ -31,6 +31,7 @@ mcp77_sor = { ...@@ -31,6 +31,7 @@ mcp77_sor = {
.dp = { .dp = {
.lanes = { 2, 1, 0, 3}, .lanes = { 2, 1, 0, 3},
.links = g94_sor_dp_links, .links = g94_sor_dp_links,
.power = g94_sor_dp_power,
}, },
}; };
......
...@@ -31,6 +31,7 @@ mcp89_sor = { ...@@ -31,6 +31,7 @@ mcp89_sor = {
.dp = { .dp = {
.lanes = { 3, 2, 1, 0 }, .lanes = { 3, 2, 1, 0 },
.links = g94_sor_dp_links, .links = g94_sor_dp_links,
.power = g94_sor_dp_power,
}, },
}; };
......
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