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Commit a476e925 authored by Alex Deucher's avatar Alex Deucher
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drm/amdgpu/powerplay: add smu smc_table_manager callback for vega20 

For consistency with other asics.
Reviewed-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 68e841ab
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Showing with 34 additions and 24 deletions
drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
View file @ a476e925
...@@ -743,8 +743,8 @@ static int vega20_init_smc_table(struct pp_hwmgr *hwmgr) ...@@ -743,8 +743,8 @@ static int vega20_init_smc_table(struct pp_hwmgr *hwmgr)
memcpy(pp_table, pptable_information->smc_pptable, sizeof(PPTable_t)); memcpy(pp_table, pptable_information->smc_pptable, sizeof(PPTable_t));
result = vega20_copy_table_to_smc(hwmgr, result = smum_smc_table_manager(hwmgr,
(uint8_t *)pp_table, TABLE_PPTABLE); (uint8_t *)pp_table, TABLE_PPTABLE, false);
PP_ASSERT_WITH_CODE(!result, PP_ASSERT_WITH_CODE(!result,
"[InitSMCTable] Failed to upload PPtable!", "[InitSMCTable] Failed to upload PPtable!",
return result); return result);
...@@ -1067,7 +1067,7 @@ static int vega20_od8_initialize_default_settings( ...@@ -1067,7 +1067,7 @@ static int vega20_od8_initialize_default_settings(
vega20_od8_set_feature_id(hwmgr); vega20_od8_set_feature_id(hwmgr);
/* Set default values */ /* Set default values */
ret = vega20_copy_table_from_smc(hwmgr, (uint8_t *)od_table, TABLE_OVERDRIVE); ret = smum_smc_table_manager(hwmgr, (uint8_t *)od_table, TABLE_OVERDRIVE, true);
PP_ASSERT_WITH_CODE(!ret, PP_ASSERT_WITH_CODE(!ret,
"Failed to export over drive table!", "Failed to export over drive table!",
return ret); return ret);
...@@ -1195,7 +1195,7 @@ static int vega20_od8_initialize_default_settings( ...@@ -1195,7 +1195,7 @@ static int vega20_od8_initialize_default_settings(
} }
} }
ret = vega20_copy_table_to_smc(hwmgr, (uint8_t *)od_table, TABLE_OVERDRIVE); ret = smum_smc_table_manager(hwmgr, (uint8_t *)od_table, TABLE_OVERDRIVE, false);
PP_ASSERT_WITH_CODE(!ret, PP_ASSERT_WITH_CODE(!ret,
"Failed to import over drive table!", "Failed to import over drive table!",
return ret); return ret);
...@@ -1214,7 +1214,7 @@ static int vega20_od8_set_settings( ...@@ -1214,7 +1214,7 @@ static int vega20_od8_set_settings(
struct vega20_od8_single_setting *od8_settings = struct vega20_od8_single_setting *od8_settings =
data->od8_settings.od8_settings_array; data->od8_settings.od8_settings_array;
ret = vega20_copy_table_from_smc(hwmgr, (uint8_t *)(&od_table), TABLE_OVERDRIVE); ret = smum_smc_table_manager(hwmgr, (uint8_t *)(&od_table), TABLE_OVERDRIVE, true);
PP_ASSERT_WITH_CODE(!ret, PP_ASSERT_WITH_CODE(!ret,
"Failed to export over drive table!", "Failed to export over drive table!",
return ret); return ret);
...@@ -1271,7 +1271,7 @@ static int vega20_od8_set_settings( ...@@ -1271,7 +1271,7 @@ static int vega20_od8_set_settings(
break; break;
} }
ret = vega20_copy_table_to_smc(hwmgr, (uint8_t *)(&od_table), TABLE_OVERDRIVE); ret = smum_smc_table_manager(hwmgr, (uint8_t *)(&od_table), TABLE_OVERDRIVE, false);
PP_ASSERT_WITH_CODE(!ret, PP_ASSERT_WITH_CODE(!ret,
"Failed to import over drive table!", "Failed to import over drive table!",
return ret); return ret);
...@@ -1841,7 +1841,7 @@ static int vega20_get_gpu_power(struct pp_hwmgr *hwmgr, ...@@ -1841,7 +1841,7 @@ static int vega20_get_gpu_power(struct pp_hwmgr *hwmgr,
int ret = 0; int ret = 0;
SmuMetrics_t metrics_table; SmuMetrics_t metrics_table;
ret = vega20_copy_table_from_smc(hwmgr, (uint8_t *)&metrics_table, TABLE_SMU_METRICS); ret = smum_smc_table_manager(hwmgr, (uint8_t *)&metrics_table, TABLE_SMU_METRICS, true);
PP_ASSERT_WITH_CODE(!ret, PP_ASSERT_WITH_CODE(!ret,
"Failed to export SMU METRICS table!", "Failed to export SMU METRICS table!",
return ret); return ret);
...@@ -1893,7 +1893,7 @@ static int vega20_get_current_activity_percent(struct pp_hwmgr *hwmgr, ...@@ -1893,7 +1893,7 @@ static int vega20_get_current_activity_percent(struct pp_hwmgr *hwmgr,
int ret = 0; int ret = 0;
SmuMetrics_t metrics_table; SmuMetrics_t metrics_table;
ret = vega20_copy_table_from_smc(hwmgr, (uint8_t *)&metrics_table, TABLE_SMU_METRICS); ret = smum_smc_table_manager(hwmgr, (uint8_t *)&metrics_table, TABLE_SMU_METRICS, true);
PP_ASSERT_WITH_CODE(!ret, PP_ASSERT_WITH_CODE(!ret,
"Failed to export SMU METRICS table!", "Failed to export SMU METRICS table!",
return ret); return ret);
...@@ -2612,18 +2612,18 @@ static int vega20_odn_edit_dpm_table(struct pp_hwmgr *hwmgr, ...@@ -2612,18 +2612,18 @@ static int vega20_odn_edit_dpm_table(struct pp_hwmgr *hwmgr,
data->gfxclk_overdrive = false; data->gfxclk_overdrive = false;
data->memclk_overdrive = false; data->memclk_overdrive = false;
ret = vega20_copy_table_from_smc(hwmgr, ret = smum_smc_table_manager(hwmgr,
(uint8_t *)od_table, (uint8_t *)od_table,
TABLE_OVERDRIVE); TABLE_OVERDRIVE, true);
PP_ASSERT_WITH_CODE(!ret, PP_ASSERT_WITH_CODE(!ret,
"Failed to export overdrive table!", "Failed to export overdrive table!",
return ret); return ret);
break; break;
case PP_OD_COMMIT_DPM_TABLE: case PP_OD_COMMIT_DPM_TABLE:
ret = vega20_copy_table_to_smc(hwmgr, ret = smum_smc_table_manager(hwmgr,
(uint8_t *)od_table, (uint8_t *)od_table,
TABLE_OVERDRIVE); TABLE_OVERDRIVE, false);
PP_ASSERT_WITH_CODE(!ret, PP_ASSERT_WITH_CODE(!ret,
"Failed to import overdrive table!", "Failed to import overdrive table!",
return ret); return ret);
...@@ -2847,8 +2847,8 @@ static int vega20_display_configuration_changed_task(struct pp_hwmgr *hwmgr) ...@@ -2847,8 +2847,8 @@ static int vega20_display_configuration_changed_task(struct pp_hwmgr *hwmgr)
if ((data->water_marks_bitmap & WaterMarksExist) && if ((data->water_marks_bitmap & WaterMarksExist) &&
!(data->water_marks_bitmap & WaterMarksLoaded)) { !(data->water_marks_bitmap & WaterMarksLoaded)) {
result = vega20_copy_table_to_smc(hwmgr, result = smum_smc_table_manager(hwmgr,
(uint8_t *)wm_table, TABLE_WATERMARKS); (uint8_t *)wm_table, TABLE_WATERMARKS, false);
PP_ASSERT_WITH_CODE(!result, PP_ASSERT_WITH_CODE(!result,
"Failed to update WMTABLE!", "Failed to update WMTABLE!",
return result); return result);
......
drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c
View file @ a476e925
...@@ -160,8 +160,8 @@ static uint32_t vega20_get_argument(struct pp_hwmgr *hwmgr) ...@@ -160,8 +160,8 @@ static uint32_t vega20_get_argument(struct pp_hwmgr *hwmgr)
* @param hwmgr the address of the HW manager * @param hwmgr the address of the HW manager
* @param table_id the driver's table ID to copy from * @param table_id the driver's table ID to copy from
*/ */
int vega20_copy_table_from_smc(struct pp_hwmgr *hwmgr, static int vega20_copy_table_from_smc(struct pp_hwmgr *hwmgr,
uint8_t *table, int16_t table_id) uint8_t *table, int16_t table_id)
{ {
struct vega20_smumgr *priv = struct vega20_smumgr *priv =
(struct vega20_smumgr *)(hwmgr->smu_backend); (struct vega20_smumgr *)(hwmgr->smu_backend);
...@@ -200,8 +200,8 @@ int vega20_copy_table_from_smc(struct pp_hwmgr *hwmgr, ...@@ -200,8 +200,8 @@ int vega20_copy_table_from_smc(struct pp_hwmgr *hwmgr,
* @param hwmgr the address of the HW manager * @param hwmgr the address of the HW manager
* @param table_id the table to copy from * @param table_id the table to copy from
*/ */
int vega20_copy_table_to_smc(struct pp_hwmgr *hwmgr, static int vega20_copy_table_to_smc(struct pp_hwmgr *hwmgr,
uint8_t *table, int16_t table_id) uint8_t *table, int16_t table_id)
{ {
struct vega20_smumgr *priv = struct vega20_smumgr *priv =
(struct vega20_smumgr *)(hwmgr->smu_backend); (struct vega20_smumgr *)(hwmgr->smu_backend);
...@@ -560,6 +560,19 @@ static bool vega20_is_dpm_running(struct pp_hwmgr *hwmgr) ...@@ -560,6 +560,19 @@ static bool vega20_is_dpm_running(struct pp_hwmgr *hwmgr)
return false; return false;
} }
static int vega20_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table,
uint16_t table_id, bool rw)
{
int ret;
if (rw)
ret = vega20_copy_table_from_smc(hwmgr, table, table_id);
else
ret = vega20_copy_table_to_smc(hwmgr, table, table_id);
return ret;
}
const struct pp_smumgr_func vega20_smu_funcs = { const struct pp_smumgr_func vega20_smu_funcs = {
.smu_init = &vega20_smu_init, .smu_init = &vega20_smu_init,
.smu_fini = &vega20_smu_fini, .smu_fini = &vega20_smu_fini,
...@@ -571,4 +584,5 @@ const struct pp_smumgr_func vega20_smu_funcs = { ...@@ -571,4 +584,5 @@ const struct pp_smumgr_func vega20_smu_funcs = {
.upload_pptable_settings = NULL, .upload_pptable_settings = NULL,
.is_dpm_running = vega20_is_dpm_running, .is_dpm_running = vega20_is_dpm_running,
.get_argument = vega20_get_argument, .get_argument = vega20_get_argument,
.smc_table_manager = vega20_smc_table_manager,
}; };
drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.h
View file @ a476e925
...@@ -47,10 +47,6 @@ struct vega20_smumgr { ...@@ -47,10 +47,6 @@ struct vega20_smumgr {
#define SMU_FEATURES_HIGH_MASK 0xFFFFFFFF00000000 #define SMU_FEATURES_HIGH_MASK 0xFFFFFFFF00000000
#define SMU_FEATURES_HIGH_SHIFT 32 #define SMU_FEATURES_HIGH_SHIFT 32
int vega20_copy_table_from_smc(struct pp_hwmgr *hwmgr,
uint8_t *table, int16_t table_id);
int vega20_copy_table_to_smc(struct pp_hwmgr *hwmgr,
uint8_t *table, int16_t table_id);
int vega20_enable_smc_features(struct pp_hwmgr *hwmgr, int vega20_enable_smc_features(struct pp_hwmgr *hwmgr,
bool enable, uint64_t feature_mask); bool enable, uint64_t feature_mask);
int vega20_get_enabled_smc_features(struct pp_hwmgr *hwmgr, int vega20_get_enabled_smc_features(struct pp_hwmgr *hwmgr,
......
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