Commit a4e1adb9 authored by Grazvydas Ignotas's avatar Grazvydas Ignotas Committed by Tony Lindgren

ARM: dts: omap3-pandora: miscellaneous corrections

- add pandora specific compatible name
- fix mmc2 card detect polarity
- fix mmc1 and mmc2 write protect polarity
- disable write protect pins because of production issue and add an
  explanation why they are disabled
- fix NAND partition name to reflect the correct address
Signed-off-by: default avatarGrazvydas Ignotas <notasas@gmail.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent a60011c1
......@@ -19,7 +19,7 @@
/ {
model = "Pandora Handheld Console 1GHz";
compatible = "ti,omap36xx", "ti,omap3";
compatible = "openpandora,omap3-pandora-1ghz", "ti,omap36xx", "ti,omap3";
};
&omap3_pmx_core2 {
......
......@@ -19,7 +19,7 @@
/ {
model = "Pandora Handheld Console";
compatible = "ti,omap3";
compatible = "openpandora,omap3-pandora-600mhz", "ti,omap3430", "ti,omap3";
};
&omap3_pmx_core2 {
......
......@@ -459,13 +459,18 @@ &usb_otg_hs {
power = <50>;
};
/*
* Many pandora boards have been produced with defective write-protect switches
* on either slot, so it was decided not to use this feature. If you know
* your board has good switches, feel free to uncomment wp-gpios below.
*/
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&vmmc1>;
bus-width = <4>;
cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio4 30 GPIO_ACTIVE_LOW>; /* GPIO_126 */
/*wp-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;*/ /* GPIO_126 */
};
&mmc2 {
......@@ -473,8 +478,8 @@ &mmc2 {
pinctrl-0 = <&mmc2_pins>;
vmmc-supply = <&vmmc2>;
bus-width = <4>;
cd-gpios = <&twl_gpio 1 GPIO_ACTIVE_HIGH>;
wp-gpios = <&gpio4 31 GPIO_ACTIVE_LOW>; /* GPIO_127 */
cd-gpios = <&twl_gpio 1 GPIO_ACTIVE_LOW>;
/*wp-gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;*/ /* GPIO_127 */
};
/* bluetooth*/
......@@ -545,7 +550,7 @@ kernel@280000 {
reg = <0x280000 0xa00000>;
};
filesystem@680000 {
filesystem@c80000 {
label = "rootfs";
reg = <0xc80000 0>; /* 0 = MTDPART_SIZ_FULL */
};
......
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