Commit a519fd83 authored by Alex Deucher's avatar Alex Deucher

drm/amdgpu: remove eeprom from the smu i2c handlers

The driver uses it for EEPROM access, but it's just an i2c bus.
Reviewed-by: default avatarAndrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 84dd1f69
...@@ -536,12 +536,12 @@ static bool smu_v11_0_i2c_bus_unlock(struct i2c_adapter *control) ...@@ -536,12 +536,12 @@ static bool smu_v11_0_i2c_bus_unlock(struct i2c_adapter *control)
return false; return false;
} }
/***************************** EEPROM I2C GLUE ****************************/ /***************************** I2C GLUE ****************************/
static uint32_t smu_v11_0_i2c_eeprom_read_data(struct i2c_adapter *control, static uint32_t smu_v11_0_i2c_read_data(struct i2c_adapter *control,
uint8_t address, uint8_t address,
uint8_t *data, uint8_t *data,
uint32_t numbytes) uint32_t numbytes)
{ {
uint32_t ret = 0; uint32_t ret = 0;
...@@ -561,10 +561,10 @@ static uint32_t smu_v11_0_i2c_eeprom_read_data(struct i2c_adapter *control, ...@@ -561,10 +561,10 @@ static uint32_t smu_v11_0_i2c_eeprom_read_data(struct i2c_adapter *control,
return ret; return ret;
} }
static uint32_t smu_v11_0_i2c_eeprom_write_data(struct i2c_adapter *control, static uint32_t smu_v11_0_i2c_write_data(struct i2c_adapter *control,
uint8_t address, uint8_t address,
uint8_t *data, uint8_t *data,
uint32_t numbytes) uint32_t numbytes)
{ {
uint32_t ret; uint32_t ret;
...@@ -624,7 +624,7 @@ static const struct i2c_lock_operations smu_v11_0_i2c_i2c_lock_ops = { ...@@ -624,7 +624,7 @@ static const struct i2c_lock_operations smu_v11_0_i2c_i2c_lock_ops = {
.unlock_bus = unlock_bus, .unlock_bus = unlock_bus,
}; };
static int smu_v11_0_i2c_eeprom_i2c_xfer(struct i2c_adapter *i2c_adap, static int smu_v11_0_i2c_xfer(struct i2c_adapter *i2c_adap,
struct i2c_msg *msgs, int num) struct i2c_msg *msgs, int num)
{ {
int i, ret; int i, ret;
...@@ -639,13 +639,13 @@ static int smu_v11_0_i2c_eeprom_i2c_xfer(struct i2c_adapter *i2c_adap, ...@@ -639,13 +639,13 @@ static int smu_v11_0_i2c_eeprom_i2c_xfer(struct i2c_adapter *i2c_adap,
for (i = 0; i < num; i++) { for (i = 0; i < num; i++) {
if (msgs[i].flags & I2C_M_RD) if (msgs[i].flags & I2C_M_RD)
ret = smu_v11_0_i2c_eeprom_read_data(i2c_adap, ret = smu_v11_0_i2c_read_data(i2c_adap,
(uint8_t)msgs[i].addr, (uint8_t)msgs[i].addr,
msgs[i].buf, msgs[i].len); msgs[i].buf, msgs[i].len);
else else
ret = smu_v11_0_i2c_eeprom_write_data(i2c_adap, ret = smu_v11_0_i2c_write_data(i2c_adap,
(uint8_t)msgs[i].addr, (uint8_t)msgs[i].addr,
msgs[i].buf, msgs[i].len); msgs[i].buf, msgs[i].len);
if (ret != I2C_OK) { if (ret != I2C_OK) {
num = -EIO; num = -EIO;
...@@ -657,18 +657,18 @@ static int smu_v11_0_i2c_eeprom_i2c_xfer(struct i2c_adapter *i2c_adap, ...@@ -657,18 +657,18 @@ static int smu_v11_0_i2c_eeprom_i2c_xfer(struct i2c_adapter *i2c_adap,
return num; return num;
} }
static u32 smu_v11_0_i2c_eeprom_i2c_func(struct i2c_adapter *adap) static u32 smu_v11_0_i2c_func(struct i2c_adapter *adap)
{ {
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
} }
static const struct i2c_algorithm smu_v11_0_i2c_eeprom_i2c_algo = { static const struct i2c_algorithm smu_v11_0_i2c_algo = {
.master_xfer = smu_v11_0_i2c_eeprom_i2c_xfer, .master_xfer = smu_v11_0_i2c_xfer,
.functionality = smu_v11_0_i2c_eeprom_i2c_func, .functionality = smu_v11_0_i2c_func,
}; };
int smu_v11_0_i2c_eeprom_control_init(struct i2c_adapter *control) int smu_v11_0_i2c_control_init(struct i2c_adapter *control)
{ {
struct amdgpu_device *adev = to_amdgpu_device(control); struct amdgpu_device *adev = to_amdgpu_device(control);
int res; int res;
...@@ -676,8 +676,8 @@ int smu_v11_0_i2c_eeprom_control_init(struct i2c_adapter *control) ...@@ -676,8 +676,8 @@ int smu_v11_0_i2c_eeprom_control_init(struct i2c_adapter *control)
control->owner = THIS_MODULE; control->owner = THIS_MODULE;
control->class = I2C_CLASS_SPD; control->class = I2C_CLASS_SPD;
control->dev.parent = &adev->pdev->dev; control->dev.parent = &adev->pdev->dev;
control->algo = &smu_v11_0_i2c_eeprom_i2c_algo; control->algo = &smu_v11_0_i2c_algo;
snprintf(control->name, sizeof(control->name), "AMDGPU EEPROM"); snprintf(control->name, sizeof(control->name), "AMDGPU SMU");
control->lock_ops = &smu_v11_0_i2c_i2c_lock_ops; control->lock_ops = &smu_v11_0_i2c_i2c_lock_ops;
res = i2c_add_adapter(control); res = i2c_add_adapter(control);
...@@ -687,7 +687,7 @@ int smu_v11_0_i2c_eeprom_control_init(struct i2c_adapter *control) ...@@ -687,7 +687,7 @@ int smu_v11_0_i2c_eeprom_control_init(struct i2c_adapter *control)
return res; return res;
} }
void smu_v11_0_i2c_eeprom_control_fini(struct i2c_adapter *control) void smu_v11_0_i2c_control_fini(struct i2c_adapter *control)
{ {
i2c_del_adapter(control); i2c_del_adapter(control);
} }
...@@ -715,9 +715,9 @@ bool smu_v11_0_i2c_test_bus(struct i2c_adapter *control) ...@@ -715,9 +715,9 @@ bool smu_v11_0_i2c_test_bus(struct i2c_adapter *control)
smu_v11_0_i2c_init(control); smu_v11_0_i2c_init(control);
/* Write 0xde to address 0x0000 on the EEPROM */ /* Write 0xde to address 0x0000 on the EEPROM */
ret = smu_v11_0_i2c_eeprom_write_data(control, I2C_TARGET_ADDR, data, 6); ret = smu_v11_0_i2c_write_data(control, I2C_TARGET_ADDR, data, 6);
ret = smu_v11_0_i2c_eeprom_read_data(control, I2C_TARGET_ADDR, data, 6); ret = smu_v11_0_i2c_read_data(control, I2C_TARGET_ADDR, data, 6);
smu_v11_0_i2c_fini(control); smu_v11_0_i2c_fini(control);
......
...@@ -28,7 +28,7 @@ ...@@ -28,7 +28,7 @@
struct i2c_adapter; struct i2c_adapter;
int smu_v11_0_i2c_eeprom_control_init(struct i2c_adapter *control); int smu_v11_0_i2c_control_init(struct i2c_adapter *control);
void smu_v11_0_i2c_eeprom_control_fini(struct i2c_adapter *control); void smu_v11_0_i2c_control_fini(struct i2c_adapter *control);
#endif #endif
...@@ -523,7 +523,7 @@ static int vega20_smu_init(struct pp_hwmgr *hwmgr) ...@@ -523,7 +523,7 @@ static int vega20_smu_init(struct pp_hwmgr *hwmgr)
priv->smu_tables.entry[TABLE_ACTIVITY_MONITOR_COEFF].size = sizeof(DpmActivityMonitorCoeffInt_t); priv->smu_tables.entry[TABLE_ACTIVITY_MONITOR_COEFF].size = sizeof(DpmActivityMonitorCoeffInt_t);
if (adev->psp.ras.ras) { if (adev->psp.ras.ras) {
ret = smu_v11_0_i2c_eeprom_control_init(&adev->pm.smu_i2c); ret = smu_v11_0_i2c_control_init(&adev->pm.smu_i2c);
if (ret) if (ret)
goto err4; goto err4;
} }
...@@ -563,7 +563,7 @@ static int vega20_smu_fini(struct pp_hwmgr *hwmgr) ...@@ -563,7 +563,7 @@ static int vega20_smu_fini(struct pp_hwmgr *hwmgr)
struct amdgpu_device *adev = hwmgr->adev; struct amdgpu_device *adev = hwmgr->adev;
if (adev->psp.ras.ras) if (adev->psp.ras.ras)
smu_v11_0_i2c_eeprom_control_fini(&adev->pm.smu_i2c); smu_v11_0_i2c_control_fini(&adev->pm.smu_i2c);
if (priv) { if (priv) {
amdgpu_bo_free_kernel(&priv->smu_tables.entry[TABLE_PPTABLE].handle, amdgpu_bo_free_kernel(&priv->smu_tables.entry[TABLE_PPTABLE].handle,
......
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