Commit a5a56871 authored by Padmavathi Venna's avatar Padmavathi Venna Committed by Mark Brown

ASoC: samsung: add support for exynos7 I2S controller

Exynos7 I2S controller has no internal dma, supports more
no. of root clock sampling frequencies and has more no.of Rx
fifos to support 7.1CH recording in TDM mode. Due to more no.
of root clock frequency values some of the bit offsets got
shifted up by one. Also I2S1 on previous Samsung platforms
uses v3 dai type but on Exynos7 it is upgraded to v5 with
slightly modified register offsets for supporting more no.of
RFS values. Due to the above changes, the driver has to be
modified to handle all versions of I2S controller. For this
I introduced a new structure to hold modified bit offsets and
masks which is passed as dai data.
Signed-off-by: default avatarPadmavathi Venna <padma.v@samsung.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent b0759736
......@@ -6,10 +6,17 @@ Required SoC Specific Properties:
- samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
- samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with
secondary fifo, s/w reset control and internal mux for root clk src.
- samsung,exynos5420-i2s: for 8/16/24bit multichannel(7.1) I2S with
secondary fifo, s/w reset control, internal mux for root clk src and
TDM support. TDM (Time division multiplexing) is to allow transfer of
multiple channel audio data on single data line.
- samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S for
playback, sterio channel capture, secondary fifo using internal
or external dma, s/w reset control, internal mux for root clk src
and 7.1 channel TDM support for playback. TDM (Time division multiplexing)
is to allow transfer of multiple channel audio data on single data line.
- samsung,exynos7-i2s: with all the available features of exynos5 i2s,
exynos7 I2S has 7.1 channel TDM support for capture, secondary fifo
with only external dma and more no.of root clk sampling frequencies.
- samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports
stereo channels. exynos7 i2s1 upgraded to 5.1 multichannel with
slightly modified bit offsets.
- reg: physical base address of the controller and length of memory mapped
region.
......
config SND_SOC_SAMSUNG
tristate "ASoC support for Samsung"
depends on PLAT_SAMSUNG
depends on (PLAT_SAMSUNG || ARCH_EXYNOS)
depends on S3C64XX_PL080 || !ARCH_S3C64XX
depends on S3C24XX_DMAC || !ARCH_S3C24XX
select SND_SOC_GENERIC_DMAENGINE_PCM
......
......@@ -33,8 +33,9 @@
#define I2SLVL3ADDR 0x3c
#define I2SSTR1 0x40
#define I2SVER 0x44
#define I2SFIC2 0x48
#define I2SFIC1 0x48
#define I2STDM 0x4c
#define I2SFSTA 0x50
#define CON_RSTCLR (1 << 31)
#define CON_FRXOFSTATUS (1 << 26)
......@@ -93,8 +94,6 @@
#define MOD_BLC_24BIT (2 << 13)
#define MOD_BLC_MASK (3 << 13)
#define MOD_IMS_SYSMUX (1 << 10)
#define MOD_SLAVE (1 << 11)
#define MOD_TXONLY (0 << 8)
#define MOD_RXONLY (1 << 8)
#define MOD_TXRX (2 << 8)
......@@ -132,7 +131,10 @@
#define EXYNOS5420_MOD_BCLK_256FS 8
#define EXYNOS5420_MOD_BCLK_MASK 0xf
#define MOD_CDCLKCON (1 << 12)
#define EXYNOS7_MOD_RCLK_64FS 4
#define EXYNOS7_MOD_RCLK_128FS 5
#define EXYNOS7_MOD_RCLK_96FS 6
#define EXYNOS7_MOD_RCLK_192FS 7
#define PSR_PSREN (1 << 15)
......
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