Commit a5a82834 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'omap-fixes-for-linus' of...

Merge branch 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6

* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6:
  OMAP3: PM: ensure IO wakeups are properly disabled
  omap: Fix omap_4430sdp_defconfig for make oldconfig
  omap: Use CONFIG_SMP for test_for_ipi and test_for_ltirq
  omap: Fix sev instruction usage for multi-omap
  OMAP3: Fix a cpu type check problem
  omap3: id: fix 3630 rev detection
parents 997396a7 58a5559e
......@@ -13,6 +13,9 @@ CONFIG_MODULE_SRCVERSION_ALL=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_ARCH_OMAP=y
CONFIG_ARCH_OMAP4=y
# CONFIG_ARCH_OMAP2PLUS_TYPICAL is not set
# CONFIG_ARCH_OMAP2 is not set
# CONFIG_ARCH_OMAP3 is not set
# CONFIG_OMAP_MUX is not set
CONFIG_OMAP_32K_TIMER=y
CONFIG_OMAP_DM_TIMER=y
......
......@@ -25,6 +25,7 @@ obj-$(CONFIG_LOCAL_TIMERS) += timer-mpu.o
obj-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o
obj-$(CONFIG_ARCH_OMAP4) += omap44xx-smc.o omap4-common.o
AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a
AFLAGS_omap44xx-smc.o :=-Wa,-march=armv7-a
# Functions loaded to SRAM
......
......@@ -3417,7 +3417,13 @@ int __init omap3xxx_clk_init(void)
struct omap_clk *c;
u32 cpu_clkflg = CK_3XXX;
if (cpu_is_omap34xx()) {
if (cpu_is_omap3517()) {
cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS;
cpu_clkflg |= CK_3517;
} else if (cpu_is_omap3505()) {
cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS;
cpu_clkflg |= CK_3505;
} else if (cpu_is_omap34xx()) {
cpu_mask = RATE_IN_3XXX;
cpu_clkflg |= CK_343X;
......@@ -3432,12 +3438,6 @@ int __init omap3xxx_clk_init(void)
cpu_mask |= RATE_IN_3430ES2PLUS;
cpu_clkflg |= CK_3430ES2;
}
} else if (cpu_is_omap3517()) {
cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS;
cpu_clkflg |= CK_3517;
} else if (cpu_is_omap3505()) {
cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS;
cpu_clkflg |= CK_3505;
}
if (omap3_has_192mhz_clk())
......
......@@ -284,8 +284,8 @@ static void __init omap3_check_revision(void)
default:
omap_revision = OMAP3630_REV_ES1_2;
omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
break;
}
break;
default:
/* Unknown default to latest silicon rev as default*/
omap_revision = OMAP3630_REV_ES1_2;
......
......@@ -177,7 +177,10 @@ omap_irq_base: .word 0
cmpne \irqnr, \tmp
cmpcs \irqnr, \irqnr
.endm
#endif
#endif /* MULTI_OMAP2 */
#ifdef CONFIG_SMP
/* We assume that irqstat (the raw value of the IRQ acknowledge
* register) is preserved from the macro above.
* If there is an IPI, we immediately signal end of interrupt
......@@ -205,8 +208,7 @@ omap_irq_base: .word 0
streq \irqstat, [\base, #GIC_CPU_EOI]
cmp \tmp, #0
.endm
#endif
#endif /* MULTI_OMAP2 */
#endif /* CONFIG_SMP */
.macro irq_prio_table
.endm
......@@ -102,8 +102,7 @@ static void __init wakeup_secondary(void)
* Send a 'sev' to wake the secondary core from WFE.
* Drain the outstanding writes to memory
*/
dsb();
set_event();
dsb_sev();
mb();
}
......
......@@ -480,7 +480,9 @@ void omap_sram_idle(void)
}
/* Disable IO-PAD and IO-CHAIN wakeup */
if (omap3_has_io_wakeup() && core_next_state < PWRDM_POWER_ON) {
if (omap3_has_io_wakeup() &&
(per_next_state < PWRDM_POWER_ON ||
core_next_state < PWRDM_POWER_ON)) {
prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN);
omap3_disable_io_chain();
}
......
......@@ -19,13 +19,6 @@
#include <asm/hardware/gic.h>
/*
* set_event() is used to wake up secondary core from wfe using sev. ROM
* code puts the second core into wfe(standby).
*
*/
#define set_event() __asm__ __volatile__ ("sev" : : : "memory")
/* Needed for secondary core boot */
extern void omap_secondary_startup(void);
extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
......
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