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Commit a5db8e45 authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'soc-arm-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 

Pull arm SoC platform updates from Arnd Bergmann:
 "The majority of the updates here are Dmitry Torokhov's cleanups for
  platform code in the pxa and tegra platforms, changing custom
  platform_data structures into DT-compatible software node
  declarations.

  The other updates are for the MAINTAINERS file, correcting some stale
  or missing entries"

* tag 'soc-arm-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  ARM: pxa: fix build breakage on PXA3xx
  ti: omap: MAINTAINERS: move Benoît Cousson to CREDITS
  amazon: MAINTAINERS: change to odd fixes and Tsahee Zidenberg to CREDITS
  MAINTAINERS: thead: add git tree
  ARM: spitz: Use software nodes for the ADS7846 touchscreen
  ARM: spitz: Use software nodes to describe LED GPIOs
  ARM: spitz: Use software nodes to describe MMC GPIOs
  ARM: spitz: Use software nodes to describe LCD GPIOs
  ARM: spitz: Use software nodes to describe audio GPIOs
  ARM: spitz: Use software nodes to describe SPI CS lines
  ARM: spitz: Simplify instantiating SPI controller
  ARM: pxa/gumstix: convert vbus gpio to use software nodes
  ARM: pxa: consolidate GPIO chip platform data
  ARM: spitz: fix GPIO assignment for backlight
  ARM: tegra: paz00: Use software nodes to describe GPIOs for WiFi rfkill
  MAINTAINERS: ARM: airoha: add entry to cover Airoha SoC
  bus: vexpress-config: Add missing MODULE_DESCRIPTION() macro
  arm64: layerscape: remove redundant EDAC_SUPPORT selection
  dt-bindings: arm: Remove obsolete RTSM DCSCB binding
  arm: vexpress: Remove obsolete RTSM DCSCB support
parents a9a4cd9c dead06c5
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CREDITS
View file @ a5db8e45
......@@ -796,6 +796,11 @@ E: luisfcorreia@gmail.com
D: Ralink rt2x00 WLAN driver
S: Belas, Portugal
N: Benoît Cousson
E: bcousson@baylibre.com
D: TI OMAP Devicetree platforms
D: TI OMAP HWMOD boards
N: Alan Cox
W: http://www.linux.org.uk/diary/
D: Linux Networking (0.99.10->2.0.29)
......@@ -4368,6 +4373,10 @@ N: Haojian Zhuang
E: haojian.zhuang@gmail.com
D: MMP support
N: Tsahee Zidenberg
E: tsahee@annapurnalabs.com
D: Annapurna Labs Alpine Architecture
N: Richard Zidlicky
E: rz@linux-m68k.org, rdzidlic@geocities.com
W: http://www.geocities.com/rdzidlic
......
Documentation/devicetree/bindings/arm/rtsm-dcscb.txt deleted 100644 → 0
View file @ a9a4cd9c
ARM Dual Cluster System Configuration Block
-------------------------------------------
The Dual Cluster System Configuration Block (DCSCB) provides basic
functionality for controlling clocks, resets and configuration pins in
the Dual Cluster System implemented by the Real-Time System Model (RTSM).
Required properties:
- compatible : should be "arm,rtsm,dcscb"
- reg : physical base address and the size of the registers window
Example:
dcscb@60000000 {
compatible = "arm,rtsm,dcscb";
reg = <0x60000000 0x1000>;
};
MAINTAINERS
View file @ a5db8e45
......@@ -1887,6 +1887,15 @@ F: include/dt-bindings/reset/actions,*
F: include/linux/soc/actions/
N: owl
ARM/AIROHA SOC SUPPORT
M: Matthias Brugger <matthias.bgg@gmail.com>
M: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L: linux-mediatek@lists.infradead.org (moderated for non-subscribers)
S: Odd Fixes
F: arch/arm/boot/dts/airoha/
F: arch/arm64/boot/dts/airoha/
ARM/Allwinner SoC Clock Support
M: Emilio López <emilio@elopez.com.ar>
S: Maintained
......@@ -1974,10 +1983,9 @@ F: drivers/soc/amlogic/
N: meson
ARM/Annapurna Labs ALPINE ARCHITECTURE
M: Tsahee Zidenberg <tsahee@annapurnalabs.com>
M: Antoine Tenart <atenart@kernel.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
S: Odd Fixes
F: arch/arm/boot/dts/amazon/
F: arch/arm/mach-alpine/
F: arch/arm64/boot/dts/amazon/
......@@ -16414,7 +16422,6 @@ S: Maintained
F: arch/arm/*omap*/*clock*
OMAP DEVICE TREE SUPPORT
M: Benoît Cousson <bcousson@baylibre.com>
M: Tony Lindgren <tony@atomide.com>
L: linux-omap@vger.kernel.org
L: devicetree@vger.kernel.org
......@@ -16469,7 +16476,6 @@ S: Maintained
F: arch/arm/mach-omap2/omap_hwmod*data*
OMAP HWMOD SUPPORT
M: Benoît Cousson <bcousson@baylibre.com>
M: Paul Walmsley <paul@pwsan.com>
L: linux-omap@vger.kernel.org
S: Maintained
......@@ -19416,6 +19422,7 @@ F: arch/riscv/boot/dts/
X: arch/riscv/boot/dts/allwinner/
X: arch/riscv/boot/dts/renesas/
X: arch/riscv/boot/dts/sophgo/
X: arch/riscv/boot/dts/thead/
RISC-V PMU DRIVERS
M: Atish Patra <atishp@atishpatra.org>
......@@ -19432,6 +19439,7 @@ M: Guo Ren <guoren@kernel.org>
M: Fu Wei <wefu@redhat.com>
L: linux-riscv@lists.infradead.org
S: Maintained
T: git https://github.com/pdp7/linux.git
F: arch/riscv/boot/dts/thead/
RNBD BLOCK DRIVERS
......
arch/arm/configs/vexpress_defconfig
View file @ a5db8e45
......@@ -14,7 +14,6 @@ CONFIG_CPUSETS=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_PROFILING=y
CONFIG_ARCH_VEXPRESS=y
CONFIG_ARCH_VEXPRESS_DCSCB=y
CONFIG_ARCH_VEXPRESS_TC2_PM=y
CONFIG_SMP=y
CONFIG_HAVE_ARM_ARCH_TIMER=y
......
arch/arm/mach-pxa/devices.c
View file @ a5db8e45
......@@ -7,6 +7,7 @@
#include <linux/clk-provider.h>
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/gpio-pxa.h>
#include <linux/platform_data/i2c-pxa.h>
#include <linux/soc/pxa/cpu.h>
......@@ -17,6 +18,7 @@
#include <linux/platform_data/usb-ohci-pxa27x.h>
#include <linux/platform_data/mmp_dma.h>
#include "mfp-pxa2xx.h"
#include "regs-ost.h"
#include "reset.h"
#include "devices.h"
......@@ -46,7 +48,7 @@ struct platform_device pxa_device_pmu = {
.num_resources = 1,
};
static struct resource pxamci_resources[] = {
static const struct resource pxamci_resources[] = {
[0] = {
.start = 0x41100000,
.end = 0x41100fff,
......@@ -59,22 +61,26 @@ static struct resource pxamci_resources[] = {
},
};
static u64 pxamci_dmamask = 0xffffffffUL;
struct platform_device pxa_device_mci = {
.name = "pxa2xx-mci",
.id = 0,
.dev = {
.dma_mask = &pxamci_dmamask,
.coherent_dma_mask = 0xffffffff,
},
.num_resources = ARRAY_SIZE(pxamci_resources),
.resource = pxamci_resources,
};
void __init pxa_set_mci_info(struct pxamci_platform_data *info)
void __init pxa_set_mci_info(const struct pxamci_platform_data *info,
const struct property_entry *props)
{
pxa_register_device(&pxa_device_mci, info);
const struct platform_device_info mci_info = {
.name = "pxa2xx-mci",
.id = 0,
.res = pxamci_resources,
.num_res = ARRAY_SIZE(pxamci_resources),
.data = info,
.size_data = sizeof(*info),
.dma_mask = 0xffffffffUL,
.properties = props,
};
struct platform_device *mci_dev;
int err;
mci_dev = platform_device_register_full(&mci_info);
err = PTR_ERR_OR_ZERO(mci_dev);
if (err)
pr_err("Unable to create mci device: %d\n", err);
}
static struct pxa2xx_udc_mach_info pxa_udc_info = {
......@@ -627,6 +633,11 @@ struct platform_device pxa27x_device_pwm1 = {
};
#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
const struct software_node pxa2xx_gpiochip_node = {
.name = "gpio-pxa",
};
struct resource pxa_resource_gpio[] = {
{
.start = 0x40e00000,
......@@ -650,11 +661,19 @@ struct resource pxa_resource_gpio[] = {
},
};
static struct pxa_gpio_platform_data pxa2xx_gpio_info = {
.irq_base = PXA_GPIO_TO_IRQ(0),
.gpio_set_wake = gpio_set_wake,
};
struct platform_device pxa25x_device_gpio = {
.name = "pxa25x-gpio",
.id = -1,
.num_resources = ARRAY_SIZE(pxa_resource_gpio),
.resource = pxa_resource_gpio,
.dev = {
.platform_data = &pxa2xx_gpio_info,
},
};
struct platform_device pxa27x_device_gpio = {
......@@ -662,7 +681,11 @@ struct platform_device pxa27x_device_gpio = {
.id = -1,
.num_resources = ARRAY_SIZE(pxa_resource_gpio),
.resource = pxa_resource_gpio,
.dev = {
.platform_data = &pxa2xx_gpio_info,
},
};
#endif /* CONFIG_PXA25x || CONFIG_PXA27x */
static struct resource pxa_dma_resource[] = {
[0] = {
......
arch/arm/mach-pxa/devices.h
View file @ a5db8e45
......@@ -4,7 +4,6 @@
struct mmp_dma_platdata;
extern struct platform_device pxa_device_pmu;
extern struct platform_device pxa_device_mci;
extern struct platform_device pxa3xx_device_mci2;
extern struct platform_device pxa3xx_device_mci3;
extern struct platform_device pxa25x_device_udc;
......@@ -53,8 +52,8 @@ extern struct platform_device pxa_device_asoc_ssp4;
extern struct platform_device pxa25x_device_gpio;
extern struct platform_device pxa27x_device_gpio;
extern struct platform_device pxa3xx_device_gpio;
extern struct platform_device pxa93x_device_gpio;
extern const struct software_node pxa2xx_gpiochip_node;
void __init pxa_register_device(struct platform_device *dev, void *data);
void __init pxa2xx_set_dmac_info(struct mmp_dma_platdata *dma_pdata);
......
arch/arm/mach-pxa/gumstix.c
View file @ a5db8e45
......@@ -90,7 +90,7 @@ static struct pxamci_platform_data gumstix_mci_platform_data = {
static void __init gumstix_mmc_init(void)
{
pxa_set_mci_info(&gumstix_mci_platform_data);
pxa_set_mci_info(&gumstix_mci_platform_data, NULL);
}
#else
static void __init gumstix_mmc_init(void)
......@@ -100,26 +100,22 @@ static void __init gumstix_mmc_init(void)
#endif
#ifdef CONFIG_USB_PXA25X
static struct gpiod_lookup_table gumstix_gpio_vbus_gpiod_table = {
.dev_id = "gpio-vbus",
.table = {
GPIO_LOOKUP("gpio-pxa", GPIO_GUMSTIX_USB_GPIOn,
"vbus", GPIO_ACTIVE_HIGH),
GPIO_LOOKUP("gpio-pxa", GPIO_GUMSTIX_USB_GPIOx,
"pullup", GPIO_ACTIVE_HIGH),
{ },
},
static const struct property_entry spitz_mci_props[] __initconst = {
PROPERTY_ENTRY_GPIO("vbus-gpios", &pxa2xx_gpiochip_node,
GPIO_GUMSTIX_USB_GPIOn, GPIO_ACTIVE_HIGH),
PROPERTY_ENTRY_GPIO("pullup-gpios", &pxa2xx_gpiochip_node,
GPIO_GUMSTIX_USB_GPIOx, GPIO_ACTIVE_HIGH),
{ }
};
static struct platform_device gumstix_gpio_vbus = {
static const struct platform_device_info gumstix_gpio_vbus_info __initconst = {
.name = "gpio-vbus",
.id = -1,
.id = PLATFORM_DEVID_NONE,
};
static void __init gumstix_udc_init(void)
{
gpiod_add_lookup_table(&gumstix_gpio_vbus_gpiod_table);
platform_device_register(&gumstix_gpio_vbus);
platform_device_register_full(&gumstix_gpio_vbus_info);
}
#else
static void gumstix_udc_init(void)
......
arch/arm/mach-pxa/pxa25x.c
View file @ a5db8e45
......@@ -178,12 +178,8 @@ void __init pxa25x_map_io(void)
pxa25x_get_clk_frequency_khz(1);
}
static struct pxa_gpio_platform_data pxa25x_gpio_info __initdata = {
.irq_base = PXA_GPIO_TO_IRQ(0),
.gpio_set_wake = gpio_set_wake,
};
static struct platform_device *pxa25x_devices[] __initdata = {
&pxa25x_device_gpio,
&pxa25x_device_udc,
&pxa_device_pmu,
&pxa_device_i2s,
......@@ -243,8 +239,8 @@ static int __init pxa25x_init(void)
register_syscore_ops(&pxa2xx_mfp_syscore_ops);
if (!of_have_populated_dt()) {
software_node_register(&pxa2xx_gpiochip_node);
pxa2xx_set_dmac_info(&pxa25x_dma_pdata);
pxa_register_device(&pxa25x_device_gpio, &pxa25x_gpio_info);
ret = platform_add_devices(pxa25x_devices,
ARRAY_SIZE(pxa25x_devices));
}
......
arch/arm/mach-pxa/pxa27x.c
View file @ a5db8e45
......@@ -276,12 +276,8 @@ void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
pxa_register_device(&pxa27x_device_i2c_power, info);
}
static struct pxa_gpio_platform_data pxa27x_gpio_info __initdata = {
.irq_base = PXA_GPIO_TO_IRQ(0),
.gpio_set_wake = gpio_set_wake,
};
static struct platform_device *devices[] __initdata = {
&pxa27x_device_gpio,
&pxa27x_device_udc,
&pxa_device_pmu,
&pxa_device_i2s,
......@@ -345,8 +341,7 @@ static int __init pxa27x_init(void)
register_syscore_ops(&pxa2xx_mfp_syscore_ops);
if (!of_have_populated_dt()) {
pxa_register_device(&pxa27x_device_gpio,
&pxa27x_gpio_info);
software_node_register(&pxa2xx_gpiochip_node);
pxa2xx_set_dmac_info(&pxa27x_dma_pdata);
ret = platform_add_devices(devices,
ARRAY_SIZE(devices));
......
arch/arm/mach-pxa/spitz.c
View file @ a5db8e45
This diff is collapsed.
arch/arm/mach-tegra/board-paz00.c
View file @ a5db8e45
......@@ -8,35 +8,49 @@
* Copyright (C) 2010 Google, Inc.
*/
#include <linux/property.h>
#include <linux/err.h>
#include <linux/gpio/machine.h>
#include <linux/gpio/property.h>
#include <linux/platform_device.h>
#include <linux/printk.h>
#include <linux/property.h>
#include "board.h"
static struct property_entry wifi_rfkill_prop[] __initdata = {
PROPERTY_ENTRY_STRING("name", "wifi_rfkill"),
PROPERTY_ENTRY_STRING("type", "wlan"),
{ },
static const struct software_node tegra_gpiochip_node = {
.name = "tegra-gpio",
};
static struct platform_device wifi_rfkill_device = {
.name = "rfkill_gpio",
.id = -1,
static const struct property_entry wifi_rfkill_prop[] __initconst = {
PROPERTY_ENTRY_STRING("name", "wifi_rfkill"),
PROPERTY_ENTRY_STRING("type", "wlan"),
PROPERTY_ENTRY_GPIO("reset-gpios",
&tegra_gpiochip_node, 25, GPIO_ACTIVE_HIGH),
PROPERTY_ENTRY_GPIO("shutdown-gpios",
&tegra_gpiochip_node, 85, GPIO_ACTIVE_HIGH),
{ }
};
static struct gpiod_lookup_table wifi_gpio_lookup = {
.dev_id = "rfkill_gpio",
.table = {
GPIO_LOOKUP("tegra-gpio", 25, "reset", 0),
GPIO_LOOKUP("tegra-gpio", 85, "shutdown", 0),
{ },
},
static const struct platform_device_info wifi_rfkill_info __initconst = {
.name = "rfkill_gpio",
.id = PLATFORM_DEVID_NONE,
.properties = wifi_rfkill_prop,
};
void __init tegra_paz00_wifikill_init(void)
{
device_create_managed_software_node(&wifi_rfkill_device.dev, wifi_rfkill_prop, NULL);
gpiod_add_lookup_table(&wifi_gpio_lookup);
platform_device_register(&wifi_rfkill_device);
struct platform_device *pd;
int err;
err = software_node_register(&tegra_gpiochip_node);
if (err) {
pr_err("failed to register %s node: %d\n",
tegra_gpiochip_node.name, err);
return;
}
pd = platform_device_register_full(&wifi_rfkill_info);
err = PTR_ERR_OR_ZERO(pd);
if (err)
pr_err("failed to register WiFi rfkill device: %d\n", err);
}
arch/arm/mach-versatile/Kconfig
View file @ a5db8e45
......@@ -278,15 +278,6 @@ config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA
build a working kernel, you must also enable relevant core
tile support or Flattened Device Tree based support options.
config ARCH_VEXPRESS_DCSCB
bool "Dual Cluster System Control Block (DCSCB) support"
depends on MCPM
select ARM_CCI400_PORT_CTRL
help
Support for the Dual Cluster System Configuration Block (DCSCB).
This is needed to provide CPU and cluster power management
on RTSM implementing big.LITTLE.
config ARCH_VEXPRESS_SPC
bool "Versatile Express Serial Power Controller (SPC)"
select PM_OPP
......
arch/arm/mach-versatile/Makefile
View file @ a5db8e45
......@@ -16,9 +16,6 @@ obj-$(CONFIG_ARCH_REALVIEW) += realview.o
# vexpress
obj-$(CONFIG_ARCH_VEXPRESS) := v2m.o
obj-$(CONFIG_ARCH_VEXPRESS_DCSCB) += dcscb.o dcscb_setup.o
CFLAGS_dcscb.o += -march=armv7-a
CFLAGS_REMOVE_dcscb.o = -pg
obj-$(CONFIG_ARCH_VEXPRESS_SPC) += spc.o
CFLAGS_REMOVE_spc.o = -pg
obj-$(CONFIG_ARCH_VEXPRESS_TC2_PM) += tc2_pm.o
......
arch/arm/mach-versatile/dcscb.c deleted 100644 → 0
View file @ a9a4cd9c
// SPDX-License-Identifier: GPL-2.0-only
/*
* dcscb.c - Dual Cluster System Configuration Block
*
* Created by: Nicolas Pitre, May 2012
* Copyright: (C) 2012-2013 Linaro Limited
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/errno.h>
#include <linux/of_address.h>
#include <linux/vexpress.h>
#include <linux/arm-cci.h>
#include <asm/mcpm.h>
#include <asm/proc-fns.h>
#include <asm/cacheflush.h>
#include <asm/cputype.h>
#include <asm/cp15.h>
#include "vexpress.h"
#define RST_HOLD0 0x0
#define RST_HOLD1 0x4
#define SYS_SWRESET 0x8
#define RST_STAT0 0xc
#define RST_STAT1 0x10
#define EAG_CFG_R 0x20
#define EAG_CFG_W 0x24
#define KFC_CFG_R 0x28
#define KFC_CFG_W 0x2c
#define DCS_CFG_R 0x30
static void __iomem *dcscb_base;
static int dcscb_allcpus_mask[2];
static int dcscb_cpu_powerup(unsigned int cpu, unsigned int cluster)
{
unsigned int rst_hold, cpumask = (1 << cpu);
pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
if (cluster >= 2 || !(cpumask & dcscb_allcpus_mask[cluster]))
return -EINVAL;
rst_hold = readl_relaxed(dcscb_base + RST_HOLD0 + cluster * 4);
rst_hold &= ~(cpumask | (cpumask << 4));
writel_relaxed(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4);
return 0;
}
static int dcscb_cluster_powerup(unsigned int cluster)
{
unsigned int rst_hold;
pr_debug("%s: cluster %u\n", __func__, cluster);
if (cluster >= 2)
return -EINVAL;
/* remove cluster reset and add individual CPU's reset */
rst_hold = readl_relaxed(dcscb_base + RST_HOLD0 + cluster * 4);
rst_hold &= ~(1 << 8);
rst_hold |= dcscb_allcpus_mask[cluster];
writel_relaxed(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4);
return 0;
}
static void dcscb_cpu_powerdown_prepare(unsigned int cpu, unsigned int cluster)
{
unsigned int rst_hold;
pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
BUG_ON(cluster >= 2 || !((1 << cpu) & dcscb_allcpus_mask[cluster]));
rst_hold = readl_relaxed(dcscb_base + RST_HOLD0 + cluster * 4);
rst_hold |= (1 << cpu);
writel_relaxed(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4);
}
static void dcscb_cluster_powerdown_prepare(unsigned int cluster)
{
unsigned int rst_hold;
pr_debug("%s: cluster %u\n", __func__, cluster);
BUG_ON(cluster >= 2);
rst_hold = readl_relaxed(dcscb_base + RST_HOLD0 + cluster * 4);
rst_hold |= (1 << 8);
writel_relaxed(rst_hold, dcscb_base + RST_HOLD0 + cluster * 4);
}
static void dcscb_cpu_cache_disable(void)
{
/* Disable and flush the local CPU cache. */
v7_exit_coherency_flush(louis);
}
static void dcscb_cluster_cache_disable(void)
{
/* Flush all cache levels for this cluster. */
v7_exit_coherency_flush(all);
/*
* A full outer cache flush could be needed at this point
* on platforms with such a cache, depending on where the
* outer cache sits. In some cases the notion of a "last
* cluster standing" would need to be implemented if the
* outer cache is shared across clusters. In any case, when
* the outer cache needs flushing, there is no concurrent
* access to the cache controller to worry about and no
* special locking besides what is already provided by the
* MCPM state machinery is needed.
*/
/*
* Disable cluster-level coherency by masking
* incoming snoops and DVM messages:
*/
cci_disable_port_by_cpu(read_cpuid_mpidr());
}
static const struct mcpm_platform_ops dcscb_power_ops = {
.cpu_powerup = dcscb_cpu_powerup,
.cluster_powerup = dcscb_cluster_powerup,
.cpu_powerdown_prepare = dcscb_cpu_powerdown_prepare,
.cluster_powerdown_prepare = dcscb_cluster_powerdown_prepare,
.cpu_cache_disable = dcscb_cpu_cache_disable,
.cluster_cache_disable = dcscb_cluster_cache_disable,
};
extern void dcscb_power_up_setup(unsigned int affinity_level);
static int __init dcscb_init(void)
{
struct device_node *node;
unsigned int cfg;
int ret;
if (!cci_probed())
return -ENODEV;
node = of_find_compatible_node(NULL, NULL, "arm,rtsm,dcscb");
if (!node)
return -ENODEV;
dcscb_base = of_iomap(node, 0);
of_node_put(node);
if (!dcscb_base)
return -EADDRNOTAVAIL;
cfg = readl_relaxed(dcscb_base + DCS_CFG_R);
dcscb_allcpus_mask[0] = (1 << (((cfg >> 16) >> (0 << 2)) & 0xf)) - 1;
dcscb_allcpus_mask[1] = (1 << (((cfg >> 16) >> (1 << 2)) & 0xf)) - 1;
ret = mcpm_platform_register(&dcscb_power_ops);
if (!ret)
ret = mcpm_sync_init(dcscb_power_up_setup);
if (ret) {
iounmap(dcscb_base);
return ret;
}
pr_info("VExpress DCSCB support installed\n");
/*
* Future entries into the kernel can now go
* through the cluster entry vectors.
*/
vexpress_flags_set(__pa_symbol(mcpm_entry_point));
return 0;
}
early_initcall(dcscb_init);
arch/arm/mach-versatile/dcscb_setup.S deleted 100644 → 0
View file @ a9a4cd9c
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Created by: Dave Martin, 2012-06-22
* Copyright: (C) 2012-2013 Linaro Limited
*/
#include <linux/linkage.h>
ENTRY(dcscb_power_up_setup)
cmp r0, #0 @ check affinity level
beq 2f
/*
* Enable cluster-level coherency, in preparation for turning on the MMU.
* The ACTLR SMP bit does not need to be set here, because cpu_resume()
* already restores that.
*
* A15/A7 may not require explicit L2 invalidation on reset, dependent
* on hardware integration decisions.
* For now, this code assumes that L2 is either already invalidated,
* or invalidation is not required.
*/
b cci_enable_port_for_self
2: @ Implementation-specific local CPU setup operations should go here,
@ if any. In this case, there is nothing to do.
bx lr
ENDPROC(dcscb_power_up_setup)
arch/arm64/Kconfig.platforms
View file @ a5db8e45
......@@ -207,7 +207,6 @@ if ARCH_NXP
config ARCH_LAYERSCAPE
bool "Freescale Layerscape SoC family"
select EDAC_SUPPORT
help
This enables support for the Freescale Layerscape SoC family.
......
drivers/bus/vexpress-config.c
View file @ a5db8e45
......@@ -414,4 +414,5 @@ static struct platform_driver vexpress_syscfg_driver = {
.probe = vexpress_syscfg_probe,
};
module_platform_driver(vexpress_syscfg_driver);
MODULE_DESCRIPTION("Versatile Express configuration bus");
MODULE_LICENSE("GPL v2");
include/linux/platform_data/mmc-pxamci.h
View file @ a5db8e45
......@@ -7,6 +7,7 @@
struct device;
struct mmc_host;
struct property_entry;
struct pxamci_platform_data {
unsigned int ocr_mask; /* available voltages */
......@@ -18,7 +19,8 @@ struct pxamci_platform_data {
bool gpio_card_ro_invert; /* gpio ro is inverted */
};
extern void pxa_set_mci_info(struct pxamci_platform_data *info);
extern void pxa_set_mci_info(const struct pxamci_platform_data *info,
const struct property_entry *props);
extern void pxa3xx_set_mci2_info(struct pxamci_platform_data *info);
extern void pxa3xx_set_mci3_info(struct pxamci_platform_data *info);
......
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