Commit a63722ae authored by Laurent Pinchart's avatar Laurent Pinchart

media: vsp1: drm: Implement writeback support

Extend the vsp1_du_atomic_flush() API with writeback support by adding
format, pitch and memory addresses of the writeback framebuffer.
Writeback completion is reported through the existing frame completion
callback with a new VSP1_DU_STATUS_WRITEBACK status flag.
Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: default avatarKieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: default avatarMauro Carvalho Chehab <mchehab+samsung@kernel.org>
parent 09e513e3
......@@ -958,6 +958,9 @@ void vsp1_dl_list_commit(struct vsp1_dl_list *dl, unsigned int dl_flags)
*
* The VSP1_DL_FRAME_END_INTERNAL flag indicates that the display list that just
* became active had been queued with the internal notification flag.
*
* The VSP1_DL_FRAME_END_WRITEBACK flag indicates that the previously active
* display list had been queued with the writeback flag.
*/
unsigned int vsp1_dlm_irq_frame_end(struct vsp1_dl_manager *dlm)
{
......@@ -995,6 +998,17 @@ unsigned int vsp1_dlm_irq_frame_end(struct vsp1_dl_manager *dlm)
if (status & VI6_STATUS_FLD_STD(dlm->index))
goto done;
/*
* If the active display list has the writeback flag set, the frame
* completion marks the end of the writeback capture. Return the
* VSP1_DL_FRAME_END_WRITEBACK flag and reset the display list's
* writeback flag.
*/
if (dlm->active && (dlm->active->flags & VSP1_DL_FRAME_END_WRITEBACK)) {
flags |= VSP1_DL_FRAME_END_WRITEBACK;
dlm->active->flags &= ~VSP1_DL_FRAME_END_WRITEBACK;
}
/*
* The device starts processing the queued display list right after the
* frame end interrupt. The display list thus becomes active.
......
......@@ -19,7 +19,8 @@ struct vsp1_dl_manager;
/* Keep these flags in sync with VSP1_DU_STATUS_* in include/media/vsp1.h. */
#define VSP1_DL_FRAME_END_COMPLETED BIT(0)
#define VSP1_DL_FRAME_END_INTERNAL BIT(1)
#define VSP1_DL_FRAME_END_WRITEBACK BIT(1)
#define VSP1_DL_FRAME_END_INTERNAL BIT(2)
/**
* struct vsp1_dl_ext_cmd - Extended Display command
......
......@@ -37,7 +37,9 @@ static void vsp1_du_pipeline_frame_end(struct vsp1_pipeline *pipe,
if (drm_pipe->du_complete) {
struct vsp1_entity *uif = drm_pipe->uif;
unsigned int status = completion & VSP1_DU_STATUS_COMPLETE;
unsigned int status = completion
& (VSP1_DU_STATUS_COMPLETE |
VSP1_DU_STATUS_WRITEBACK);
u32 crc;
crc = uif ? vsp1_uif_get_crc(to_uif(&uif->subdev)) : 0;
......@@ -541,6 +543,8 @@ static void vsp1_du_pipeline_configure(struct vsp1_pipeline *pipe)
if (drm_pipe->force_brx_release)
dl_flags |= VSP1_DL_FRAME_END_INTERNAL;
if (pipe->output->writeback)
dl_flags |= VSP1_DL_FRAME_END_WRITEBACK;
dl = vsp1_dl_list_get(pipe->output->dlm);
dlb = vsp1_dl_list_get_body0(dl);
......@@ -870,12 +874,31 @@ void vsp1_du_atomic_flush(struct device *dev, unsigned int pipe_index,
struct vsp1_device *vsp1 = dev_get_drvdata(dev);
struct vsp1_drm_pipeline *drm_pipe = &vsp1->drm->pipe[pipe_index];
struct vsp1_pipeline *pipe = &drm_pipe->pipe;
int ret;
drm_pipe->crc = cfg->crc;
mutex_lock(&vsp1->drm->lock);
if (cfg->writeback.pixelformat) {
const struct vsp1_du_writeback_config *wb_cfg = &cfg->writeback;
ret = vsp1_du_pipeline_set_rwpf_format(vsp1, pipe->output,
wb_cfg->pixelformat,
wb_cfg->pitch);
if (WARN_ON(ret < 0))
goto done;
pipe->output->mem.addr[0] = wb_cfg->mem[0];
pipe->output->mem.addr[1] = wb_cfg->mem[1];
pipe->output->mem.addr[2] = wb_cfg->mem[2];
pipe->output->writeback = true;
}
vsp1_du_pipeline_setup_inputs(vsp1, pipe);
vsp1_du_pipeline_configure(pipe);
done:
mutex_unlock(&vsp1->drm->lock);
}
EXPORT_SYMBOL_GPL(vsp1_du_atomic_flush);
......
......@@ -18,6 +18,7 @@ struct device;
int vsp1_du_init(struct device *dev);
#define VSP1_DU_STATUS_COMPLETE BIT(0)
#define VSP1_DU_STATUS_WRITEBACK BIT(1)
/**
* struct vsp1_du_lif_config - VSP LIF configuration
......@@ -83,12 +84,26 @@ struct vsp1_du_crc_config {
unsigned int index;
};
/**
* struct vsp1_du_writeback_config - VSP writeback configuration parameters
* @pixelformat: plane pixel format (V4L2 4CC)
* @pitch: line pitch in bytes for the first plane
* @mem: DMA memory address for each plane of the frame buffer
*/
struct vsp1_du_writeback_config {
u32 pixelformat;
unsigned int pitch;
dma_addr_t mem[3];
};
/**
* struct vsp1_du_atomic_pipe_config - VSP atomic pipe configuration parameters
* @crc: CRC computation configuration
* @writeback: writeback configuration
*/
struct vsp1_du_atomic_pipe_config {
struct vsp1_du_crc_config crc;
struct vsp1_du_writeback_config writeback;
};
void vsp1_du_atomic_begin(struct device *dev, unsigned int pipe_index);
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment