Commit a672a9f4 authored by Krishna chaitanya chundru's avatar Krishna chaitanya chundru Committed by Bjorn Andersson

dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks

Add missing aggre0 and aggre1 clocks.
Signed-off-by: default avatarKrishna chaitanya chundru <quic_krichai@quicinc.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662626776-19636-3-git-send-email-quic_krichai@quicinc.com
parent aaf85b46
......@@ -54,11 +54,11 @@ properties:
# Platform constraints are described later.
clocks:
minItems: 3
maxItems: 12
maxItems: 13
clock-names:
minItems: 3
maxItems: 12
maxItems: 13
resets:
minItems: 1
......@@ -424,8 +424,8 @@ allOf:
then:
properties:
clocks:
minItems: 11
maxItems: 11
minItems: 13
maxItems: 13
clock-names:
items:
- const: pipe # PIPE clock
......@@ -439,6 +439,8 @@ allOf:
- const: slave_q2a # Slave Q2A clock
- const: tbu # PCIe TBU clock
- const: ddrss_sf_tbu # PCIe SF TBU clock
- const: aggre0 # Aggre NoC PCIe CENTER SF AXI clock
- const: aggre1 # Aggre NoC PCIe1 AXI clock
resets:
maxItems: 1
reset-names:
......
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