Commit a678abfe authored by Ramesh Shanmugasundaram's avatar Ramesh Shanmugasundaram Committed by Geert Uytterhoeven

pinctrl: sh-pfc: r8a7795: Add CAN support

This patch adds CAN[0-1] pinmux support for R-Car H3 ES2.0. The pin
config is identical to H3 ES1.*.
Signed-off-by: default avatarRamesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: default avatarFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 3f352218
...@@ -1781,6 +1781,38 @@ static const unsigned int avb_avtp_capture_b_mux[] = { ...@@ -1781,6 +1781,38 @@ static const unsigned int avb_avtp_capture_b_mux[] = {
AVB_AVTP_CAPTURE_B_MARK, AVB_AVTP_CAPTURE_B_MARK,
}; };
/* - CAN ------------------------------------------------------------------ */
static const unsigned int can0_data_a_pins[] = {
/* TX, RX */
RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24),
};
static const unsigned int can0_data_a_mux[] = {
CAN0_TX_A_MARK, CAN0_RX_A_MARK,
};
static const unsigned int can0_data_b_pins[] = {
/* TX, RX */
RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1),
};
static const unsigned int can0_data_b_mux[] = {
CAN0_TX_B_MARK, CAN0_RX_B_MARK,
};
static const unsigned int can1_data_pins[] = {
/* TX, RX */
RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 26),
};
static const unsigned int can1_data_mux[] = {
CAN1_TX_MARK, CAN1_RX_MARK,
};
/* - CAN Clock -------------------------------------------------------------- */
static const unsigned int can_clk_pins[] = {
/* CLK */
RCAR_GP_PIN(1, 25),
};
static const unsigned int can_clk_mux[] = {
CAN_CLK_MARK,
};
/* - DRIF0 --------------------------------------------------------------- */ /* - DRIF0 --------------------------------------------------------------- */
static const unsigned int drif0_ctrl_a_pins[] = { static const unsigned int drif0_ctrl_a_pins[] = {
/* CLK, SYNC */ /* CLK, SYNC */
...@@ -3843,6 +3875,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { ...@@ -3843,6 +3875,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(avb_avtp_capture_a), SH_PFC_PIN_GROUP(avb_avtp_capture_a),
SH_PFC_PIN_GROUP(avb_avtp_match_b), SH_PFC_PIN_GROUP(avb_avtp_match_b),
SH_PFC_PIN_GROUP(avb_avtp_capture_b), SH_PFC_PIN_GROUP(avb_avtp_capture_b),
SH_PFC_PIN_GROUP(can0_data_a),
SH_PFC_PIN_GROUP(can0_data_b),
SH_PFC_PIN_GROUP(can1_data),
SH_PFC_PIN_GROUP(can_clk),
SH_PFC_PIN_GROUP(drif0_ctrl_a), SH_PFC_PIN_GROUP(drif0_ctrl_a),
SH_PFC_PIN_GROUP(drif0_data0_a), SH_PFC_PIN_GROUP(drif0_data0_a),
SH_PFC_PIN_GROUP(drif0_data1_a), SH_PFC_PIN_GROUP(drif0_data1_a),
...@@ -4154,6 +4190,19 @@ static const char * const avb_groups[] = { ...@@ -4154,6 +4190,19 @@ static const char * const avb_groups[] = {
"avb_avtp_capture_b", "avb_avtp_capture_b",
}; };
static const char * const can0_groups[] = {
"can0_data_a",
"can0_data_b",
};
static const char * const can1_groups[] = {
"can1_data",
};
static const char * const can_clk_groups[] = {
"can_clk",
};
static const char * const drif0_groups[] = { static const char * const drif0_groups[] = {
"drif0_ctrl_a", "drif0_ctrl_a",
"drif0_data0_a", "drif0_data0_a",
...@@ -4559,6 +4608,9 @@ static const char * const usb30_groups[] = { ...@@ -4559,6 +4608,9 @@ static const char * const usb30_groups[] = {
static const struct sh_pfc_function pinmux_functions[] = { static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(audio_clk), SH_PFC_FUNCTION(audio_clk),
SH_PFC_FUNCTION(avb), SH_PFC_FUNCTION(avb),
SH_PFC_FUNCTION(can0),
SH_PFC_FUNCTION(can1),
SH_PFC_FUNCTION(can_clk),
SH_PFC_FUNCTION(drif0), SH_PFC_FUNCTION(drif0),
SH_PFC_FUNCTION(drif1), SH_PFC_FUNCTION(drif1),
SH_PFC_FUNCTION(drif2), SH_PFC_FUNCTION(drif2),
......
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