Commit a71c76ac authored by George Shen's avatar George Shen Committed by Alex Deucher

drm/amd/display: Fix DPCD translation for LTTPR AUX_RD_INTERVAL

[Why]
The translation between the DPCD value and the specified AUX_RD_INTERVAL
in the DP spec do not match.

[How]
Update values to match the spec.
Signed-off-by: default avatarGeorge Shen <george.shen@amd.com>
Reviewed-by: default avatarWenjing Liu <Wenjing.Liu@amd.com>
Acked-by: default avatarAnson Jacob <Anson.Jacob@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent dbb7898a
...@@ -892,13 +892,13 @@ static uint32_t translate_training_aux_read_interval(uint32_t dpcd_aux_read_inte ...@@ -892,13 +892,13 @@ static uint32_t translate_training_aux_read_interval(uint32_t dpcd_aux_read_inte
switch (dpcd_aux_read_interval) { switch (dpcd_aux_read_interval) {
case 0x01: case 0x01:
aux_rd_interval_us = 400; aux_rd_interval_us = 4000;
break; break;
case 0x02: case 0x02:
aux_rd_interval_us = 4000; aux_rd_interval_us = 8000;
break; break;
case 0x03: case 0x03:
aux_rd_interval_us = 8000; aux_rd_interval_us = 12000;
break; break;
case 0x04: case 0x04:
aux_rd_interval_us = 16000; aux_rd_interval_us = 16000;
......
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