Commit a7250728 authored by Andrew Morton's avatar Andrew Morton Committed by Linus Torvalds

[PATCH] x86 cpuid cache info update

From: Francois Romieu <romieu@fr.zoreil.com>

Missing cache size format for Intel P4E (p.26 of doc.  241618-025, "Intel
Processor Identification and the CPUID Instruction").
parent dfbbadeb
......@@ -90,6 +90,7 @@ static struct _cache_table cache_table[] __initdata =
{ 0x43, LVL_2, 512 },
{ 0x44, LVL_2, 1024 },
{ 0x45, LVL_2, 2048 },
{ 0x60, LVL_1_DATA, 16 },
{ 0x66, LVL_1_DATA, 8 },
{ 0x67, LVL_1_DATA, 16 },
{ 0x68, LVL_1_DATA, 32 },
......
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