Commit a7547337 authored by Andy Shevchenko's avatar Andy Shevchenko Committed by Hans Verkuil

media: atomisp: Remove unused GPIO related defines and APIs

Remove unused GPIO related defines and APIs.
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20240424210800.1776038-1-andriy.shevchenko@linux.intel.comReviewed-by: default avatarHans de Goede <hdegoede@redhat.com>
Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
parent 92a643ee
......@@ -16,27 +16,10 @@
#ifndef _gpio_block_defs_h_
#define _gpio_block_defs_h_
#define _HRT_GPIO_BLOCK_REG_ALIGN 4
/* R/W registers */
#define _gpio_block_reg_do_e 0
#define _gpio_block_reg_do_select 1
#define _gpio_block_reg_do_0 2
#define _gpio_block_reg_do_1 3
#define _gpio_block_reg_do_pwm_cnt_0 4
#define _gpio_block_reg_do_pwm_cnt_1 5
#define _gpio_block_reg_do_pwm_cnt_2 6
#define _gpio_block_reg_do_pwm_cnt_3 7
#define _gpio_block_reg_do_pwm_main_cnt 8
#define _gpio_block_reg_do_pwm_enable 9
#define _gpio_block_reg_di_debounce_sel 10
#define _gpio_block_reg_di_debounce_cnt_0 11
#define _gpio_block_reg_di_debounce_cnt_1 12
#define _gpio_block_reg_di_debounce_cnt_2 13
#define _gpio_block_reg_di_debounce_cnt_3 14
#define _gpio_block_reg_di_active_level 15
/* read-only registers */
#define _gpio_block_reg_di 16
#endif /* _gpio_block_defs_h_ */
......@@ -16,31 +16,8 @@
#ifndef __GPIO_GLOBAL_H_INCLUDED__
#define __GPIO_GLOBAL_H_INCLUDED__
#define IS_GPIO_VERSION_1
#include <gpio_block_defs.h>
/* pqiao: following part only defines in hive_isp_css_defs.h in fpga system.
port it here
*/
/* GPIO pin defines */
/*#define HIVE_GPIO_CAMERA_BOARD_RESET_PIN_NR 0
#define HIVE_GPIO_LCD_CLOCK_SELECT_PIN_NR 7
#define HIVE_GPIO_HDMI_CLOCK_SELECT_PIN_NR 8
#define HIVE_GPIO_LCD_VERT_FLIP_PIN_NR 8
#define HIVE_GPIO_LCD_HOR_FLIP_PIN_NR 9
#define HIVE_GPIO_AS3683_GPIO_P0_PIN_NR 1
#define HIVE_GPIO_AS3683_DATA_P1_PIN_NR 2
#define HIVE_GPIO_AS3683_CLK_P2_PIN_NR 3
#define HIVE_GPIO_AS3683_T1_F0_PIN_NR 4
#define HIVE_GPIO_AS3683_SFL_F1_PIN_NR 5
#define HIVE_GPIO_AS3683_STROBE_F2_PIN_NR 6
#define HIVE_GPIO_MAX1577_EN1_PIN_NR 1
#define HIVE_GPIO_MAX1577_EN2_PIN_NR 2
#define HIVE_GPIO_MAX8685A_EN_PIN_NR 3
#define HIVE_GPIO_MAX8685A_TRIG_PIN_NR 4*/
#define HIVE_GPIO_STROBE_TRIGGER_PIN 2
#endif /* __GPIO_GLOBAL_H_INCLUDED__ */
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Support for Intel Camera Imaging ISP subsystem.
* Copyright (c) 2010-2015, Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*/
#ifndef __GPIO_LOCAL_H_INCLUDED__
#define __GPIO_LOCAL_H_INCLUDED__
#include "gpio_global.h"
#endif /* __GPIO_LOCAL_H_INCLUDED__ */
......@@ -16,13 +16,10 @@
#ifndef __GPIO_PRIVATE_H_INCLUDED__
#define __GPIO_PRIVATE_H_INCLUDED__
#include "gpio_public.h"
#include "device_access.h"
#include "assert_support.h"
#include "device_access.h"
STORAGE_CLASS_GPIO_C void gpio_reg_store(
static inline void gpio_reg_store(
const gpio_ID_t ID,
const unsigned int reg,
const hrt_data value)
......@@ -33,7 +30,7 @@ STORAGE_CLASS_GPIO_C void gpio_reg_store(
return;
}
STORAGE_CLASS_GPIO_C hrt_data gpio_reg_load(
static inline hrt_data gpio_reg_load(
const gpio_ID_t ID,
const unsigned int reg)
{
......
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Support for Intel Camera Imaging ISP subsystem.
* Copyright (c) 2015, Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*/
#ifndef __GPIO_H_INCLUDED__
#define __GPIO_H_INCLUDED__
/*
* This file is included on every cell {SP,ISP,host} and on every system
* that uses the input system device(s). It defines the API to DLI bridge
*
* System and cell specific interfaces and inline code are included
* conditionally through Makefile path settings.
*
* - . system and cell agnostic interfaces, constants and identifiers
* - public: system agnostic, cell specific interfaces
* - private: system dependent, cell specific interfaces & inline implementations
* - global: system specific constants and identifiers
* - local: system and cell specific constants and identifiers
*/
#include "system_local.h"
#include "gpio_local.h"
#ifndef __INLINE_GPIO__
#define STORAGE_CLASS_GPIO_H extern
#define STORAGE_CLASS_GPIO_C
#include "gpio_public.h"
#else /* __INLINE_GPIO__ */
#define STORAGE_CLASS_GPIO_H static inline
#define STORAGE_CLASS_GPIO_C static inline
#include "gpio_private.h"
#endif /* __INLINE_GPIO__ */
#endif /* __GPIO_H_INCLUDED__ */
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Support for Intel Camera Imaging ISP subsystem.
* Copyright (c) 2015, Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*/
#ifndef __GPIO_PUBLIC_H_INCLUDED__
#define __GPIO_PUBLIC_H_INCLUDED__
#include "system_local.h"
/*! Write to a control register of GPIO[ID]
\param ID[in] GPIO identifier
\param reg_addr[in] register byte address
\param value[in] The data to be written
\return none, GPIO[ID].ctrl[reg] = value
*/
STORAGE_CLASS_GPIO_H void gpio_reg_store(
const gpio_ID_t ID,
const unsigned int reg_addr,
const hrt_data value);
/*! Read from a control register of GPIO[ID]
\param ID[in] GPIO identifier
\param reg_addr[in] register byte address
\param value[in] The data to be written
\return GPIO[ID].ctrl[reg]
*/
STORAGE_CLASS_GPIO_H hrt_data gpio_reg_load(
const gpio_ID_t ID,
const unsigned int reg_addr);
#endif /* __GPIO_PUBLIC_H_INCLUDED__ */
......@@ -66,8 +66,8 @@
#include "sp.h" /* cnd_sp_irq_enable() */
#include "isp.h" /* cnd_isp_irq_enable, ISP_VEC_NELEMS */
#include "gp_device.h" /* gp_device_reg_store() */
#define __INLINE_GPIO__
#include "gpio.h"
#include <gpio_global.h>
#include <gpio_private.h>
#include "timed_ctrl.h"
#include "ia_css_inputfifo.h"
#define WITH_PC_MONITORING 0
......@@ -1363,10 +1363,8 @@ ia_css_init(struct device *dev, const struct ia_css_env *env,
ia_css_device_access_init(&env->hw_access_env);
select = gpio_reg_load(GPIO0_ID, _gpio_block_reg_do_select)
& (~GPIO_FLASH_PIN_MASK);
enable = gpio_reg_load(GPIO0_ID, _gpio_block_reg_do_e)
| GPIO_FLASH_PIN_MASK;
select = gpio_reg_load(GPIO0_ID, _gpio_block_reg_do_select) & ~GPIO_FLASH_PIN_MASK;
enable = gpio_reg_load(GPIO0_ID, _gpio_block_reg_do_e) | GPIO_FLASH_PIN_MASK;
sh_css_mmu_set_page_table_base_index(mmu_l1_base);
my_css_save.mmu_base = mmu_l1_base;
......
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