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Commit a8c4362b authored by Ben Skeggs's avatar Ben Skeggs
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drm/nouveau/devinit: namespace + nvidia gpu names (no binary change) 

The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 7632b30e
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Showing with 302 additions and 295 deletions
drivers/gpu/drm/nouveau/include/nvkm/core/os.h
View file @ a8c4362b
...@@ -219,5 +219,6 @@ ...@@ -219,5 +219,6 @@
#define nva3_clk_post gt215_clk_post #define nva3_clk_post gt215_clk_post
#define nva3_clk_info gt215_clk_info #define nva3_clk_info gt215_clk_info
#define nva3_pll_info gt215_pll_info #define nva3_pll_info gt215_pll_info
#define nouveau_ibus nvkm_ibus
#endif #endif
drivers/gpu/drm/nouveau/include/nvkm/subdev/devinit.h
View file @ a8c4362b
#ifndef __NOUVEAU_DEVINIT_H__ #ifndef __NVKM_DEVINIT_H__
#define __NOUVEAU_DEVINIT_H__ #define __NVKM_DEVINIT_H__
#include <core/subdev.h> #include <core/subdev.h>
#include <core/device.h>
struct nouveau_devinit { struct nvkm_devinit {
struct nouveau_subdev base; struct nvkm_subdev base;
bool post; bool post;
void (*meminit)(struct nouveau_devinit *); void (*meminit)(struct nvkm_devinit *);
int (*pll_set)(struct nouveau_devinit *, u32 type, u32 freq); int (*pll_set)(struct nvkm_devinit *, u32 type, u32 freq);
u32 (*mmio)(struct nouveau_devinit *, u32 addr); u32 (*mmio)(struct nvkm_devinit *, u32 addr);
}; };
static inline struct nouveau_devinit * static inline struct nvkm_devinit *
nouveau_devinit(void *obj) nvkm_devinit(void *obj)
{ {
return (void *)nouveau_subdev(obj, NVDEV_SUBDEV_DEVINIT); return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_DEVINIT);
} }
extern struct nouveau_oclass *nv04_devinit_oclass; extern struct nvkm_oclass *nv04_devinit_oclass;
extern struct nouveau_oclass *nv05_devinit_oclass; extern struct nvkm_oclass *nv05_devinit_oclass;
extern struct nouveau_oclass *nv10_devinit_oclass; extern struct nvkm_oclass *nv10_devinit_oclass;
extern struct nouveau_oclass *nv1a_devinit_oclass; extern struct nvkm_oclass *nv1a_devinit_oclass;
extern struct nouveau_oclass *nv20_devinit_oclass; extern struct nvkm_oclass *nv20_devinit_oclass;
extern struct nouveau_oclass *nv50_devinit_oclass; extern struct nvkm_oclass *nv50_devinit_oclass;
extern struct nouveau_oclass *nv84_devinit_oclass; extern struct nvkm_oclass *g84_devinit_oclass;
extern struct nouveau_oclass *nv98_devinit_oclass; extern struct nvkm_oclass *g98_devinit_oclass;
extern struct nouveau_oclass *nva3_devinit_oclass; extern struct nvkm_oclass *gt215_devinit_oclass;
extern struct nouveau_oclass *nvaf_devinit_oclass; extern struct nvkm_oclass *mcp89_devinit_oclass;
extern struct nouveau_oclass *nvc0_devinit_oclass; extern struct nvkm_oclass *gf100_devinit_oclass;
extern struct nouveau_oclass *gm107_devinit_oclass; extern struct nvkm_oclass *gm107_devinit_oclass;
extern struct nouveau_oclass *gm204_devinit_oclass; extern struct nvkm_oclass *gm204_devinit_oclass;
#endif #endif
drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c
View file @ a8c4362b
...@@ -96,7 +96,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -96,7 +96,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv84_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = nv50_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = nv50_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -125,7 +125,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -125,7 +125,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv84_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = nv50_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = nv50_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -154,7 +154,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -154,7 +154,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv84_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = nv50_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = nv50_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -183,7 +183,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -183,7 +183,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv84_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv94_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv94_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -212,7 +212,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -212,7 +212,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv84_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv94_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv94_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -241,7 +241,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -241,7 +241,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv98_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = g98_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -270,7 +270,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -270,7 +270,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv84_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -299,7 +299,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -299,7 +299,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = mcp77_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = mcp77_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv98_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = g98_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -328,7 +328,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -328,7 +328,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = mcp77_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = mcp77_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nv84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv98_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = g98_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -357,7 +357,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -357,7 +357,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = &gt215_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = &gt215_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nva3_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = gt215_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -388,7 +388,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -388,7 +388,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = &gt215_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = &gt215_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nva3_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = gt215_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -418,7 +418,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -418,7 +418,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = &gt215_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = &gt215_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nva3_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = gt215_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -448,7 +448,7 @@ nv50_identify(struct nouveau_device *device) ...@@ -448,7 +448,7 @@ nv50_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = &gt215_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = &gt215_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvaf_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = mcp89_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = g94_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
......
drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c
View file @ a8c4362b
...@@ -68,7 +68,7 @@ nvc0_identify(struct nouveau_device *device) ...@@ -68,7 +68,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nvc0_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nvc0_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -101,7 +101,7 @@ nvc0_identify(struct nouveau_device *device) ...@@ -101,7 +101,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nvc0_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nvc0_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -134,7 +134,7 @@ nvc0_identify(struct nouveau_device *device) ...@@ -134,7 +134,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -166,7 +166,7 @@ nvc0_identify(struct nouveau_device *device) ...@@ -166,7 +166,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nvc0_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nvc0_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -199,7 +199,7 @@ nvc0_identify(struct nouveau_device *device) ...@@ -199,7 +199,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -231,7 +231,7 @@ nvc0_identify(struct nouveau_device *device) ...@@ -231,7 +231,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -263,7 +263,7 @@ nvc0_identify(struct nouveau_device *device) ...@@ -263,7 +263,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nvc0_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nvc0_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -296,7 +296,7 @@ nvc0_identify(struct nouveau_device *device) ...@@ -296,7 +296,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -328,7 +328,7 @@ nvc0_identify(struct nouveau_device *device) ...@@ -328,7 +328,7 @@ nvc0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
......
drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c
View file @ a8c4362b
...@@ -68,7 +68,7 @@ nve0_identify(struct nouveau_device *device) ...@@ -68,7 +68,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -102,7 +102,7 @@ nve0_identify(struct nouveau_device *device) ...@@ -102,7 +102,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -136,7 +136,7 @@ nve0_identify(struct nouveau_device *device) ...@@ -136,7 +136,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -192,7 +192,7 @@ nve0_identify(struct nouveau_device *device) ...@@ -192,7 +192,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -226,7 +226,7 @@ nve0_identify(struct nouveau_device *device) ...@@ -226,7 +226,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -260,7 +260,7 @@ nve0_identify(struct nouveau_device *device) ...@@ -260,7 +260,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
...@@ -293,7 +293,7 @@ nve0_identify(struct nouveau_device *device) ...@@ -293,7 +293,7 @@ nve0_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass; device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass; device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass; device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
......
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/Kbuild
View file @ a8c4362b
...@@ -5,10 +5,10 @@ nvkm-y += nvkm/subdev/devinit/nv10.o ...@@ -5,10 +5,10 @@ nvkm-y += nvkm/subdev/devinit/nv10.o
nvkm-y += nvkm/subdev/devinit/nv1a.o nvkm-y += nvkm/subdev/devinit/nv1a.o
nvkm-y += nvkm/subdev/devinit/nv20.o nvkm-y += nvkm/subdev/devinit/nv20.o
nvkm-y += nvkm/subdev/devinit/nv50.o nvkm-y += nvkm/subdev/devinit/nv50.o
nvkm-y += nvkm/subdev/devinit/nv84.o nvkm-y += nvkm/subdev/devinit/g84.o
nvkm-y += nvkm/subdev/devinit/nv98.o nvkm-y += nvkm/subdev/devinit/g98.o
nvkm-y += nvkm/subdev/devinit/nva3.o nvkm-y += nvkm/subdev/devinit/gt215.o
nvkm-y += nvkm/subdev/devinit/nvaf.o nvkm-y += nvkm/subdev/devinit/mcp89.o
nvkm-y += nvkm/subdev/devinit/nvc0.o nvkm-y += nvkm/subdev/devinit/gf100.o
nvkm-y += nvkm/subdev/devinit/gm107.o nvkm-y += nvkm/subdev/devinit/gm107.o
nvkm-y += nvkm/subdev/devinit/gm204.o nvkm-y += nvkm/subdev/devinit/gm204.o
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/base.c
View file @ a8c4362b
...@@ -21,17 +21,16 @@ ...@@ -21,17 +21,16 @@
* *
* Authors: Ben Skeggs * Authors: Ben Skeggs
*/ */
#include "priv.h"
#include <core/device.h>
#include <core/option.h> #include <core/option.h>
#include <subdev/vga.h> #include <subdev/vga.h>
#include "priv.h"
int int
_nouveau_devinit_fini(struct nouveau_object *object, bool suspend) _nvkm_devinit_fini(struct nvkm_object *object, bool suspend)
{ {
struct nouveau_devinit *devinit = (void *)object; struct nvkm_devinit *devinit = (void *)object;
/* force full reinit on resume */ /* force full reinit on resume */
if (suspend) if (suspend)
...@@ -40,17 +39,17 @@ _nouveau_devinit_fini(struct nouveau_object *object, bool suspend) ...@@ -40,17 +39,17 @@ _nouveau_devinit_fini(struct nouveau_object *object, bool suspend)
/* unlock the extended vga crtc regs */ /* unlock the extended vga crtc regs */
nv_lockvgac(devinit, false); nv_lockvgac(devinit, false);
return nouveau_subdev_fini(&devinit->base, suspend); return nvkm_subdev_fini(&devinit->base, suspend);
} }
int int
_nouveau_devinit_init(struct nouveau_object *object) _nvkm_devinit_init(struct nvkm_object *object)
{ {
struct nouveau_devinit_impl *impl = (void *)object->oclass; struct nvkm_devinit_impl *impl = (void *)object->oclass;
struct nouveau_devinit *devinit = (void *)object; struct nvkm_devinit *devinit = (void *)object;
int ret; int ret;
ret = nouveau_subdev_init(&devinit->base); ret = nvkm_subdev_init(&devinit->base);
if (ret) if (ret)
return ret; return ret;
...@@ -64,34 +63,32 @@ _nouveau_devinit_init(struct nouveau_object *object) ...@@ -64,34 +63,32 @@ _nouveau_devinit_init(struct nouveau_object *object)
} }
void void
_nouveau_devinit_dtor(struct nouveau_object *object) _nvkm_devinit_dtor(struct nvkm_object *object)
{ {
struct nouveau_devinit *devinit = (void *)object; struct nvkm_devinit *devinit = (void *)object;
/* lock crtc regs */ /* lock crtc regs */
nv_lockvgac(devinit, true); nv_lockvgac(devinit, true);
nouveau_subdev_destroy(&devinit->base); nvkm_subdev_destroy(&devinit->base);
} }
int int
nouveau_devinit_create_(struct nouveau_object *parent, nvkm_devinit_create_(struct nvkm_object *parent, struct nvkm_object *engine,
struct nouveau_object *engine, struct nvkm_oclass *oclass, int size, void **pobject)
struct nouveau_oclass *oclass,
int size, void **pobject)
{ {
struct nouveau_devinit_impl *impl = (void *)oclass; struct nvkm_devinit_impl *impl = (void *)oclass;
struct nouveau_device *device = nv_device(parent); struct nvkm_device *device = nv_device(parent);
struct nouveau_devinit *devinit; struct nvkm_devinit *devinit;
int ret; int ret;
ret = nouveau_subdev_create_(parent, engine, oclass, 0, "DEVINIT", ret = nvkm_subdev_create_(parent, engine, oclass, 0, "DEVINIT",
"init", size, pobject); "init", size, pobject);
devinit = *pobject; devinit = *pobject;
if (ret) if (ret)
return ret; return ret;
devinit->post = nouveau_boolopt(device->cfgopt, "NvForcePost", false); devinit->post = nvkm_boolopt(device->cfgopt, "NvForcePost", false);
devinit->meminit = impl->meminit; devinit->meminit = impl->meminit;
devinit->pll_set = impl->pll_set; devinit->pll_set = impl->pll_set;
devinit->mmio = impl->mmio; devinit->mmio = impl->mmio;
......
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/fbmem.h
View file @ a8c4362b
...@@ -23,9 +23,7 @@ ...@@ -23,9 +23,7 @@
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
*/ */
#include <core/device.h> #include <core/device.h>
#include <subdev/fb/regsnv04.h> #include <subdev/fb/regsnv04.h>
#define NV04_PFB_DEBUG_0 0x00100080 #define NV04_PFB_DEBUG_0 0x00100080
...@@ -48,7 +46,7 @@ ...@@ -48,7 +46,7 @@
# define NV10_PFB_REFCTRL_VALID_1 (1 << 31) # define NV10_PFB_REFCTRL_VALID_1 (1 << 31)
static inline struct io_mapping * static inline struct io_mapping *
fbmem_init(struct nouveau_device *dev) fbmem_init(struct nvkm_device *dev)
{ {
return io_mapping_create_wc(nv_device_resource_start(dev, 1), return io_mapping_create_wc(nv_device_resource_start(dev, 1),
nv_device_resource_len(dev, 1)); nv_device_resource_len(dev, 1));
......
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv84.c → drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g84.c
View file @ a8c4362b
...@@ -21,11 +21,13 @@ ...@@ -21,11 +21,13 @@
* *
* Authors: Ben Skeggs * Authors: Ben Skeggs
*/ */
#include "nv50.h" #include "nv50.h"
#include <subdev/bios.h>
#include <subdev/bios/init.h>
static u64 static u64
nv84_devinit_disable(struct nouveau_devinit *devinit) g84_devinit_disable(struct nvkm_devinit *devinit)
{ {
struct nv50_devinit_priv *priv = (void *)devinit; struct nv50_devinit_priv *priv = (void *)devinit;
u32 r001540 = nv_rd32(priv, 0x001540); u32 r001540 = nv_rd32(priv, 0x001540);
...@@ -49,16 +51,16 @@ nv84_devinit_disable(struct nouveau_devinit *devinit) ...@@ -49,16 +51,16 @@ nv84_devinit_disable(struct nouveau_devinit *devinit)
return disable; return disable;
} }
struct nouveau_oclass * struct nvkm_oclass *
nv84_devinit_oclass = &(struct nouveau_devinit_impl) { g84_devinit_oclass = &(struct nvkm_devinit_impl) {
.base.handle = NV_SUBDEV(DEVINIT, 0x84), .base.handle = NV_SUBDEV(DEVINIT, 0x84),
.base.ofuncs = &(struct nouveau_ofuncs) { .base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = nv50_devinit_ctor, .ctor = nv50_devinit_ctor,
.dtor = _nouveau_devinit_dtor, .dtor = _nvkm_devinit_dtor,
.init = nv50_devinit_init, .init = nv50_devinit_init,
.fini = _nouveau_devinit_fini, .fini = _nvkm_devinit_fini,
}, },
.pll_set = nv50_devinit_pll_set, .pll_set = nv50_devinit_pll_set,
.disable = nv84_devinit_disable, .disable = g84_devinit_disable,
.post = nvbios_init, .post = nvbios_init,
}.base; }.base;
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv98.c → drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g98.c
View file @ a8c4362b
...@@ -21,11 +21,13 @@ ...@@ -21,11 +21,13 @@
* *
* Authors: Ben Skeggs * Authors: Ben Skeggs
*/ */
#include "nv50.h" #include "nv50.h"
#include <subdev/bios.h>
#include <subdev/bios/init.h>
static u64 static u64
nv98_devinit_disable(struct nouveau_devinit *devinit) g98_devinit_disable(struct nvkm_devinit *devinit)
{ {
struct nv50_devinit_priv *priv = (void *)devinit; struct nv50_devinit_priv *priv = (void *)devinit;
u32 r001540 = nv_rd32(priv, 0x001540); u32 r001540 = nv_rd32(priv, 0x001540);
...@@ -48,16 +50,16 @@ nv98_devinit_disable(struct nouveau_devinit *devinit) ...@@ -48,16 +50,16 @@ nv98_devinit_disable(struct nouveau_devinit *devinit)
return disable; return disable;
} }
struct nouveau_oclass * struct nvkm_oclass *
nv98_devinit_oclass = &(struct nouveau_devinit_impl) { g98_devinit_oclass = &(struct nvkm_devinit_impl) {
.base.handle = NV_SUBDEV(DEVINIT, 0x98), .base.handle = NV_SUBDEV(DEVINIT, 0x98),
.base.ofuncs = &(struct nouveau_ofuncs) { .base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = nv50_devinit_ctor, .ctor = nv50_devinit_ctor,
.dtor = _nouveau_devinit_dtor, .dtor = _nvkm_devinit_dtor,
.init = nv50_devinit_init, .init = nv50_devinit_init,
.fini = _nouveau_devinit_fini, .fini = _nvkm_devinit_fini,
}, },
.pll_set = nv50_devinit_pll_set, .pll_set = nv50_devinit_pll_set,
.disable = nv98_devinit_disable, .disable = g98_devinit_disable,
.post = nvbios_init, .post = nvbios_init,
}.base; }.base;
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nvc0.c → drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c
View file @ a8c4362b
...@@ -21,14 +21,18 @@ ...@@ -21,14 +21,18 @@
* *
* Authors: Ben Skeggs * Authors: Ben Skeggs
*/ */
#include "nv50.h" #include "nv50.h"
#include <subdev/bios.h>
#include <subdev/bios/init.h>
#include <subdev/bios/pll.h>
#include <subdev/clk/pll.h>
int int
nvc0_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq) gf100_devinit_pll_set(struct nvkm_devinit *devinit, u32 type, u32 freq)
{ {
struct nv50_devinit_priv *priv = (void *)devinit; struct nv50_devinit_priv *priv = (void *)devinit;
struct nouveau_bios *bios = nouveau_bios(priv); struct nvkm_bios *bios = nvkm_bios(priv);
struct nvbios_pll info; struct nvbios_pll info;
int N, fN, M, P; int N, fN, M, P;
int ret; int ret;
...@@ -37,7 +41,7 @@ nvc0_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq) ...@@ -37,7 +41,7 @@ nvc0_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq)
if (ret) if (ret)
return ret; return ret;
ret = nva3_pll_calc(nv_subdev(devinit), &info, freq, &N, &fN, &M, &P); ret = gt215_pll_calc(nv_subdev(devinit), &info, freq, &N, &fN, &M, &P);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -60,7 +64,7 @@ nvc0_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq) ...@@ -60,7 +64,7 @@ nvc0_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq)
} }
static u64 static u64
nvc0_devinit_disable(struct nouveau_devinit *devinit) gf100_devinit_disable(struct nvkm_devinit *devinit)
{ {
struct nv50_devinit_priv *priv = (void *)devinit; struct nv50_devinit_priv *priv = (void *)devinit;
u32 r022500 = nv_rd32(priv, 0x022500); u32 r022500 = nv_rd32(priv, 0x022500);
...@@ -87,33 +91,34 @@ nvc0_devinit_disable(struct nouveau_devinit *devinit) ...@@ -87,33 +91,34 @@ nvc0_devinit_disable(struct nouveau_devinit *devinit)
} }
static int static int
nvc0_devinit_ctor(struct nouveau_object *parent, struct nouveau_object *engine, gf100_devinit_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size, struct nvkm_oclass *oclass, void *data, u32 size,
struct nouveau_object **pobject) struct nvkm_object **pobject)
{ {
struct nv50_devinit_priv *priv; struct nv50_devinit_priv *priv;
int ret; int ret;
ret = nouveau_devinit_create(parent, engine, oclass, &priv); ret = nvkm_devinit_create(parent, engine, oclass, &priv);
*pobject = nv_object(priv); *pobject = nv_object(priv);
if (ret) if (ret)
return ret; return ret;
if (nv_rd32(priv, 0x022500) & 0x00000001) if (nv_rd32(priv, 0x022500) & 0x00000001)
priv->base.post = true; priv->base.post = true;
return 0; return 0;
} }
struct nouveau_oclass * struct nvkm_oclass *
nvc0_devinit_oclass = &(struct nouveau_devinit_impl) { gf100_devinit_oclass = &(struct nvkm_devinit_impl) {
.base.handle = NV_SUBDEV(DEVINIT, 0xc0), .base.handle = NV_SUBDEV(DEVINIT, 0xc0),
.base.ofuncs = &(struct nouveau_ofuncs) { .base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = nvc0_devinit_ctor, .ctor = gf100_devinit_ctor,
.dtor = _nouveau_devinit_dtor, .dtor = _nvkm_devinit_dtor,
.init = nv50_devinit_init, .init = nv50_devinit_init,
.fini = _nouveau_devinit_fini, .fini = _nvkm_devinit_fini,
}, },
.pll_set = nvc0_devinit_pll_set, .pll_set = gf100_devinit_pll_set,
.disable = nvc0_devinit_disable, .disable = gf100_devinit_disable,
.post = nvbios_init, .post = nvbios_init,
}.base; }.base;
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c
View file @ a8c4362b
...@@ -21,11 +21,13 @@ ...@@ -21,11 +21,13 @@
* *
* Authors: Ben Skeggs * Authors: Ben Skeggs
*/ */
#include "nv50.h" #include "nv50.h"
#include <subdev/bios.h>
#include <subdev/bios/init.h>
u64 u64
gm107_devinit_disable(struct nouveau_devinit *devinit) gm107_devinit_disable(struct nvkm_devinit *devinit)
{ {
struct nv50_devinit_priv *priv = (void *)devinit; struct nv50_devinit_priv *priv = (void *)devinit;
u32 r021c00 = nv_rd32(priv, 0x021c00); u32 r021c00 = nv_rd32(priv, 0x021c00);
...@@ -42,16 +44,16 @@ gm107_devinit_disable(struct nouveau_devinit *devinit) ...@@ -42,16 +44,16 @@ gm107_devinit_disable(struct nouveau_devinit *devinit)
return disable; return disable;
} }
struct nouveau_oclass * struct nvkm_oclass *
gm107_devinit_oclass = &(struct nouveau_devinit_impl) { gm107_devinit_oclass = &(struct nvkm_devinit_impl) {
.base.handle = NV_SUBDEV(DEVINIT, 0x07), .base.handle = NV_SUBDEV(DEVINIT, 0x07),
.base.ofuncs = &(struct nouveau_ofuncs) { .base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = nv50_devinit_ctor, .ctor = nv50_devinit_ctor,
.dtor = _nouveau_devinit_dtor, .dtor = _nvkm_devinit_dtor,
.init = nv50_devinit_init, .init = nv50_devinit_init,
.fini = _nouveau_devinit_fini, .fini = _nvkm_devinit_fini,
}, },
.pll_set = nvc0_devinit_pll_set, .pll_set = gf100_devinit_pll_set,
.disable = gm107_devinit_disable, .disable = gm107_devinit_disable,
.post = nvbios_init, .post = nvbios_init,
}.base; }.base;
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm204.c
View file @ a8c4362b
...@@ -21,17 +21,16 @@ ...@@ -21,17 +21,16 @@
* *
* Authors: Ben Skeggs * Authors: Ben Skeggs
*/ */
#include "nv50.h"
#include <subdev/bios.h> #include <subdev/bios.h>
#include <subdev/bios/bit.h> #include <subdev/bios/bit.h>
#include <subdev/bios/pmu.h> #include <subdev/bios/pmu.h>
#include "nv50.h"
static void static void
pmu_code(struct nv50_devinit_priv *priv, u32 pmu, u32 img, u32 len, bool sec) pmu_code(struct nv50_devinit_priv *priv, u32 pmu, u32 img, u32 len, bool sec)
{ {
struct nouveau_bios *bios = nouveau_bios(priv); struct nvkm_bios *bios = nvkm_bios(priv);
int i; int i;
nv_wr32(priv, 0x10a180, 0x01000000 | (sec ? 0x10000000 : 0) | pmu); nv_wr32(priv, 0x10a180, 0x01000000 | (sec ? 0x10000000 : 0) | pmu);
...@@ -50,7 +49,7 @@ pmu_code(struct nv50_devinit_priv *priv, u32 pmu, u32 img, u32 len, bool sec) ...@@ -50,7 +49,7 @@ pmu_code(struct nv50_devinit_priv *priv, u32 pmu, u32 img, u32 len, bool sec)
static void static void
pmu_data(struct nv50_devinit_priv *priv, u32 pmu, u32 img, u32 len) pmu_data(struct nv50_devinit_priv *priv, u32 pmu, u32 img, u32 len)
{ {
struct nouveau_bios *bios = nouveau_bios(priv); struct nvkm_bios *bios = nvkm_bios(priv);
int i; int i;
nv_wr32(priv, 0x10a1c0, 0x01000000 | pmu); nv_wr32(priv, 0x10a1c0, 0x01000000 | pmu);
...@@ -78,7 +77,7 @@ static int ...@@ -78,7 +77,7 @@ static int
pmu_load(struct nv50_devinit_priv *priv, u8 type, bool post, pmu_load(struct nv50_devinit_priv *priv, u8 type, bool post,
u32 *init_addr_pmu, u32 *args_addr_pmu) u32 *init_addr_pmu, u32 *args_addr_pmu)
{ {
struct nouveau_bios *bios = nouveau_bios(priv); struct nvkm_bios *bios = nvkm_bios(priv);
struct nvbios_pmuR pmu; struct nvbios_pmuR pmu;
if (!nvbios_pmuRm(bios, type, &pmu)) { if (!nvbios_pmuRm(bios, type, &pmu)) {
...@@ -103,10 +102,10 @@ pmu_load(struct nv50_devinit_priv *priv, u8 type, bool post, ...@@ -103,10 +102,10 @@ pmu_load(struct nv50_devinit_priv *priv, u8 type, bool post,
} }
static int static int
gm204_devinit_post(struct nouveau_subdev *subdev, bool post) gm204_devinit_post(struct nvkm_subdev *subdev, bool post)
{ {
struct nv50_devinit_priv *priv = (void *)nouveau_devinit(subdev); struct nv50_devinit_priv *priv = (void *)nvkm_devinit(subdev);
struct nouveau_bios *bios = nouveau_bios(priv); struct nvkm_bios *bios = nvkm_bios(priv);
struct bit_entry bit_I; struct bit_entry bit_I;
u32 init, args; u32 init, args;
int ret; int ret;
...@@ -158,16 +157,16 @@ gm204_devinit_post(struct nouveau_subdev *subdev, bool post) ...@@ -158,16 +157,16 @@ gm204_devinit_post(struct nouveau_subdev *subdev, bool post)
return pmu_load(priv, 0x01, post, NULL, NULL); return pmu_load(priv, 0x01, post, NULL, NULL);
} }
struct nouveau_oclass * struct nvkm_oclass *
gm204_devinit_oclass = &(struct nouveau_devinit_impl) { gm204_devinit_oclass = &(struct nvkm_devinit_impl) {
.base.handle = NV_SUBDEV(DEVINIT, 0x07), .base.handle = NV_SUBDEV(DEVINIT, 0x07),
.base.ofuncs = &(struct nouveau_ofuncs) { .base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = nv50_devinit_ctor, .ctor = nv50_devinit_ctor,
.dtor = _nouveau_devinit_dtor, .dtor = _nvkm_devinit_dtor,
.init = nv50_devinit_init, .init = nv50_devinit_init,
.fini = _nouveau_devinit_fini, .fini = _nvkm_devinit_fini,
}, },
.pll_set = nvc0_devinit_pll_set, .pll_set = gf100_devinit_pll_set,
.disable = gm107_devinit_disable, .disable = gm107_devinit_disable,
.post = gm204_devinit_post, .post = gm204_devinit_post,
}.base; }.base;
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nva3.c → drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c
View file @ a8c4362b
...@@ -21,14 +21,18 @@ ...@@ -21,14 +21,18 @@
* *
* Authors: Ben Skeggs * Authors: Ben Skeggs
*/ */
#include "nv50.h" #include "nv50.h"
#include <subdev/bios.h>
#include <subdev/bios/init.h>
#include <subdev/bios/pll.h>
#include <subdev/clk/pll.h>
int int
nva3_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq) gt215_devinit_pll_set(struct nvkm_devinit *devinit, u32 type, u32 freq)
{ {
struct nv50_devinit_priv *priv = (void *)devinit; struct nv50_devinit_priv *priv = (void *)devinit;
struct nouveau_bios *bios = nouveau_bios(priv); struct nvkm_bios *bios = nvkm_bios(priv);
struct nvbios_pll info; struct nvbios_pll info;
int N, fN, M, P; int N, fN, M, P;
int ret; int ret;
...@@ -37,7 +41,7 @@ nva3_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq) ...@@ -37,7 +41,7 @@ nva3_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq)
if (ret) if (ret)
return ret; return ret;
ret = nva3_pll_calc(nv_subdev(devinit), &info, freq, &N, &fN, &M, &P); ret = gt215_pll_calc(nv_subdev(devinit), &info, freq, &N, &fN, &M, &P);
if (ret < 0) if (ret < 0)
return ret; return ret;
...@@ -59,7 +63,7 @@ nva3_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq) ...@@ -59,7 +63,7 @@ nva3_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq)
} }
static u64 static u64
nva3_devinit_disable(struct nouveau_devinit *devinit) gt215_devinit_disable(struct nvkm_devinit *devinit)
{ {
struct nv50_devinit_priv *priv = (void *)devinit; struct nv50_devinit_priv *priv = (void *)devinit;
u32 r001540 = nv_rd32(priv, 0x001540); u32 r001540 = nv_rd32(priv, 0x001540);
...@@ -82,7 +86,7 @@ nva3_devinit_disable(struct nouveau_devinit *devinit) ...@@ -82,7 +86,7 @@ nva3_devinit_disable(struct nouveau_devinit *devinit)
} }
static u32 static u32
nva3_devinit_mmio_part[] = { gt215_devinit_mmio_part[] = {
0x100720, 0x1008bc, 4, 0x100720, 0x1008bc, 4,
0x100a20, 0x100adc, 4, 0x100a20, 0x100adc, 4,
0x100d80, 0x100ddc, 4, 0x100d80, 0x100ddc, 4,
...@@ -95,10 +99,10 @@ nva3_devinit_mmio_part[] = { ...@@ -95,10 +99,10 @@ nva3_devinit_mmio_part[] = {
}; };
static u32 static u32
nva3_devinit_mmio(struct nouveau_devinit *devinit, u32 addr) gt215_devinit_mmio(struct nvkm_devinit *devinit, u32 addr)
{ {
struct nv50_devinit_priv *priv = (void *)devinit; struct nv50_devinit_priv *priv = (void *)devinit;
u32 *mmio = nva3_devinit_mmio_part; u32 *mmio = gt215_devinit_mmio_part;
/* the init tables on some boards have INIT_RAM_RESTRICT_ZM_REG_GROUP /* the init tables on some boards have INIT_RAM_RESTRICT_ZM_REG_GROUP
* instructions which touch registers that may not even exist on * instructions which touch registers that may not even exist on
...@@ -130,17 +134,17 @@ nva3_devinit_mmio(struct nouveau_devinit *devinit, u32 addr) ...@@ -130,17 +134,17 @@ nva3_devinit_mmio(struct nouveau_devinit *devinit, u32 addr)
return addr; return addr;
} }
struct nouveau_oclass * struct nvkm_oclass *
nva3_devinit_oclass = &(struct nouveau_devinit_impl) { gt215_devinit_oclass = &(struct nvkm_devinit_impl) {
.base.handle = NV_SUBDEV(DEVINIT, 0xa3), .base.handle = NV_SUBDEV(DEVINIT, 0xa3),
.base.ofuncs = &(struct nouveau_ofuncs) { .base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = nv50_devinit_ctor, .ctor = nv50_devinit_ctor,
.dtor = _nouveau_devinit_dtor, .dtor = _nvkm_devinit_dtor,
.init = nv50_devinit_init, .init = nv50_devinit_init,
.fini = _nouveau_devinit_fini, .fini = _nvkm_devinit_fini,
}, },
.pll_set = nva3_devinit_pll_set, .pll_set = gt215_devinit_pll_set,
.disable = nva3_devinit_disable, .disable = gt215_devinit_disable,
.mmio = nva3_devinit_mmio, .mmio = gt215_devinit_mmio,
.post = nvbios_init, .post = nvbios_init,
}.base; }.base;
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nvaf.c → drivers/gpu/drm/nouveau/nvkm/subdev/devinit/mcp89.c
View file @ a8c4362b
...@@ -21,11 +21,13 @@ ...@@ -21,11 +21,13 @@
* *
* Authors: Ben Skeggs * Authors: Ben Skeggs
*/ */
#include "nv50.h" #include "nv50.h"
#include <subdev/bios.h>
#include <subdev/bios/init.h>
static u64 static u64
nvaf_devinit_disable(struct nouveau_devinit *devinit) mcp89_devinit_disable(struct nvkm_devinit *devinit)
{ {
struct nv50_devinit_priv *priv = (void *)devinit; struct nv50_devinit_priv *priv = (void *)devinit;
u32 r001540 = nv_rd32(priv, 0x001540); u32 r001540 = nv_rd32(priv, 0x001540);
...@@ -49,16 +51,16 @@ nvaf_devinit_disable(struct nouveau_devinit *devinit) ...@@ -49,16 +51,16 @@ nvaf_devinit_disable(struct nouveau_devinit *devinit)
return disable; return disable;
} }
struct nouveau_oclass * struct nvkm_oclass *
nvaf_devinit_oclass = &(struct nouveau_devinit_impl) { mcp89_devinit_oclass = &(struct nvkm_devinit_impl) {
.base.handle = NV_SUBDEV(DEVINIT, 0xaf), .base.handle = NV_SUBDEV(DEVINIT, 0xaf),
.base.ofuncs = &(struct nouveau_ofuncs) { .base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = nv50_devinit_ctor, .ctor = nv50_devinit_ctor,
.dtor = _nouveau_devinit_dtor, .dtor = _nvkm_devinit_dtor,
.init = nv50_devinit_init, .init = nv50_devinit_init,
.fini = _nouveau_devinit_fini, .fini = _nvkm_devinit_fini,
}, },
.pll_set = nva3_devinit_pll_set, .pll_set = gt215_devinit_pll_set,
.disable = nvaf_devinit_disable, .disable = mcp89_devinit_disable,
.post = nvbios_init, .post = nvbios_init,
}.base; }.base;
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c
View file @ a8c4362b
...@@ -23,14 +23,17 @@ ...@@ -23,14 +23,17 @@
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
*/ */
#include "nv04.h"
#include "fbmem.h"
#include <subdev/bios.h>
#include <subdev/bios/init.h>
#include <subdev/bios/pll.h>
#include <subdev/clk/pll.h>
#include <subdev/vga.h> #include <subdev/vga.h>
#include "fbmem.h"
#include "nv04.h"
static void static void
nv04_devinit_meminit(struct nouveau_devinit *devinit) nv04_devinit_meminit(struct nvkm_devinit *devinit)
{ {
struct nv04_devinit_priv *priv = (void *)devinit; struct nv04_devinit_priv *priv = (void *)devinit;
u32 patt = 0xdeadbeef; u32 patt = 0xdeadbeef;
...@@ -136,10 +139,10 @@ powerctrl_1_shift(int chip_version, int reg) ...@@ -136,10 +139,10 @@ powerctrl_1_shift(int chip_version, int reg)
} }
void void
setPLL_single(struct nouveau_devinit *devinit, u32 reg, setPLL_single(struct nvkm_devinit *devinit, u32 reg,
struct nouveau_pll_vals *pv) struct nvkm_pll_vals *pv)
{ {
int chip_version = nouveau_bios(devinit)->version.chip; int chip_version = nvkm_bios(devinit)->version.chip;
uint32_t oldpll = nv_rd32(devinit, reg); uint32_t oldpll = nv_rd32(devinit, reg);
int oldN = (oldpll >> 8) & 0xff, oldM = oldpll & 0xff; int oldN = (oldpll >> 8) & 0xff, oldM = oldpll & 0xff;
uint32_t pll = (oldpll & 0xfff80000) | pv->log2P << 16 | pv->NM1; uint32_t pll = (oldpll & 0xfff80000) | pv->log2P << 16 | pv->NM1;
...@@ -190,10 +193,10 @@ new_ramdac580(uint32_t reg1, bool ss, uint32_t ramdac580) ...@@ -190,10 +193,10 @@ new_ramdac580(uint32_t reg1, bool ss, uint32_t ramdac580)
} }
void void
setPLL_double_highregs(struct nouveau_devinit *devinit, u32 reg1, setPLL_double_highregs(struct nvkm_devinit *devinit, u32 reg1,
struct nouveau_pll_vals *pv) struct nvkm_pll_vals *pv)
{ {
int chip_version = nouveau_bios(devinit)->version.chip; int chip_version = nvkm_bios(devinit)->version.chip;
bool nv3035 = chip_version == 0x30 || chip_version == 0x35; bool nv3035 = chip_version == 0x30 || chip_version == 0x35;
uint32_t reg2 = reg1 + ((reg1 == 0x680520) ? 0x5c : 0x70); uint32_t reg2 = reg1 + ((reg1 == 0x680520) ? 0x5c : 0x70);
uint32_t oldpll1 = nv_rd32(devinit, reg1); uint32_t oldpll1 = nv_rd32(devinit, reg1);
...@@ -267,8 +270,8 @@ setPLL_double_highregs(struct nouveau_devinit *devinit, u32 reg1, ...@@ -267,8 +270,8 @@ setPLL_double_highregs(struct nouveau_devinit *devinit, u32 reg1,
} }
void void
setPLL_double_lowregs(struct nouveau_devinit *devinit, u32 NMNMreg, setPLL_double_lowregs(struct nvkm_devinit *devinit, u32 NMNMreg,
struct nouveau_pll_vals *pv) struct nvkm_pll_vals *pv)
{ {
/* When setting PLLs, there is a merry game of disabling and enabling /* When setting PLLs, there is a merry game of disabling and enabling
* various bits of hardware during the process. This function is a * various bits of hardware during the process. This function is a
...@@ -301,7 +304,7 @@ setPLL_double_lowregs(struct nouveau_devinit *devinit, u32 NMNMreg, ...@@ -301,7 +304,7 @@ setPLL_double_lowregs(struct nouveau_devinit *devinit, u32 NMNMreg,
struct nvbios_pll info; struct nvbios_pll info;
uint8_t Pval2; uint8_t Pval2;
if (nvbios_pll_parse(nouveau_bios(devinit), Preg, &info)) if (nvbios_pll_parse(nvkm_bios(devinit), Preg, &info))
return; return;
Pval2 = pv->log2P + info.bias_p; Pval2 = pv->log2P + info.bias_p;
...@@ -347,10 +350,10 @@ setPLL_double_lowregs(struct nouveau_devinit *devinit, u32 NMNMreg, ...@@ -347,10 +350,10 @@ setPLL_double_lowregs(struct nouveau_devinit *devinit, u32 NMNMreg,
} }
int int
nv04_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq) nv04_devinit_pll_set(struct nvkm_devinit *devinit, u32 type, u32 freq)
{ {
struct nouveau_bios *bios = nouveau_bios(devinit); struct nvkm_bios *bios = nvkm_bios(devinit);
struct nouveau_pll_vals pv; struct nvkm_pll_vals pv;
struct nvbios_pll info; struct nvbios_pll info;
int cv = bios->version.chip; int cv = bios->version.chip;
int N1, M1, N2, M2, P; int N1, M1, N2, M2, P;
...@@ -385,7 +388,7 @@ nv04_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq) ...@@ -385,7 +388,7 @@ nv04_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq)
} }
int int
nv04_devinit_fini(struct nouveau_object *object, bool suspend) nv04_devinit_fini(struct nvkm_object *object, bool suspend)
{ {
struct nv04_devinit_priv *priv = (void *)object; struct nv04_devinit_priv *priv = (void *)object;
int ret; int ret;
...@@ -393,7 +396,7 @@ nv04_devinit_fini(struct nouveau_object *object, bool suspend) ...@@ -393,7 +396,7 @@ nv04_devinit_fini(struct nouveau_object *object, bool suspend)
/* make i2c busses accessible */ /* make i2c busses accessible */
nv_mask(priv, 0x000200, 0x00000001, 0x00000001); nv_mask(priv, 0x000200, 0x00000001, 0x00000001);
ret = nouveau_devinit_fini(&priv->base, suspend); ret = nvkm_devinit_fini(&priv->base, suspend);
if (ret) if (ret)
return ret; return ret;
...@@ -401,12 +404,11 @@ nv04_devinit_fini(struct nouveau_object *object, bool suspend) ...@@ -401,12 +404,11 @@ nv04_devinit_fini(struct nouveau_object *object, bool suspend)
if (priv->owner < 0) if (priv->owner < 0)
priv->owner = nv_rdvgaowner(priv); priv->owner = nv_rdvgaowner(priv);
nv_wrvgaowner(priv, 0); nv_wrvgaowner(priv, 0);
return 0; return 0;
} }
int int
nv04_devinit_init(struct nouveau_object *object) nv04_devinit_init(struct nvkm_object *object)
{ {
struct nv04_devinit_priv *priv = (void *)object; struct nv04_devinit_priv *priv = (void *)object;
...@@ -422,29 +424,29 @@ nv04_devinit_init(struct nouveau_object *object) ...@@ -422,29 +424,29 @@ nv04_devinit_init(struct nouveau_object *object)
} }
} }
return nouveau_devinit_init(&priv->base); return nvkm_devinit_init(&priv->base);
} }
void void
nv04_devinit_dtor(struct nouveau_object *object) nv04_devinit_dtor(struct nvkm_object *object)
{ {
struct nv04_devinit_priv *priv = (void *)object; struct nv04_devinit_priv *priv = (void *)object;
/* restore vga owner saved at first init */ /* restore vga owner saved at first init */
nv_wrvgaowner(priv, priv->owner); nv_wrvgaowner(priv, priv->owner);
nouveau_devinit_destroy(&priv->base); nvkm_devinit_destroy(&priv->base);
} }
int int
nv04_devinit_ctor(struct nouveau_object *parent, struct nouveau_object *engine, nv04_devinit_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size, struct nvkm_oclass *oclass, void *data, u32 size,
struct nouveau_object **pobject) struct nvkm_object **pobject)
{ {
struct nv04_devinit_priv *priv; struct nv04_devinit_priv *priv;
int ret; int ret;
ret = nouveau_devinit_create(parent, engine, oclass, &priv); ret = nvkm_devinit_create(parent, engine, oclass, &priv);
*pobject = nv_object(priv); *pobject = nv_object(priv);
if (ret) if (ret)
return ret; return ret;
...@@ -453,10 +455,10 @@ nv04_devinit_ctor(struct nouveau_object *parent, struct nouveau_object *engine, ...@@ -453,10 +455,10 @@ nv04_devinit_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
return 0; return 0;
} }
struct nouveau_oclass * struct nvkm_oclass *
nv04_devinit_oclass = &(struct nouveau_devinit_impl) { nv04_devinit_oclass = &(struct nvkm_devinit_impl) {
.base.handle = NV_SUBDEV(DEVINIT, 0x04), .base.handle = NV_SUBDEV(DEVINIT, 0x04),
.base.ofuncs = &(struct nouveau_ofuncs) { .base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = nv04_devinit_ctor, .ctor = nv04_devinit_ctor,
.dtor = nv04_devinit_dtor, .dtor = nv04_devinit_dtor,
.init = nv04_devinit_init, .init = nv04_devinit_init,
......
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.h
View file @ a8c4362b
#ifndef __NVKM_DEVINIT_NV04_H__ #ifndef __NVKM_DEVINIT_NV04_H__
#define __NVKM_DEVINIT_NV04_H__ #define __NVKM_DEVINIT_NV04_H__
#include "priv.h" #include "priv.h"
struct nvkm_pll_vals;
struct nv04_devinit_priv { struct nv04_devinit_priv {
struct nouveau_devinit base; struct nvkm_devinit base;
u8 owner; u8 owner;
}; };
int nv04_devinit_ctor(struct nouveau_object *, struct nouveau_object *, int nv04_devinit_ctor(struct nvkm_object *, struct nvkm_object *,
struct nouveau_oclass *, void *, u32, struct nvkm_oclass *, void *, u32,
struct nouveau_object **); struct nvkm_object **);
void nv04_devinit_dtor(struct nouveau_object *); void nv04_devinit_dtor(struct nvkm_object *);
int nv04_devinit_init(struct nouveau_object *); int nv04_devinit_init(struct nvkm_object *);
int nv04_devinit_fini(struct nouveau_object *, bool); int nv04_devinit_fini(struct nvkm_object *, bool);
int nv04_devinit_pll_set(struct nouveau_devinit *, u32, u32); int nv04_devinit_pll_set(struct nvkm_devinit *, u32, u32);
void setPLL_single(struct nouveau_devinit *, u32, struct nouveau_pll_vals *);
void setPLL_double_highregs(struct nouveau_devinit *, u32, struct nouveau_pll_vals *);
void setPLL_double_lowregs(struct nouveau_devinit *, u32, struct nouveau_pll_vals *);
void setPLL_single(struct nvkm_devinit *, u32, struct nvkm_pll_vals *);
void setPLL_double_highregs(struct nvkm_devinit *, u32, struct nvkm_pll_vals *);
void setPLL_double_lowregs(struct nvkm_devinit *, u32, struct nvkm_pll_vals *);
#endif #endif
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv05.c
View file @ a8c4362b
...@@ -23,16 +23,16 @@ ...@@ -23,16 +23,16 @@
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
*/ */
#include "nv04.h"
#include "fbmem.h"
#include <subdev/bios.h> #include <subdev/bios.h>
#include <subdev/bios/bmp.h> #include <subdev/bios/bmp.h>
#include <subdev/bios/init.h>
#include <subdev/vga.h> #include <subdev/vga.h>
#include "fbmem.h"
#include "nv04.h"
static void static void
nv05_devinit_meminit(struct nouveau_devinit *devinit) nv05_devinit_meminit(struct nvkm_devinit *devinit)
{ {
static const u8 default_config_tab[][2] = { static const u8 default_config_tab[][2] = {
{ 0x24, 0x00 }, { 0x24, 0x00 },
...@@ -45,7 +45,7 @@ nv05_devinit_meminit(struct nouveau_devinit *devinit) ...@@ -45,7 +45,7 @@ nv05_devinit_meminit(struct nouveau_devinit *devinit)
{ 0x00, 0x00 } { 0x00, 0x00 }
}; };
struct nv04_devinit_priv *priv = (void *)devinit; struct nv04_devinit_priv *priv = (void *)devinit;
struct nouveau_bios *bios = nouveau_bios(priv); struct nvkm_bios *bios = nvkm_bios(priv);
struct io_mapping *fb; struct io_mapping *fb;
u32 patt = 0xdeadbeef; u32 patt = 0xdeadbeef;
u16 data; u16 data;
...@@ -125,10 +125,10 @@ nv05_devinit_meminit(struct nouveau_devinit *devinit) ...@@ -125,10 +125,10 @@ nv05_devinit_meminit(struct nouveau_devinit *devinit)
fbmem_fini(fb); fbmem_fini(fb);
} }
struct nouveau_oclass * struct nvkm_oclass *
nv05_devinit_oclass = &(struct nouveau_devinit_impl) { nv05_devinit_oclass = &(struct nvkm_devinit_impl) {
.base.handle = NV_SUBDEV(DEVINIT, 0x05), .base.handle = NV_SUBDEV(DEVINIT, 0x05),
.base.ofuncs = &(struct nouveau_ofuncs) { .base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = nv04_devinit_ctor, .ctor = nv04_devinit_ctor,
.dtor = nv04_devinit_dtor, .dtor = nv04_devinit_dtor,
.init = nv04_devinit_init, .init = nv04_devinit_init,
......
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv10.c
View file @ a8c4362b
...@@ -23,14 +23,14 @@ ...@@ -23,14 +23,14 @@
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
*/ */
#include <subdev/vga.h>
#include "fbmem.h"
#include "nv04.h" #include "nv04.h"
#include "fbmem.h"
#include <subdev/bios.h>
#include <subdev/bios/init.h>
static void static void
nv10_devinit_meminit(struct nouveau_devinit *devinit) nv10_devinit_meminit(struct nvkm_devinit *devinit)
{ {
struct nv04_devinit_priv *priv = (void *)devinit; struct nv04_devinit_priv *priv = (void *)devinit;
static const int mem_width[] = { 0x10, 0x00, 0x20 }; static const int mem_width[] = { 0x10, 0x00, 0x20 };
...@@ -96,10 +96,10 @@ nv10_devinit_meminit(struct nouveau_devinit *devinit) ...@@ -96,10 +96,10 @@ nv10_devinit_meminit(struct nouveau_devinit *devinit)
fbmem_fini(fb); fbmem_fini(fb);
} }
struct nouveau_oclass * struct nvkm_oclass *
nv10_devinit_oclass = &(struct nouveau_devinit_impl) { nv10_devinit_oclass = &(struct nvkm_devinit_impl) {
.base.handle = NV_SUBDEV(DEVINIT, 0x10), .base.handle = NV_SUBDEV(DEVINIT, 0x10),
.base.ofuncs = &(struct nouveau_ofuncs) { .base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = nv04_devinit_ctor, .ctor = nv04_devinit_ctor,
.dtor = nv04_devinit_dtor, .dtor = nv04_devinit_dtor,
.init = nv04_devinit_init, .init = nv04_devinit_init,
......
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv1a.c
View file @ a8c4362b
...@@ -21,13 +21,15 @@ ...@@ -21,13 +21,15 @@
* *
* Authors: Ben Skeggs * Authors: Ben Skeggs
*/ */
#include "nv04.h" #include "nv04.h"
struct nouveau_oclass * #include <subdev/bios.h>
nv1a_devinit_oclass = &(struct nouveau_devinit_impl) { #include <subdev/bios/init.h>
struct nvkm_oclass *
nv1a_devinit_oclass = &(struct nvkm_devinit_impl) {
.base.handle = NV_SUBDEV(DEVINIT, 0x1a), .base.handle = NV_SUBDEV(DEVINIT, 0x1a),
.base.ofuncs = &(struct nouveau_ofuncs) { .base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = nv04_devinit_ctor, .ctor = nv04_devinit_ctor,
.dtor = nv04_devinit_dtor, .dtor = nv04_devinit_dtor,
.init = nv04_devinit_init, .init = nv04_devinit_init,
......
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv20.c
View file @ a8c4362b
...@@ -23,15 +23,17 @@ ...@@ -23,15 +23,17 @@
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* *
*/ */
#include "nv04.h" #include "nv04.h"
#include "fbmem.h" #include "fbmem.h"
#include <subdev/bios.h>
#include <subdev/bios/init.h>
static void static void
nv20_devinit_meminit(struct nouveau_devinit *devinit) nv20_devinit_meminit(struct nvkm_devinit *devinit)
{ {
struct nv04_devinit_priv *priv = (void *)devinit; struct nv04_devinit_priv *priv = (void *)devinit;
struct nouveau_device *device = nv_device(priv); struct nvkm_device *device = nv_device(priv);
uint32_t mask = (device->chipset >= 0x25 ? 0x300 : 0x900); uint32_t mask = (device->chipset >= 0x25 ? 0x300 : 0x900);
uint32_t amount, off; uint32_t amount, off;
struct io_mapping *fb; struct io_mapping *fb;
...@@ -60,10 +62,10 @@ nv20_devinit_meminit(struct nouveau_devinit *devinit) ...@@ -60,10 +62,10 @@ nv20_devinit_meminit(struct nouveau_devinit *devinit)
fbmem_fini(fb); fbmem_fini(fb);
} }
struct nouveau_oclass * struct nvkm_oclass *
nv20_devinit_oclass = &(struct nouveau_devinit_impl) { nv20_devinit_oclass = &(struct nvkm_devinit_impl) {
.base.handle = NV_SUBDEV(DEVINIT, 0x20), .base.handle = NV_SUBDEV(DEVINIT, 0x20),
.base.ofuncs = &(struct nouveau_ofuncs) { .base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = nv04_devinit_ctor, .ctor = nv04_devinit_ctor,
.dtor = nv04_devinit_dtor, .dtor = nv04_devinit_dtor,
.init = nv04_devinit_init, .init = nv04_devinit_init,
......
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c
View file @ a8c4362b
...@@ -21,21 +21,22 @@ ...@@ -21,21 +21,22 @@
* *
* Authors: Ben Skeggs * Authors: Ben Skeggs
*/ */
#include "nv50.h"
#include <subdev/bios.h> #include <subdev/bios.h>
#include <subdev/bios/dcb.h> #include <subdev/bios/dcb.h>
#include <subdev/bios/disp.h> #include <subdev/bios/disp.h>
#include <subdev/bios/init.h> #include <subdev/bios/init.h>
#include <subdev/bios/pll.h>
#include <subdev/clk/pll.h>
#include <subdev/ibus.h> #include <subdev/ibus.h>
#include <subdev/vga.h> #include <subdev/vga.h>
#include "nv50.h"
int int
nv50_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq) nv50_devinit_pll_set(struct nvkm_devinit *devinit, u32 type, u32 freq)
{ {
struct nv50_devinit_priv *priv = (void *)devinit; struct nv50_devinit_priv *priv = (void *)devinit;
struct nouveau_bios *bios = nouveau_bios(priv); struct nvkm_bios *bios = nvkm_bios(priv);
struct nvbios_pll info; struct nvbios_pll info;
int N1, M1, N2, M2, P; int N1, M1, N2, M2, P;
int ret; int ret;
...@@ -76,7 +77,7 @@ nv50_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq) ...@@ -76,7 +77,7 @@ nv50_devinit_pll_set(struct nouveau_devinit *devinit, u32 type, u32 freq)
} }
static u64 static u64
nv50_devinit_disable(struct nouveau_devinit *devinit) nv50_devinit_disable(struct nvkm_devinit *devinit)
{ {
struct nv50_devinit_priv *priv = (void *)devinit; struct nv50_devinit_priv *priv = (void *)devinit;
u32 r001540 = nv_rd32(priv, 0x001540); u32 r001540 = nv_rd32(priv, 0x001540);
...@@ -89,10 +90,10 @@ nv50_devinit_disable(struct nouveau_devinit *devinit) ...@@ -89,10 +90,10 @@ nv50_devinit_disable(struct nouveau_devinit *devinit)
} }
int int
nv50_devinit_init(struct nouveau_object *object) nv50_devinit_init(struct nvkm_object *object)
{ {
struct nouveau_bios *bios = nouveau_bios(object); struct nvkm_bios *bios = nvkm_bios(object);
struct nouveau_ibus *ibus = nouveau_ibus(object); struct nvkm_ibus *ibus = nvkm_ibus(object);
struct nv50_devinit_priv *priv = (void *)object; struct nv50_devinit_priv *priv = (void *)object;
struct nvbios_outp info; struct nvbios_outp info;
struct dcb_output outp; struct dcb_output outp;
...@@ -114,7 +115,7 @@ nv50_devinit_init(struct nouveau_object *object) ...@@ -114,7 +115,7 @@ nv50_devinit_init(struct nouveau_object *object)
if (priv->base.post && ibus) if (priv->base.post && ibus)
nv_ofuncs(ibus)->init(nv_object(ibus)); nv_ofuncs(ibus)->init(nv_object(ibus));
ret = nouveau_devinit_init(&priv->base); ret = nvkm_devinit_init(&priv->base);
if (ret) if (ret)
return ret; return ret;
...@@ -143,14 +144,14 @@ nv50_devinit_init(struct nouveau_object *object) ...@@ -143,14 +144,14 @@ nv50_devinit_init(struct nouveau_object *object)
} }
int int
nv50_devinit_ctor(struct nouveau_object *parent, struct nouveau_object *engine, nv50_devinit_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size, struct nvkm_oclass *oclass, void *data, u32 size,
struct nouveau_object **pobject) struct nvkm_object **pobject)
{ {
struct nv50_devinit_priv *priv; struct nv50_devinit_priv *priv;
int ret; int ret;
ret = nouveau_devinit_create(parent, engine, oclass, &priv); ret = nvkm_devinit_create(parent, engine, oclass, &priv);
*pobject = nv_object(priv); *pobject = nv_object(priv);
if (ret) if (ret)
return ret; return ret;
...@@ -158,14 +159,14 @@ nv50_devinit_ctor(struct nouveau_object *parent, struct nouveau_object *engine, ...@@ -158,14 +159,14 @@ nv50_devinit_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
return 0; return 0;
} }
struct nouveau_oclass * struct nvkm_oclass *
nv50_devinit_oclass = &(struct nouveau_devinit_impl) { nv50_devinit_oclass = &(struct nvkm_devinit_impl) {
.base.handle = NV_SUBDEV(DEVINIT, 0x50), .base.handle = NV_SUBDEV(DEVINIT, 0x50),
.base.ofuncs = &(struct nouveau_ofuncs) { .base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = nv50_devinit_ctor, .ctor = nv50_devinit_ctor,
.dtor = _nouveau_devinit_dtor, .dtor = _nvkm_devinit_dtor,
.init = nv50_devinit_init, .init = nv50_devinit_init,
.fini = _nouveau_devinit_fini, .fini = _nvkm_devinit_fini,
}, },
.pll_set = nv50_devinit_pll_set, .pll_set = nv50_devinit_pll_set,
.disable = nv50_devinit_disable, .disable = nv50_devinit_disable,
......
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.h
View file @ a8c4362b
#ifndef __NVKM_DEVINIT_NV50_H__ #ifndef __NVKM_DEVINIT_NV50_H__
#define __NVKM_DEVINIT_NV50_H__ #define __NVKM_DEVINIT_NV50_H__
#include "priv.h" #include "priv.h"
struct nv50_devinit_priv { struct nv50_devinit_priv {
struct nouveau_devinit base; struct nvkm_devinit base;
u32 r001540; u32 r001540;
}; };
int nv50_devinit_ctor(struct nouveau_object *, struct nouveau_object *, int nv50_devinit_ctor(struct nvkm_object *, struct nvkm_object *,
struct nouveau_oclass *, void *, u32, struct nvkm_oclass *, void *, u32,
struct nouveau_object **); struct nvkm_object **);
int nv50_devinit_init(struct nouveau_object *); int nv50_devinit_init(struct nvkm_object *);
int nv50_devinit_pll_set(struct nouveau_devinit *, u32, u32); int nv50_devinit_pll_set(struct nvkm_devinit *, u32, u32);
int nva3_devinit_pll_set(struct nouveau_devinit *, u32, u32);
int nvc0_devinit_pll_set(struct nouveau_devinit *, u32, u32); int gt215_devinit_pll_set(struct nvkm_devinit *, u32, u32);
u64 gm107_devinit_disable(struct nouveau_devinit *); int gf100_devinit_pll_set(struct nvkm_devinit *, u32, u32);
u64 gm107_devinit_disable(struct nvkm_devinit *);
#endif #endif
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/priv.h
View file @ a8c4362b
#ifndef __NVKM_DEVINIT_PRIV_H__ #ifndef __NVKM_DEVINIT_PRIV_H__
#define __NVKM_DEVINIT_PRIV_H__ #define __NVKM_DEVINIT_PRIV_H__
#include <subdev/bios.h>
#include <subdev/bios/pll.h>
#include <subdev/bios/init.h>
#include <subdev/clk/pll.h>
#include <subdev/devinit.h> #include <subdev/devinit.h>
struct nouveau_devinit_impl { struct nvkm_devinit_impl {
struct nouveau_oclass base; struct nvkm_oclass base;
void (*meminit)(struct nouveau_devinit *); void (*meminit)(struct nvkm_devinit *);
int (*pll_set)(struct nouveau_devinit *, u32 type, u32 freq); int (*pll_set)(struct nvkm_devinit *, u32 type, u32 freq);
u64 (*disable)(struct nouveau_devinit *); u64 (*disable)(struct nvkm_devinit *);
u32 (*mmio)(struct nouveau_devinit *, u32); u32 (*mmio)(struct nvkm_devinit *, u32);
int (*post)(struct nouveau_subdev *, bool); int (*post)(struct nvkm_subdev *, bool);
}; };
#define nouveau_devinit_create(p,e,o,d) \ #define nvkm_devinit_create(p,e,o,d) \
nouveau_devinit_create_((p), (e), (o), sizeof(**d), (void **)d) nvkm_devinit_create_((p), (e), (o), sizeof(**d), (void **)d)
#define nouveau_devinit_destroy(p) ({ \ #define nvkm_devinit_destroy(p) ({ \
struct nouveau_devinit *d = (p); \ struct nvkm_devinit *d = (p); \
_nouveau_devinit_dtor(nv_object(d)); \ _nvkm_devinit_dtor(nv_object(d)); \
}) })
#define nouveau_devinit_init(p) ({ \ #define nvkm_devinit_init(p) ({ \
struct nouveau_devinit *d = (p); \ struct nvkm_devinit *d = (p); \
_nouveau_devinit_init(nv_object(d)); \ _nvkm_devinit_init(nv_object(d)); \
}) })
#define nouveau_devinit_fini(p,s) ({ \ #define nvkm_devinit_fini(p,s) ({ \
struct nouveau_devinit *d = (p); \ struct nvkm_devinit *d = (p); \
_nouveau_devinit_fini(nv_object(d), (s)); \ _nvkm_devinit_fini(nv_object(d), (s)); \
}) })
int nouveau_devinit_create_(struct nouveau_object *, struct nouveau_object *, int nvkm_devinit_create_(struct nvkm_object *, struct nvkm_object *,
struct nouveau_oclass *, int, void **); struct nvkm_oclass *, int, void **);
void _nouveau_devinit_dtor(struct nouveau_object *); void _nvkm_devinit_dtor(struct nvkm_object *);
int _nouveau_devinit_init(struct nouveau_object *); int _nvkm_devinit_init(struct nvkm_object *);
int _nouveau_devinit_fini(struct nouveau_object *, bool suspend); int _nvkm_devinit_fini(struct nvkm_object *, bool suspend);
#endif #endif
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