Commit a8cbb46f authored by Golan Ben Ami's avatar Golan Ben Ami Committed by Luca Coelho

iwlwifi: allow different csr flags for different device families

Different device families may have different flag values
for passing a message to the fw (i.e. SW_RESET).
In order to keep the code readable, and avoid conditioning
upon the family, store a value for each flag, which indicates
the bit that needs to be enabled.
Signed-off-by: default avatarGolan Ben Ami <golan.ben.ami@intel.com>
Signed-off-by: default avatarLuca Coelho <luciano.coelho@intel.com>
parent 0ddcf3e7
/****************************************************************************** /******************************************************************************
* *
* Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
* Copyright(c) 2018 Intel Corporation
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as * under the terms of version 2 of the GNU General Public License as
...@@ -27,7 +28,6 @@ ...@@ -27,7 +28,6 @@
#include <linux/module.h> #include <linux/module.h>
#include <linux/stringify.h> #include <linux/stringify.h>
#include "iwl-config.h" #include "iwl-config.h"
#include "iwl-csr.h"
#include "iwl-agn-hw.h" #include "iwl-agn-hw.h"
/* Highest firmware API version supported */ /* Highest firmware API version supported */
...@@ -91,7 +91,8 @@ static const struct iwl_eeprom_params iwl1000_eeprom_params = { ...@@ -91,7 +91,8 @@ static const struct iwl_eeprom_params iwl1000_eeprom_params = {
.base_params = &iwl1000_base_params, \ .base_params = &iwl1000_base_params, \
.eeprom_params = &iwl1000_eeprom_params, \ .eeprom_params = &iwl1000_eeprom_params, \
.led_mode = IWL_LED_BLINK, \ .led_mode = IWL_LED_BLINK, \
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
.csr = &iwl_csr_v1
const struct iwl_cfg iwl1000_bgn_cfg = { const struct iwl_cfg iwl1000_bgn_cfg = {
.name = "Intel(R) Centrino(R) Wireless-N 1000 BGN", .name = "Intel(R) Centrino(R) Wireless-N 1000 BGN",
...@@ -117,7 +118,8 @@ const struct iwl_cfg iwl1000_bg_cfg = { ...@@ -117,7 +118,8 @@ const struct iwl_cfg iwl1000_bg_cfg = {
.eeprom_params = &iwl1000_eeprom_params, \ .eeprom_params = &iwl1000_eeprom_params, \
.led_mode = IWL_LED_RF_STATE, \ .led_mode = IWL_LED_RF_STATE, \
.rx_with_siso_diversity = true, \ .rx_with_siso_diversity = true, \
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
.csr = &iwl_csr_v1
const struct iwl_cfg iwl100_bgn_cfg = { const struct iwl_cfg iwl100_bgn_cfg = {
.name = "Intel(R) Centrino(R) Wireless-N 100 BGN", .name = "Intel(R) Centrino(R) Wireless-N 100 BGN",
......
/****************************************************************************** /******************************************************************************
* *
* Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
* Copyright(c) 2018 Intel Corporation
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as * under the terms of version 2 of the GNU General Public License as
...@@ -115,7 +116,8 @@ static const struct iwl_eeprom_params iwl20x0_eeprom_params = { ...@@ -115,7 +116,8 @@ static const struct iwl_eeprom_params iwl20x0_eeprom_params = {
.base_params = &iwl2000_base_params, \ .base_params = &iwl2000_base_params, \
.eeprom_params = &iwl20x0_eeprom_params, \ .eeprom_params = &iwl20x0_eeprom_params, \
.led_mode = IWL_LED_RF_STATE, \ .led_mode = IWL_LED_RF_STATE, \
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
.csr = &iwl_csr_v1
const struct iwl_cfg iwl2000_2bgn_cfg = { const struct iwl_cfg iwl2000_2bgn_cfg = {
...@@ -142,7 +144,8 @@ const struct iwl_cfg iwl2000_2bgn_d_cfg = { ...@@ -142,7 +144,8 @@ const struct iwl_cfg iwl2000_2bgn_d_cfg = {
.base_params = &iwl2030_base_params, \ .base_params = &iwl2030_base_params, \
.eeprom_params = &iwl20x0_eeprom_params, \ .eeprom_params = &iwl20x0_eeprom_params, \
.led_mode = IWL_LED_RF_STATE, \ .led_mode = IWL_LED_RF_STATE, \
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
.csr = &iwl_csr_v1
const struct iwl_cfg iwl2030_2bgn_cfg = { const struct iwl_cfg iwl2030_2bgn_cfg = {
.name = "Intel(R) Centrino(R) Wireless-N 2230 BGN", .name = "Intel(R) Centrino(R) Wireless-N 2230 BGN",
...@@ -163,7 +166,8 @@ const struct iwl_cfg iwl2030_2bgn_cfg = { ...@@ -163,7 +166,8 @@ const struct iwl_cfg iwl2030_2bgn_cfg = {
.eeprom_params = &iwl20x0_eeprom_params, \ .eeprom_params = &iwl20x0_eeprom_params, \
.led_mode = IWL_LED_RF_STATE, \ .led_mode = IWL_LED_RF_STATE, \
.rx_with_siso_diversity = true, \ .rx_with_siso_diversity = true, \
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
.csr = &iwl_csr_v1
const struct iwl_cfg iwl105_bgn_cfg = { const struct iwl_cfg iwl105_bgn_cfg = {
.name = "Intel(R) Centrino(R) Wireless-N 105 BGN", .name = "Intel(R) Centrino(R) Wireless-N 105 BGN",
...@@ -190,7 +194,8 @@ const struct iwl_cfg iwl105_bgn_d_cfg = { ...@@ -190,7 +194,8 @@ const struct iwl_cfg iwl105_bgn_d_cfg = {
.eeprom_params = &iwl20x0_eeprom_params, \ .eeprom_params = &iwl20x0_eeprom_params, \
.led_mode = IWL_LED_RF_STATE, \ .led_mode = IWL_LED_RF_STATE, \
.rx_with_siso_diversity = true, \ .rx_with_siso_diversity = true, \
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
.csr = &iwl_csr_v1
const struct iwl_cfg iwl135_bgn_cfg = { const struct iwl_cfg iwl135_bgn_cfg = {
.name = "Intel(R) Centrino(R) Wireless-N 135 BGN", .name = "Intel(R) Centrino(R) Wireless-N 135 BGN",
......
...@@ -143,6 +143,7 @@ const struct iwl_cfg iwl22000_2ac_cfg_hr = { ...@@ -143,6 +143,7 @@ const struct iwl_cfg iwl22000_2ac_cfg_hr = {
.name = "Intel(R) Dual Band Wireless AC 22000", .name = "Intel(R) Dual Band Wireless AC 22000",
.fw_name_pre = IWL_22000_HR_FW_PRE, .fw_name_pre = IWL_22000_HR_FW_PRE,
IWL_DEVICE_22000, IWL_DEVICE_22000,
.csr = &iwl_csr_v1,
.ht_params = &iwl_22000_ht_params, .ht_params = &iwl_22000_ht_params,
.nvm_ver = IWL_22000_NVM_VERSION, .nvm_ver = IWL_22000_NVM_VERSION,
.nvm_calib_ver = IWL_22000_TX_POWER_VERSION, .nvm_calib_ver = IWL_22000_TX_POWER_VERSION,
...@@ -153,6 +154,7 @@ const struct iwl_cfg iwl22000_2ac_cfg_hr_cdb = { ...@@ -153,6 +154,7 @@ const struct iwl_cfg iwl22000_2ac_cfg_hr_cdb = {
.name = "Intel(R) Dual Band Wireless AC 22000", .name = "Intel(R) Dual Band Wireless AC 22000",
.fw_name_pre = IWL_22000_HR_CDB_FW_PRE, .fw_name_pre = IWL_22000_HR_CDB_FW_PRE,
IWL_DEVICE_22000, IWL_DEVICE_22000,
.csr = &iwl_csr_v1,
.ht_params = &iwl_22000_ht_params, .ht_params = &iwl_22000_ht_params,
.nvm_ver = IWL_22000_NVM_VERSION, .nvm_ver = IWL_22000_NVM_VERSION,
.nvm_calib_ver = IWL_22000_TX_POWER_VERSION, .nvm_calib_ver = IWL_22000_TX_POWER_VERSION,
...@@ -164,6 +166,7 @@ const struct iwl_cfg iwl22000_2ac_cfg_jf = { ...@@ -164,6 +166,7 @@ const struct iwl_cfg iwl22000_2ac_cfg_jf = {
.name = "Intel(R) Dual Band Wireless AC 22000", .name = "Intel(R) Dual Band Wireless AC 22000",
.fw_name_pre = IWL_22000_JF_FW_PRE, .fw_name_pre = IWL_22000_JF_FW_PRE,
IWL_DEVICE_22000, IWL_DEVICE_22000,
.csr = &iwl_csr_v1,
.ht_params = &iwl_22000_ht_params, .ht_params = &iwl_22000_ht_params,
.nvm_ver = IWL_22000_NVM_VERSION, .nvm_ver = IWL_22000_NVM_VERSION,
.nvm_calib_ver = IWL_22000_TX_POWER_VERSION, .nvm_calib_ver = IWL_22000_TX_POWER_VERSION,
...@@ -174,6 +177,7 @@ const struct iwl_cfg iwl22000_2ax_cfg_hr = { ...@@ -174,6 +177,7 @@ const struct iwl_cfg iwl22000_2ax_cfg_hr = {
.name = "Intel(R) Dual Band Wireless AX 22000", .name = "Intel(R) Dual Band Wireless AX 22000",
.fw_name_pre = IWL_22000_HR_FW_PRE, .fw_name_pre = IWL_22000_HR_FW_PRE,
IWL_DEVICE_22000, IWL_DEVICE_22000,
.csr = &iwl_csr_v1,
.ht_params = &iwl_22000_ht_params, .ht_params = &iwl_22000_ht_params,
.nvm_ver = IWL_22000_NVM_VERSION, .nvm_ver = IWL_22000_NVM_VERSION,
.nvm_calib_ver = IWL_22000_TX_POWER_VERSION, .nvm_calib_ver = IWL_22000_TX_POWER_VERSION,
...@@ -184,6 +188,7 @@ const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_f0 = { ...@@ -184,6 +188,7 @@ const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_f0 = {
.name = "Intel(R) Dual Band Wireless AX 22000", .name = "Intel(R) Dual Band Wireless AX 22000",
.fw_name_pre = IWL_22000_HR_F0_FW_PRE, .fw_name_pre = IWL_22000_HR_F0_FW_PRE,
IWL_DEVICE_22000, IWL_DEVICE_22000,
.csr = &iwl_csr_v1,
.ht_params = &iwl_22000_ht_params, .ht_params = &iwl_22000_ht_params,
.nvm_ver = IWL_22000_NVM_VERSION, .nvm_ver = IWL_22000_NVM_VERSION,
.nvm_calib_ver = IWL_22000_TX_POWER_VERSION, .nvm_calib_ver = IWL_22000_TX_POWER_VERSION,
...@@ -194,6 +199,7 @@ const struct iwl_cfg iwl22000_2ax_cfg_qnj_jf_b0 = { ...@@ -194,6 +199,7 @@ const struct iwl_cfg iwl22000_2ax_cfg_qnj_jf_b0 = {
.name = "Intel(R) Dual Band Wireless AX 22000", .name = "Intel(R) Dual Band Wireless AX 22000",
.fw_name_pre = IWL_22000_JF_B0_FW_PRE, .fw_name_pre = IWL_22000_JF_B0_FW_PRE,
IWL_DEVICE_22000, IWL_DEVICE_22000,
.csr = &iwl_csr_v1,
.ht_params = &iwl_22000_ht_params, .ht_params = &iwl_22000_ht_params,
.nvm_ver = IWL_22000_NVM_VERSION, .nvm_ver = IWL_22000_NVM_VERSION,
.nvm_calib_ver = IWL_22000_TX_POWER_VERSION, .nvm_calib_ver = IWL_22000_TX_POWER_VERSION,
...@@ -204,6 +210,7 @@ const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_a0 = { ...@@ -204,6 +210,7 @@ const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_a0 = {
.name = "Intel(R) Dual Band Wireless AX 22000", .name = "Intel(R) Dual Band Wireless AX 22000",
.fw_name_pre = IWL_22000_HR_A0_FW_PRE, .fw_name_pre = IWL_22000_HR_A0_FW_PRE,
IWL_DEVICE_22000, IWL_DEVICE_22000,
.csr = &iwl_csr_v1,
.ht_params = &iwl_22000_ht_params, .ht_params = &iwl_22000_ht_params,
.nvm_ver = IWL_22000_NVM_VERSION, .nvm_ver = IWL_22000_NVM_VERSION,
.nvm_calib_ver = IWL_22000_TX_POWER_VERSION, .nvm_calib_ver = IWL_22000_TX_POWER_VERSION,
......
/****************************************************************************** /******************************************************************************
* *
* Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
* Copyright(c) 2018 Intel Corporation
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as * under the terms of version 2 of the GNU General Public License as
...@@ -28,7 +29,6 @@ ...@@ -28,7 +29,6 @@
#include <linux/stringify.h> #include <linux/stringify.h>
#include "iwl-config.h" #include "iwl-config.h"
#include "iwl-agn-hw.h" #include "iwl-agn-hw.h"
#include "iwl-csr.h"
/* Highest firmware API version supported */ /* Highest firmware API version supported */
#define IWL5000_UCODE_API_MAX 5 #define IWL5000_UCODE_API_MAX 5
...@@ -89,7 +89,8 @@ static const struct iwl_eeprom_params iwl5000_eeprom_params = { ...@@ -89,7 +89,8 @@ static const struct iwl_eeprom_params iwl5000_eeprom_params = {
.base_params = &iwl5000_base_params, \ .base_params = &iwl5000_base_params, \
.eeprom_params = &iwl5000_eeprom_params, \ .eeprom_params = &iwl5000_eeprom_params, \
.led_mode = IWL_LED_BLINK, \ .led_mode = IWL_LED_BLINK, \
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
.csr = &iwl_csr_v1
const struct iwl_cfg iwl5300_agn_cfg = { const struct iwl_cfg iwl5300_agn_cfg = {
.name = "Intel(R) Ultimate N WiFi Link 5300 AGN", .name = "Intel(R) Ultimate N WiFi Link 5300 AGN",
...@@ -153,7 +154,8 @@ const struct iwl_cfg iwl5350_agn_cfg = { ...@@ -153,7 +154,8 @@ const struct iwl_cfg iwl5350_agn_cfg = {
.eeprom_params = &iwl5000_eeprom_params, \ .eeprom_params = &iwl5000_eeprom_params, \
.led_mode = IWL_LED_BLINK, \ .led_mode = IWL_LED_BLINK, \
.internal_wimax_coex = true, \ .internal_wimax_coex = true, \
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
.csr = &iwl_csr_v1
const struct iwl_cfg iwl5150_agn_cfg = { const struct iwl_cfg iwl5150_agn_cfg = {
.name = "Intel(R) WiMAX/WiFi Link 5150 AGN", .name = "Intel(R) WiMAX/WiFi Link 5150 AGN",
......
/****************************************************************************** /******************************************************************************
* *
* Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
* Copyright(c) 2018 Intel Corporation
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as * under the terms of version 2 of the GNU General Public License as
...@@ -135,7 +136,8 @@ static const struct iwl_eeprom_params iwl6000_eeprom_params = { ...@@ -135,7 +136,8 @@ static const struct iwl_eeprom_params iwl6000_eeprom_params = {
.base_params = &iwl6000_g2_base_params, \ .base_params = &iwl6000_g2_base_params, \
.eeprom_params = &iwl6000_eeprom_params, \ .eeprom_params = &iwl6000_eeprom_params, \
.led_mode = IWL_LED_RF_STATE, \ .led_mode = IWL_LED_RF_STATE, \
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
.csr = &iwl_csr_v1
const struct iwl_cfg iwl6005_2agn_cfg = { const struct iwl_cfg iwl6005_2agn_cfg = {
.name = "Intel(R) Centrino(R) Advanced-N 6205 AGN", .name = "Intel(R) Centrino(R) Advanced-N 6205 AGN",
...@@ -189,7 +191,8 @@ const struct iwl_cfg iwl6005_2agn_mow2_cfg = { ...@@ -189,7 +191,8 @@ const struct iwl_cfg iwl6005_2agn_mow2_cfg = {
.base_params = &iwl6000_g2_base_params, \ .base_params = &iwl6000_g2_base_params, \
.eeprom_params = &iwl6000_eeprom_params, \ .eeprom_params = &iwl6000_eeprom_params, \
.led_mode = IWL_LED_RF_STATE, \ .led_mode = IWL_LED_RF_STATE, \
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
.csr = &iwl_csr_v1
const struct iwl_cfg iwl6030_2agn_cfg = { const struct iwl_cfg iwl6030_2agn_cfg = {
.name = "Intel(R) Centrino(R) Advanced-N 6230 AGN", .name = "Intel(R) Centrino(R) Advanced-N 6230 AGN",
...@@ -225,7 +228,8 @@ const struct iwl_cfg iwl6030_2bg_cfg = { ...@@ -225,7 +228,8 @@ const struct iwl_cfg iwl6030_2bg_cfg = {
.base_params = &iwl6000_g2_base_params, \ .base_params = &iwl6000_g2_base_params, \
.eeprom_params = &iwl6000_eeprom_params, \ .eeprom_params = &iwl6000_eeprom_params, \
.led_mode = IWL_LED_RF_STATE, \ .led_mode = IWL_LED_RF_STATE, \
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
.csr = &iwl_csr_v1
const struct iwl_cfg iwl6035_2agn_cfg = { const struct iwl_cfg iwl6035_2agn_cfg = {
.name = "Intel(R) Centrino(R) Advanced-N 6235 AGN", .name = "Intel(R) Centrino(R) Advanced-N 6235 AGN",
...@@ -280,7 +284,8 @@ const struct iwl_cfg iwl130_bg_cfg = { ...@@ -280,7 +284,8 @@ const struct iwl_cfg iwl130_bg_cfg = {
.base_params = &iwl6000_base_params, \ .base_params = &iwl6000_base_params, \
.eeprom_params = &iwl6000_eeprom_params, \ .eeprom_params = &iwl6000_eeprom_params, \
.led_mode = IWL_LED_BLINK, \ .led_mode = IWL_LED_BLINK, \
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
.csr = &iwl_csr_v1
const struct iwl_cfg iwl6000i_2agn_cfg = { const struct iwl_cfg iwl6000i_2agn_cfg = {
.name = "Intel(R) Centrino(R) Advanced-N 6200 AGN", .name = "Intel(R) Centrino(R) Advanced-N 6200 AGN",
...@@ -313,7 +318,8 @@ const struct iwl_cfg iwl6000i_2bg_cfg = { ...@@ -313,7 +318,8 @@ const struct iwl_cfg iwl6000i_2bg_cfg = {
.eeprom_params = &iwl6000_eeprom_params, \ .eeprom_params = &iwl6000_eeprom_params, \
.led_mode = IWL_LED_BLINK, \ .led_mode = IWL_LED_BLINK, \
.internal_wimax_coex = true, \ .internal_wimax_coex = true, \
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
.csr = &iwl_csr_v1
const struct iwl_cfg iwl6050_2agn_cfg = { const struct iwl_cfg iwl6050_2agn_cfg = {
.name = "Intel(R) Centrino(R) Advanced-N + WiMAX 6250 AGN", .name = "Intel(R) Centrino(R) Advanced-N + WiMAX 6250 AGN",
...@@ -339,7 +345,8 @@ const struct iwl_cfg iwl6050_2abg_cfg = { ...@@ -339,7 +345,8 @@ const struct iwl_cfg iwl6050_2abg_cfg = {
.eeprom_params = &iwl6000_eeprom_params, \ .eeprom_params = &iwl6000_eeprom_params, \
.led_mode = IWL_LED_BLINK, \ .led_mode = IWL_LED_BLINK, \
.internal_wimax_coex = true, \ .internal_wimax_coex = true, \
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
.csr = &iwl_csr_v1
const struct iwl_cfg iwl6150_bgn_cfg = { const struct iwl_cfg iwl6150_bgn_cfg = {
.name = "Intel(R) Centrino(R) Wireless-N + WiMAX 6150 BGN", .name = "Intel(R) Centrino(R) Wireless-N + WiMAX 6150 BGN",
......
...@@ -8,6 +8,7 @@ ...@@ -8,6 +8,7 @@
* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
* Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
* Copyright(c) 2015 Intel Deutschland GmbH * Copyright(c) 2015 Intel Deutschland GmbH
* Copyright(c) 2018 Intel Corporation
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as * it under the terms of version 2 of the GNU General Public License as
...@@ -35,6 +36,7 @@ ...@@ -35,6 +36,7 @@
* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
* Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
* Copyright(c) 2015 Intel Deutschland GmbH * Copyright(c) 2015 Intel Deutschland GmbH
* Copyright(c) 2018 Intel Corporation
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
...@@ -167,7 +169,8 @@ static const struct iwl_ht_params iwl7000_ht_params = { ...@@ -167,7 +169,8 @@ static const struct iwl_ht_params iwl7000_ht_params = {
.nvm_hw_section_num = NVM_HW_SECTION_NUM_FAMILY_7000, \ .nvm_hw_section_num = NVM_HW_SECTION_NUM_FAMILY_7000, \
.non_shared_ant = ANT_A, \ .non_shared_ant = ANT_A, \
.max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \ .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K, \
.dccm_offset = IWL7000_DCCM_OFFSET .dccm_offset = IWL7000_DCCM_OFFSET, \
.csr = &iwl_csr_v1
#define IWL_DEVICE_7000 \ #define IWL_DEVICE_7000 \
IWL_DEVICE_7000_COMMON, \ IWL_DEVICE_7000_COMMON, \
......
...@@ -8,6 +8,7 @@ ...@@ -8,6 +8,7 @@
* Copyright(c) 2014 Intel Corporation. All rights reserved. * Copyright(c) 2014 Intel Corporation. All rights reserved.
* Copyright(c) 2014 - 2015 Intel Mobile Communications GmbH * Copyright(c) 2014 - 2015 Intel Mobile Communications GmbH
* Copyright(c) 2016 Intel Deutschland GmbH * Copyright(c) 2016 Intel Deutschland GmbH
* Copyright(c) 2018 Intel Corporation
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as * it under the terms of version 2 of the GNU General Public License as
...@@ -34,6 +35,7 @@ ...@@ -34,6 +35,7 @@
* *
* Copyright(c) 2014 Intel Corporation. All rights reserved. * Copyright(c) 2014 Intel Corporation. All rights reserved.
* Copyright(c) 2014 - 2015 Intel Mobile Communications GmbH * Copyright(c) 2014 - 2015 Intel Mobile Communications GmbH
* Copyright(c) 2018 Intel Corporation
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
...@@ -158,7 +160,8 @@ static const struct iwl_tt_params iwl8000_tt_params = { ...@@ -158,7 +160,8 @@ static const struct iwl_tt_params iwl8000_tt_params = {
.apmg_not_supported = true, \ .apmg_not_supported = true, \
.nvm_type = IWL_NVM_EXT, \ .nvm_type = IWL_NVM_EXT, \
.dbgc_supported = true, \ .dbgc_supported = true, \
.min_umac_error_event_table = 0x800000 .min_umac_error_event_table = 0x800000, \
.csr = &iwl_csr_v1
#define IWL_DEVICE_8000 \ #define IWL_DEVICE_8000 \
IWL_DEVICE_8000_COMMON, \ IWL_DEVICE_8000_COMMON, \
......
...@@ -156,7 +156,8 @@ static const struct iwl_tt_params iwl9000_tt_params = { ...@@ -156,7 +156,8 @@ static const struct iwl_tt_params iwl9000_tt_params = {
.rf_id = true, \ .rf_id = true, \
.nvm_type = IWL_NVM_EXT, \ .nvm_type = IWL_NVM_EXT, \
.dbgc_supported = true, \ .dbgc_supported = true, \
.min_umac_error_event_table = 0x800000 .min_umac_error_event_table = 0x800000, \
.csr = &iwl_csr_v1
const struct iwl_cfg iwl9160_2ac_cfg = { const struct iwl_cfg iwl9160_2ac_cfg = {
.name = "Intel(R) Dual Band Wireless AC 9160", .name = "Intel(R) Dual Band Wireless AC 9160",
......
...@@ -7,6 +7,7 @@ ...@@ -7,6 +7,7 @@
* *
* Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
* Copyright (C) 2016 - 2017 Intel Deutschland GmbH * Copyright (C) 2016 - 2017 Intel Deutschland GmbH
* Copyright(c) 2018 Intel Corporation
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as * it under the terms of version 2 of the GNU General Public License as
...@@ -33,6 +34,7 @@ ...@@ -33,6 +34,7 @@
* *
* Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
* Copyright (C) 2016 - 2017 Intel Deutschland GmbH * Copyright (C) 2016 - 2017 Intel Deutschland GmbH
* Copyright(c) 2018 Intel Corporation
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
...@@ -69,6 +71,7 @@ ...@@ -69,6 +71,7 @@
#include <linux/netdevice.h> #include <linux/netdevice.h>
#include <linux/ieee80211.h> #include <linux/ieee80211.h>
#include <linux/nl80211.h> #include <linux/nl80211.h>
#include "iwl-csr.h"
enum iwl_device_family { enum iwl_device_family {
IWL_DEVICE_FAMILY_UNDEFINED, IWL_DEVICE_FAMILY_UNDEFINED,
...@@ -284,6 +287,44 @@ struct iwl_pwr_tx_backoff { ...@@ -284,6 +287,44 @@ struct iwl_pwr_tx_backoff {
u32 backoff; u32 backoff;
}; };
/**
* struct iwl_csr_params
*
* @flag_sw_reset: reset the device
* @flag_mac_clock_ready:
* Indicates MAC (ucode processor, etc.) is powered up and can run.
* Internal resources are accessible.
* NOTE: This does not indicate that the processor is actually running.
* NOTE: This does not indicate that device has completed
* init or post-power-down restore of internal SRAM memory.
* Use CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP as indication that
* SRAM is restored and uCode is in normal operation mode.
* This note is relevant only for pre 5xxx devices.
* NOTE: After device reset, this bit remains "0" until host sets
* INIT_DONE
* @flag_init_done: Host sets this to put device into fully operational
* D0 power mode. Host resets this after SW_RESET to put device into
* low power mode.
* @flag_mac_access_req: Host sets this to request and maintain MAC wakeup,
* to allow host access to device-internal resources. Host must wait for
* mac_clock_ready (and !GOING_TO_SLEEP) before accessing non-CSR device
* registers.
* @flag_val_mac_access_en: mac access is enabled
* @flag_master_dis: disable master
* @flag_stop_master: stop master
* @addr_sw_reset: address for resetting the device
*/
struct iwl_csr_params {
u8 flag_sw_reset;
u8 flag_mac_clock_ready;
u8 flag_init_done;
u8 flag_mac_access_req;
u8 flag_val_mac_access_en;
u8 flag_master_dis;
u8 flag_stop_master;
u8 addr_sw_reset;
};
/** /**
* struct iwl_cfg * struct iwl_cfg
* @name: Official name of the device * @name: Official name of the device
...@@ -316,6 +357,7 @@ struct iwl_pwr_tx_backoff { ...@@ -316,6 +357,7 @@ struct iwl_pwr_tx_backoff {
* @mac_addr_from_csr: read HW address from CSR registers * @mac_addr_from_csr: read HW address from CSR registers
* @features: hw features, any combination of feature_whitelist * @features: hw features, any combination of feature_whitelist
* @pwr_tx_backoffs: translation table between power limits and backoffs * @pwr_tx_backoffs: translation table between power limits and backoffs
* @csr: csr flags and addresses that are different across devices
* @max_rx_agg_size: max RX aggregation size of the ADDBA request/response * @max_rx_agg_size: max RX aggregation size of the ADDBA request/response
* @max_tx_agg_size: max TX aggregation size of the ADDBA request/response * @max_tx_agg_size: max TX aggregation size of the ADDBA request/response
* @max_ht_ampdu_factor: the exponent of the max length of A-MPDU that the * @max_ht_ampdu_factor: the exponent of the max length of A-MPDU that the
...@@ -354,6 +396,7 @@ struct iwl_cfg { ...@@ -354,6 +396,7 @@ struct iwl_cfg {
const struct iwl_pwr_tx_backoff *pwr_tx_backoffs; const struct iwl_pwr_tx_backoff *pwr_tx_backoffs;
const char *default_nvm_file_C_step; const char *default_nvm_file_C_step;
const struct iwl_tt_params *thermal_params; const struct iwl_tt_params *thermal_params;
const struct iwl_csr_params *csr;
enum iwl_device_family device_family; enum iwl_device_family device_family;
enum iwl_led_mode led_mode; enum iwl_led_mode led_mode;
enum iwl_nvm_type nvm_type; enum iwl_nvm_type nvm_type;
...@@ -400,6 +443,28 @@ struct iwl_cfg { ...@@ -400,6 +443,28 @@ struct iwl_cfg {
u32 extra_phy_cfg_flags; u32 extra_phy_cfg_flags;
}; };
static const struct iwl_csr_params iwl_csr_v1 = {
.flag_mac_clock_ready = 0,
.flag_val_mac_access_en = 0,
.flag_init_done = 2,
.flag_mac_access_req = 3,
.flag_sw_reset = 7,
.flag_master_dis = 8,
.flag_stop_master = 9,
.addr_sw_reset = (CSR_BASE + 0x020)
};
static const struct iwl_csr_params iwl_csr_v2 = {
.flag_init_done = 6,
.flag_mac_clock_ready = 20,
.flag_val_mac_access_en = 20,
.flag_mac_access_req = 21,
.flag_master_dis = 28,
.flag_stop_master = 29,
.flag_sw_reset = 31,
.addr_sw_reset = (CSR_BASE + 0x024)
};
/* /*
* This list declares the config structures for all devices. * This list declares the config structures for all devices.
*/ */
......
...@@ -8,6 +8,7 @@ ...@@ -8,6 +8,7 @@
* Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
* Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
* Copyright(c) 2016 Intel Deutschland GmbH * Copyright(c) 2016 Intel Deutschland GmbH
* Copyright(c) 2018 Intel Corporation
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as * it under the terms of version 2 of the GNU General Public License as
...@@ -34,6 +35,7 @@ ...@@ -34,6 +35,7 @@
* *
* Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
* Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
* Copyright(c) 2018 Intel Corporation
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
...@@ -257,7 +259,6 @@ ...@@ -257,7 +259,6 @@
/* RESET */ /* RESET */
#define CSR_RESET_REG_FLAG_NEVO_RESET (0x00000001) #define CSR_RESET_REG_FLAG_NEVO_RESET (0x00000001)
#define CSR_RESET_REG_FLAG_FORCE_NMI (0x00000002) #define CSR_RESET_REG_FLAG_FORCE_NMI (0x00000002)
#define CSR_RESET_REG_FLAG_SW_RESET (0x00000080)
#define CSR_RESET_REG_FLAG_MASTER_DISABLED (0x00000100) #define CSR_RESET_REG_FLAG_MASTER_DISABLED (0x00000100)
#define CSR_RESET_REG_FLAG_STOP_MASTER (0x00000200) #define CSR_RESET_REG_FLAG_STOP_MASTER (0x00000200)
#define CSR_RESET_LINK_PWR_MGMT_DISABLED (0x80000000) #define CSR_RESET_LINK_PWR_MGMT_DISABLED (0x80000000)
...@@ -280,35 +281,10 @@ ...@@ -280,35 +281,10 @@
* 4: GOING_TO_SLEEP * 4: GOING_TO_SLEEP
* Indicates MAC is entering a power-saving sleep power-down. * Indicates MAC is entering a power-saving sleep power-down.
* Not a good time to access device-internal resources. * Not a good time to access device-internal resources.
* 3: MAC_ACCESS_REQ
* Host sets this to request and maintain MAC wakeup, to allow host
* access to device-internal resources. Host must wait for
* MAC_CLOCK_READY (and !GOING_TO_SLEEP) before accessing non-CSR
* device registers.
* 2: INIT_DONE
* Host sets this to put device into fully operational D0 power mode.
* Host resets this after SW_RESET to put device into low power mode.
* 0: MAC_CLOCK_READY
* Indicates MAC (ucode processor, etc.) is powered up and can run.
* Internal resources are accessible.
* NOTE: This does not indicate that the processor is actually running.
* NOTE: This does not indicate that device has completed
* init or post-power-down restore of internal SRAM memory.
* Use CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP as indication that
* SRAM is restored and uCode is in normal operation mode.
* Later devices (5xxx/6xxx/1xxx) use non-volatile SRAM, and
* do not need to save/restore it.
* NOTE: After device reset, this bit remains "0" until host sets
* INIT_DONE
*/ */
#define CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY (0x00000001)
#define CSR_GP_CNTRL_REG_FLAG_INIT_DONE (0x00000004)
#define CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ (0x00000008)
#define CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP (0x00000010) #define CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP (0x00000010)
#define CSR_GP_CNTRL_REG_FLAG_XTAL_ON (0x00000400) #define CSR_GP_CNTRL_REG_FLAG_XTAL_ON (0x00000400)
#define CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN (0x00000001)
#define CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE (0x07000000) #define CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE (0x07000000)
#define CSR_GP_CNTRL_REG_FLAG_RFKILL_WAKE_L1A_EN (0x04000000) #define CSR_GP_CNTRL_REG_FLAG_RFKILL_WAKE_L1A_EN (0x04000000)
#define CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW (0x08000000) #define CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW (0x08000000)
......
...@@ -6,6 +6,7 @@ ...@@ -6,6 +6,7 @@
* GPL LICENSE SUMMARY * GPL LICENSE SUMMARY
* *
* Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
* Copyright(c) 2018 Intel Corporation
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as * it under the terms of version 2 of the GNU General Public License as
...@@ -31,6 +32,7 @@ ...@@ -31,6 +32,7 @@
* BSD LICENSE * BSD LICENSE
* *
* Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
* Copyright(c) 2018 Intel Corporation
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
...@@ -199,12 +201,12 @@ static int iwl_init_otp_access(struct iwl_trans *trans) ...@@ -199,12 +201,12 @@ static int iwl_init_otp_access(struct iwl_trans *trans)
/* Enable 40MHz radio clock */ /* Enable 40MHz radio clock */
iwl_write32(trans, CSR_GP_CNTRL, iwl_write32(trans, CSR_GP_CNTRL,
iwl_read32(trans, CSR_GP_CNTRL) | iwl_read32(trans, CSR_GP_CNTRL) |
CSR_GP_CNTRL_REG_FLAG_INIT_DONE); BIT(trans->cfg->csr->flag_init_done));
/* wait for clock to be ready */ /* wait for clock to be ready */
ret = iwl_poll_bit(trans, CSR_GP_CNTRL, ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, BIT(trans->cfg->csr->flag_mac_clock_ready),
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, BIT(trans->cfg->csr->flag_mac_clock_ready),
25000); 25000);
if (ret < 0) { if (ret < 0) {
IWL_ERR(trans, "Time out access OTP\n"); IWL_ERR(trans, "Time out access OTP\n");
......
...@@ -8,6 +8,7 @@ ...@@ -8,6 +8,7 @@
* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
* Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
* Copyright (C) 2015 - 2017 Intel Deutschland GmbH * Copyright (C) 2015 - 2017 Intel Deutschland GmbH
* Copyright(c) 2018 Intel Corporation
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as * it under the terms of version 2 of the GNU General Public License as
...@@ -35,6 +36,7 @@ ...@@ -35,6 +36,7 @@
* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
* Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
* Copyright (C) 2015 - 2017 Intel Deutschland GmbH * Copyright (C) 2015 - 2017 Intel Deutschland GmbH
* Copyright(c) 2018 Intel Corporation
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
...@@ -520,15 +522,15 @@ static void iwl_mvm_dump_lmac_error_log(struct iwl_mvm *mvm, u32 base) ...@@ -520,15 +522,15 @@ static void iwl_mvm_dump_lmac_error_log(struct iwl_mvm *mvm, u32 base)
/* set INIT_DONE flag */ /* set INIT_DONE flag */
iwl_set_bit(trans, CSR_GP_CNTRL, iwl_set_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_INIT_DONE); BIT(trans->cfg->csr->flag_init_done));
/* and wait for clock stabilization */ /* and wait for clock stabilization */
if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000) if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
udelay(2); udelay(2);
err = iwl_poll_bit(trans, CSR_GP_CNTRL, err = iwl_poll_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, BIT(trans->cfg->csr->flag_mac_clock_ready),
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, BIT(trans->cfg->csr->flag_mac_clock_ready),
25000); 25000);
if (err < 0) { if (err < 0) {
IWL_DEBUG_INFO(trans, IWL_DEBUG_INFO(trans,
......
...@@ -3,6 +3,7 @@ ...@@ -3,6 +3,7 @@
* Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved.
* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
* Copyright(c) 2016 - 2017 Intel Deutschland GmbH * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
* Copyright(c) 2018 Intel Corporation
* *
* Portions of this file are derived from the ipw3945 project, as well * Portions of this file are derived from the ipw3945 project, as well
* as portions of the ieee80211 subsystem header files. * as portions of the ieee80211 subsystem header files.
...@@ -201,7 +202,7 @@ static void iwl_pcie_rxq_inc_wr_ptr(struct iwl_trans *trans, ...@@ -201,7 +202,7 @@ static void iwl_pcie_rxq_inc_wr_ptr(struct iwl_trans *trans,
IWL_DEBUG_INFO(trans, "Rx queue requesting wakeup, GP1 = 0x%x\n", IWL_DEBUG_INFO(trans, "Rx queue requesting wakeup, GP1 = 0x%x\n",
reg); reg);
iwl_set_bit(trans, CSR_GP_CNTRL, iwl_set_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); BIT(trans->cfg->csr->flag_mac_access_req));
rxq->need_update = true; rxq->need_update = true;
return; return;
} }
......
...@@ -6,6 +6,7 @@ ...@@ -6,6 +6,7 @@
* GPL LICENSE SUMMARY * GPL LICENSE SUMMARY
* *
* Copyright(c) 2017 Intel Deutschland GmbH * Copyright(c) 2017 Intel Deutschland GmbH
* Copyright(c) 2018 Intel Corporation
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as * it under the terms of version 2 of the GNU General Public License as
...@@ -19,6 +20,7 @@ ...@@ -19,6 +20,7 @@
* BSD LICENSE * BSD LICENSE
* *
* Copyright(c) 2017 Intel Deutschland GmbH * Copyright(c) 2017 Intel Deutschland GmbH
* Copyright(c) 2018 Intel Corporation
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
...@@ -92,7 +94,8 @@ static int iwl_pcie_gen2_apm_init(struct iwl_trans *trans) ...@@ -92,7 +94,8 @@ static int iwl_pcie_gen2_apm_init(struct iwl_trans *trans)
* Set "initialization complete" bit to move adapter from * Set "initialization complete" bit to move adapter from
* D0U* --> D0A* (powered-up active) state. * D0U* --> D0A* (powered-up active) state.
*/ */
iwl_set_bit(trans, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); iwl_set_bit(trans, CSR_GP_CNTRL,
BIT(trans->cfg->csr->flag_init_done));
/* /*
* Wait for clock stabilization; once stabilized, access to * Wait for clock stabilization; once stabilized, access to
...@@ -100,8 +103,9 @@ static int iwl_pcie_gen2_apm_init(struct iwl_trans *trans) ...@@ -100,8 +103,9 @@ static int iwl_pcie_gen2_apm_init(struct iwl_trans *trans)
* and accesses to uCode SRAM. * and accesses to uCode SRAM.
*/ */
ret = iwl_poll_bit(trans, CSR_GP_CNTRL, ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, BIT(trans->cfg->csr->flag_mac_clock_ready),
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000); BIT(trans->cfg->csr->flag_mac_clock_ready),
25000);
if (ret < 0) { if (ret < 0) {
IWL_DEBUG_INFO(trans, "Failed to init the card\n"); IWL_DEBUG_INFO(trans, "Failed to init the card\n");
return ret; return ret;
...@@ -143,7 +147,8 @@ static void iwl_pcie_gen2_apm_stop(struct iwl_trans *trans, bool op_mode_leave) ...@@ -143,7 +147,8 @@ static void iwl_pcie_gen2_apm_stop(struct iwl_trans *trans, bool op_mode_leave)
* Clear "initialization complete" bit to move adapter from * Clear "initialization complete" bit to move adapter from
* D0A* (powered-up Active) --> D0U* (Uninitialized) state. * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
*/ */
iwl_clear_bit(trans, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); iwl_clear_bit(trans, CSR_GP_CNTRL,
BIT(trans->cfg->csr->flag_init_done));
} }
void _iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans, bool low_power) void _iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans, bool low_power)
...@@ -187,7 +192,7 @@ void _iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans, bool low_power) ...@@ -187,7 +192,7 @@ void _iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans, bool low_power)
/* Make sure (redundant) we've released our request to stay awake */ /* Make sure (redundant) we've released our request to stay awake */
iwl_clear_bit(trans, CSR_GP_CNTRL, iwl_clear_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); BIT(trans->cfg->csr->flag_mac_access_req));
/* Stop the device, and put it in low power state */ /* Stop the device, and put it in low power state */
iwl_pcie_gen2_apm_stop(trans, false); iwl_pcie_gen2_apm_stop(trans, false);
......
...@@ -8,6 +8,7 @@ ...@@ -8,6 +8,7 @@
* Copyright(c) 2007 - 2015 Intel Corporation. All rights reserved. * Copyright(c) 2007 - 2015 Intel Corporation. All rights reserved.
* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
* Copyright(c) 2016 - 2017 Intel Deutschland GmbH * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
* Copyright(c) 2018 Intel Corporation
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as * it under the terms of version 2 of the GNU General Public License as
...@@ -35,6 +36,7 @@ ...@@ -35,6 +36,7 @@
* Copyright(c) 2005 - 2015 Intel Corporation. All rights reserved. * Copyright(c) 2005 - 2015 Intel Corporation. All rights reserved.
* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
* Copyright(c) 2016 - 2017 Intel Deutschland GmbH * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
* Copyright(c) 2018 Intel Corporation
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
...@@ -179,7 +181,8 @@ static void iwl_trans_pcie_dump_regs(struct iwl_trans *trans) ...@@ -179,7 +181,8 @@ static void iwl_trans_pcie_dump_regs(struct iwl_trans *trans)
static void iwl_trans_pcie_sw_reset(struct iwl_trans *trans) static void iwl_trans_pcie_sw_reset(struct iwl_trans *trans)
{ {
/* Reset entire device - do controller reset (results in SHRD_HW_RST) */ /* Reset entire device - do controller reset (results in SHRD_HW_RST) */
iwl_set_bit(trans, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); iwl_set_bit(trans, trans->cfg->csr->addr_sw_reset,
BIT(trans->cfg->csr->flag_sw_reset));
usleep_range(5000, 6000); usleep_range(5000, 6000);
} }
...@@ -372,7 +375,8 @@ static int iwl_pcie_apm_init(struct iwl_trans *trans) ...@@ -372,7 +375,8 @@ static int iwl_pcie_apm_init(struct iwl_trans *trans)
* Set "initialization complete" bit to move adapter from * Set "initialization complete" bit to move adapter from
* D0U* --> D0A* (powered-up active) state. * D0U* --> D0A* (powered-up active) state.
*/ */
iwl_set_bit(trans, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); iwl_set_bit(trans, CSR_GP_CNTRL,
BIT(trans->cfg->csr->flag_init_done));
/* /*
* Wait for clock stabilization; once stabilized, access to * Wait for clock stabilization; once stabilized, access to
...@@ -380,8 +384,9 @@ static int iwl_pcie_apm_init(struct iwl_trans *trans) ...@@ -380,8 +384,9 @@ static int iwl_pcie_apm_init(struct iwl_trans *trans)
* and accesses to uCode SRAM. * and accesses to uCode SRAM.
*/ */
ret = iwl_poll_bit(trans, CSR_GP_CNTRL, ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, BIT(trans->cfg->csr->flag_mac_clock_ready),
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000); BIT(trans->cfg->csr->flag_mac_clock_ready),
25000);
if (ret < 0) { if (ret < 0) {
IWL_ERR(trans, "Failed to init the card\n"); IWL_ERR(trans, "Failed to init the card\n");
return ret; return ret;
...@@ -459,15 +464,16 @@ static void iwl_pcie_apm_lp_xtal_enable(struct iwl_trans *trans) ...@@ -459,15 +464,16 @@ static void iwl_pcie_apm_lp_xtal_enable(struct iwl_trans *trans)
* Set "initialization complete" bit to move adapter from * Set "initialization complete" bit to move adapter from
* D0U* --> D0A* (powered-up active) state. * D0U* --> D0A* (powered-up active) state.
*/ */
iwl_set_bit(trans, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); iwl_set_bit(trans, CSR_GP_CNTRL,
BIT(trans->cfg->csr->flag_init_done));
/* /*
* Wait for clock stabilization; once stabilized, access to * Wait for clock stabilization; once stabilized, access to
* device-internal resources is possible. * device-internal resources is possible.
*/ */
ret = iwl_poll_bit(trans, CSR_GP_CNTRL, ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, BIT(trans->cfg->csr->flag_mac_clock_ready),
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, BIT(trans->cfg->csr->flag_mac_clock_ready),
25000); 25000);
if (WARN_ON(ret < 0)) { if (WARN_ON(ret < 0)) {
IWL_ERR(trans, "Access time out - failed to enable LP XTAL\n"); IWL_ERR(trans, "Access time out - failed to enable LP XTAL\n");
...@@ -519,7 +525,7 @@ static void iwl_pcie_apm_lp_xtal_enable(struct iwl_trans *trans) ...@@ -519,7 +525,7 @@ static void iwl_pcie_apm_lp_xtal_enable(struct iwl_trans *trans)
* D0A* (powered-up Active) --> D0U* (Uninitialized) state. * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
*/ */
iwl_clear_bit(trans, CSR_GP_CNTRL, iwl_clear_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_INIT_DONE); BIT(trans->cfg->csr->flag_init_done));
/* Activates XTAL resources monitor */ /* Activates XTAL resources monitor */
__iwl_trans_pcie_set_bit(trans, CSR_MONITOR_CFG_REG, __iwl_trans_pcie_set_bit(trans, CSR_MONITOR_CFG_REG,
...@@ -541,11 +547,12 @@ void iwl_pcie_apm_stop_master(struct iwl_trans *trans) ...@@ -541,11 +547,12 @@ void iwl_pcie_apm_stop_master(struct iwl_trans *trans)
int ret; int ret;
/* stop device's busmaster DMA activity */ /* stop device's busmaster DMA activity */
iwl_set_bit(trans, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER); iwl_set_bit(trans, trans->cfg->csr->addr_sw_reset,
BIT(trans->cfg->csr->flag_stop_master));
ret = iwl_poll_bit(trans, CSR_RESET, ret = iwl_poll_bit(trans, trans->cfg->csr->addr_sw_reset,
CSR_RESET_REG_FLAG_MASTER_DISABLED, BIT(trans->cfg->csr->flag_master_dis),
CSR_RESET_REG_FLAG_MASTER_DISABLED, 100); BIT(trans->cfg->csr->flag_master_dis), 100);
if (ret < 0) if (ret < 0)
IWL_WARN(trans, "Master Disable Timed Out, 100 usec\n"); IWL_WARN(trans, "Master Disable Timed Out, 100 usec\n");
...@@ -594,7 +601,7 @@ static void iwl_pcie_apm_stop(struct iwl_trans *trans, bool op_mode_leave) ...@@ -594,7 +601,7 @@ static void iwl_pcie_apm_stop(struct iwl_trans *trans, bool op_mode_leave)
* D0A* (powered-up Active) --> D0U* (Uninitialized) state. * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
*/ */
iwl_clear_bit(trans, CSR_GP_CNTRL, iwl_clear_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_INIT_DONE); BIT(trans->cfg->csr->flag_init_done));
} }
static int iwl_pcie_nic_init(struct iwl_trans *trans) static int iwl_pcie_nic_init(struct iwl_trans *trans)
...@@ -1267,7 +1274,7 @@ static void _iwl_trans_pcie_stop_device(struct iwl_trans *trans, bool low_power) ...@@ -1267,7 +1274,7 @@ static void _iwl_trans_pcie_stop_device(struct iwl_trans *trans, bool low_power)
/* Make sure (redundant) we've released our request to stay awake */ /* Make sure (redundant) we've released our request to stay awake */
iwl_clear_bit(trans, CSR_GP_CNTRL, iwl_clear_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); BIT(trans->cfg->csr->flag_mac_access_req));
/* Stop the device, and put it in low power state */ /* Stop the device, and put it in low power state */
iwl_pcie_apm_stop(trans, false); iwl_pcie_apm_stop(trans, false);
...@@ -1497,9 +1504,9 @@ static void iwl_trans_pcie_d3_suspend(struct iwl_trans *trans, bool test, ...@@ -1497,9 +1504,9 @@ static void iwl_trans_pcie_d3_suspend(struct iwl_trans *trans, bool test,
iwl_pcie_synchronize_irqs(trans); iwl_pcie_synchronize_irqs(trans);
iwl_clear_bit(trans, CSR_GP_CNTRL, iwl_clear_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); BIT(trans->cfg->csr->flag_mac_access_req));
iwl_clear_bit(trans, CSR_GP_CNTRL, iwl_clear_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_INIT_DONE); BIT(trans->cfg->csr->flag_init_done));
iwl_pcie_enable_rx_wake(trans, false); iwl_pcie_enable_rx_wake(trans, false);
...@@ -1543,15 +1550,17 @@ static int iwl_trans_pcie_d3_resume(struct iwl_trans *trans, ...@@ -1543,15 +1550,17 @@ static int iwl_trans_pcie_d3_resume(struct iwl_trans *trans,
iwl_pcie_reset_ict(trans); iwl_pcie_reset_ict(trans);
iwl_enable_interrupts(trans); iwl_enable_interrupts(trans);
iwl_set_bit(trans, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); iwl_set_bit(trans, CSR_GP_CNTRL,
iwl_set_bit(trans, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); BIT(trans->cfg->csr->flag_mac_access_req));
iwl_set_bit(trans, CSR_GP_CNTRL,
BIT(trans->cfg->csr->flag_init_done));
if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_8000) if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_8000)
udelay(2); udelay(2);
ret = iwl_poll_bit(trans, CSR_GP_CNTRL, ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, BIT(trans->cfg->csr->flag_mac_clock_ready),
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, BIT(trans->cfg->csr->flag_mac_clock_ready),
25000); 25000);
if (ret < 0) { if (ret < 0) {
IWL_ERR(trans, "Failed to resume the device (mac ready)\n"); IWL_ERR(trans, "Failed to resume the device (mac ready)\n");
...@@ -1562,7 +1571,7 @@ static int iwl_trans_pcie_d3_resume(struct iwl_trans *trans, ...@@ -1562,7 +1571,7 @@ static int iwl_trans_pcie_d3_resume(struct iwl_trans *trans,
if (!reset) { if (!reset) {
iwl_clear_bit(trans, CSR_GP_CNTRL, iwl_clear_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); BIT(trans->cfg->csr->flag_mac_access_req));
} else { } else {
iwl_trans_pcie_tx_reset(trans); iwl_trans_pcie_tx_reset(trans);
...@@ -1939,7 +1948,7 @@ static bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans, ...@@ -1939,7 +1948,7 @@ static bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans,
/* this bit wakes up the NIC */ /* this bit wakes up the NIC */
__iwl_trans_pcie_set_bit(trans, CSR_GP_CNTRL, __iwl_trans_pcie_set_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); BIT(trans->cfg->csr->flag_mac_access_req));
if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_8000) if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_8000)
udelay(2); udelay(2);
...@@ -1964,8 +1973,8 @@ static bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans, ...@@ -1964,8 +1973,8 @@ static bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans,
* and do not save/restore SRAM when power cycling. * and do not save/restore SRAM when power cycling.
*/ */
ret = iwl_poll_bit(trans, CSR_GP_CNTRL, ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN, BIT(trans->cfg->csr->flag_val_mac_access_en),
(CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY | (BIT(trans->cfg->csr->flag_mac_clock_ready) |
CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000); CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000);
if (unlikely(ret < 0)) { if (unlikely(ret < 0)) {
iwl_trans_pcie_dump_regs(trans); iwl_trans_pcie_dump_regs(trans);
...@@ -2003,7 +2012,7 @@ static void iwl_trans_pcie_release_nic_access(struct iwl_trans *trans, ...@@ -2003,7 +2012,7 @@ static void iwl_trans_pcie_release_nic_access(struct iwl_trans *trans,
goto out; goto out;
__iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL, __iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); BIT(trans->cfg->csr->flag_mac_access_req));
/* /*
* Above we read the CSR_GP_CNTRL register, which will flush * Above we read the CSR_GP_CNTRL register, which will flush
* any previous writes, but we need the write that clears the * any previous writes, but we need the write that clears the
...@@ -3232,12 +3241,12 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev, ...@@ -3232,12 +3241,12 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev,
* id located at the AUX bus MISC address space. * id located at the AUX bus MISC address space.
*/ */
iwl_set_bit(trans, CSR_GP_CNTRL, iwl_set_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_INIT_DONE); BIT(trans->cfg->csr->flag_init_done));
udelay(2); udelay(2);
ret = iwl_poll_bit(trans, CSR_GP_CNTRL, ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, BIT(trans->cfg->csr->flag_mac_clock_ready),
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, BIT(trans->cfg->csr->flag_mac_clock_ready),
25000); 25000);
if (ret < 0) { if (ret < 0) {
IWL_DEBUG_INFO(trans, "Failed to wake up the nic\n"); IWL_DEBUG_INFO(trans, "Failed to wake up the nic\n");
......
...@@ -3,6 +3,7 @@ ...@@ -3,6 +3,7 @@
* Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved.
* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
* Copyright(c) 2016 - 2017 Intel Deutschland GmbH * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
* Copyright(c) 2018 Intel Corporation
* *
* Portions of this file are derived from the ipw3945 project, as well * Portions of this file are derived from the ipw3945 project, as well
* as portions of the ieee80211 subsystem header files. * as portions of the ieee80211 subsystem header files.
...@@ -273,7 +274,7 @@ static void iwl_pcie_txq_inc_wr_ptr(struct iwl_trans *trans, ...@@ -273,7 +274,7 @@ static void iwl_pcie_txq_inc_wr_ptr(struct iwl_trans *trans,
IWL_DEBUG_INFO(trans, "Tx queue %d requesting wakeup, GP1 = 0x%x\n", IWL_DEBUG_INFO(trans, "Tx queue %d requesting wakeup, GP1 = 0x%x\n",
txq_id, reg); txq_id, reg);
iwl_set_bit(trans, CSR_GP_CNTRL, iwl_set_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); BIT(trans->cfg->csr->flag_mac_access_req));
txq->need_update = true; txq->need_update = true;
return; return;
} }
...@@ -611,7 +612,7 @@ static void iwl_pcie_clear_cmd_in_flight(struct iwl_trans *trans) ...@@ -611,7 +612,7 @@ static void iwl_pcie_clear_cmd_in_flight(struct iwl_trans *trans)
trans_pcie->cmd_hold_nic_awake = false; trans_pcie->cmd_hold_nic_awake = false;
__iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL, __iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); BIT(trans->cfg->csr->flag_mac_access_req));
} }
/* /*
...@@ -1171,6 +1172,7 @@ static int iwl_pcie_set_cmd_in_flight(struct iwl_trans *trans, ...@@ -1171,6 +1172,7 @@ static int iwl_pcie_set_cmd_in_flight(struct iwl_trans *trans,
const struct iwl_host_cmd *cmd) const struct iwl_host_cmd *cmd)
{ {
struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
const struct iwl_cfg *cfg = trans->cfg;
int ret; int ret;
lockdep_assert_held(&trans_pcie->reg_lock); lockdep_assert_held(&trans_pcie->reg_lock);
...@@ -1188,19 +1190,19 @@ static int iwl_pcie_set_cmd_in_flight(struct iwl_trans *trans, ...@@ -1188,19 +1190,19 @@ static int iwl_pcie_set_cmd_in_flight(struct iwl_trans *trans,
* returned. This needs to be done only on NICs that have * returned. This needs to be done only on NICs that have
* apmg_wake_up_wa set. * apmg_wake_up_wa set.
*/ */
if (trans->cfg->base_params->apmg_wake_up_wa && if (cfg->base_params->apmg_wake_up_wa &&
!trans_pcie->cmd_hold_nic_awake) { !trans_pcie->cmd_hold_nic_awake) {
__iwl_trans_pcie_set_bit(trans, CSR_GP_CNTRL, __iwl_trans_pcie_set_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); BIT(cfg->csr->flag_mac_access_req));
ret = iwl_poll_bit(trans, CSR_GP_CNTRL, ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN, BIT(cfg->csr->flag_val_mac_access_en),
(CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY | (BIT(cfg->csr->flag_mac_clock_ready) |
CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP),
15000); 15000);
if (ret < 0) { if (ret < 0) {
__iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL, __iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); BIT(cfg->csr->flag_mac_access_req));
IWL_ERR(trans, "Failed to wake NIC for hcmd\n"); IWL_ERR(trans, "Failed to wake NIC for hcmd\n");
return -EIO; return -EIO;
} }
......
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