Commit a930d8bd authored by Fabio Estevam's avatar Fabio Estevam Committed by Peter Chen

usb: chipidea: Always build ULPI code

Commit 03e6275a ("usb: chipidea: Fix ULPI on imx51") causes a kernel
hang on imx51 systems that use the ULPI interface and do not select the
CONFIG_USB_CHIPIDEA_ULPI option.

In order to avoid such potential misuse, let's always build the
chipidea ULPI code into the final ci_hdrc object.

Tested on a imx51-babbage board.

Fixes: 03e6275a ("usb: chipidea: Fix ULPI on imx51")
Signed-off-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: default avatarPeter Chen <peter.chen@nxp.com>
parent 90f26cc6
...@@ -3,6 +3,7 @@ config USB_CHIPIDEA ...@@ -3,6 +3,7 @@ config USB_CHIPIDEA
depends on ((USB_EHCI_HCD && USB_GADGET) || (USB_EHCI_HCD && !USB_GADGET) || (!USB_EHCI_HCD && USB_GADGET)) && HAS_DMA depends on ((USB_EHCI_HCD && USB_GADGET) || (USB_EHCI_HCD && !USB_GADGET) || (!USB_EHCI_HCD && USB_GADGET)) && HAS_DMA
select EXTCON select EXTCON
select RESET_CONTROLLER select RESET_CONTROLLER
select USB_ULPI_BUS
help help
Say Y here if your system has a dual role high speed USB Say Y here if your system has a dual role high speed USB
controller based on ChipIdea silicon IP. It supports: controller based on ChipIdea silicon IP. It supports:
...@@ -38,12 +39,4 @@ config USB_CHIPIDEA_HOST ...@@ -38,12 +39,4 @@ config USB_CHIPIDEA_HOST
help help
Say Y here to enable host controller functionality of the Say Y here to enable host controller functionality of the
ChipIdea driver. ChipIdea driver.
config USB_CHIPIDEA_ULPI
bool "ChipIdea ULPI PHY support"
depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_CHIPIDEA
help
Say Y here if you have a ULPI PHY attached to your ChipIdea
controller.
endif endif
# SPDX-License-Identifier: GPL-2.0 # SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc.o obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc.o
ci_hdrc-y := core.o otg.o debug.o ci_hdrc-y := core.o otg.o debug.o ulpi.o
ci_hdrc-$(CONFIG_USB_CHIPIDEA_UDC) += udc.o ci_hdrc-$(CONFIG_USB_CHIPIDEA_UDC) += udc.o
ci_hdrc-$(CONFIG_USB_CHIPIDEA_HOST) += host.o ci_hdrc-$(CONFIG_USB_CHIPIDEA_HOST) += host.o
ci_hdrc-$(CONFIG_USB_OTG_FSM) += otg_fsm.o ci_hdrc-$(CONFIG_USB_OTG_FSM) += otg_fsm.o
ci_hdrc-$(CONFIG_USB_CHIPIDEA_ULPI) += ulpi.o
# Glue/Bridge layers go here # Glue/Bridge layers go here
......
...@@ -240,10 +240,8 @@ struct ci_hdrc { ...@@ -240,10 +240,8 @@ struct ci_hdrc {
struct ci_hdrc_platform_data *platdata; struct ci_hdrc_platform_data *platdata;
int vbus_active; int vbus_active;
#ifdef CONFIG_USB_CHIPIDEA_ULPI
struct ulpi *ulpi; struct ulpi *ulpi;
struct ulpi_ops ulpi_ops; struct ulpi_ops ulpi_ops;
#endif
struct phy *phy; struct phy *phy;
/* old usb_phy interface */ /* old usb_phy interface */
struct usb_phy *usb_phy; struct usb_phy *usb_phy;
...@@ -426,15 +424,9 @@ static inline bool ci_otg_is_fsm_mode(struct ci_hdrc *ci) ...@@ -426,15 +424,9 @@ static inline bool ci_otg_is_fsm_mode(struct ci_hdrc *ci)
#endif #endif
} }
#if IS_ENABLED(CONFIG_USB_CHIPIDEA_ULPI)
int ci_ulpi_init(struct ci_hdrc *ci); int ci_ulpi_init(struct ci_hdrc *ci);
void ci_ulpi_exit(struct ci_hdrc *ci); void ci_ulpi_exit(struct ci_hdrc *ci);
int ci_ulpi_resume(struct ci_hdrc *ci); int ci_ulpi_resume(struct ci_hdrc *ci);
#else
static inline int ci_ulpi_init(struct ci_hdrc *ci) { return 0; }
static inline void ci_ulpi_exit(struct ci_hdrc *ci) { }
static inline int ci_ulpi_resume(struct ci_hdrc *ci) { return 0; }
#endif
u32 hw_read_intr_enable(struct ci_hdrc *ci); u32 hw_read_intr_enable(struct ci_hdrc *ci);
......
...@@ -95,6 +95,9 @@ int ci_ulpi_resume(struct ci_hdrc *ci) ...@@ -95,6 +95,9 @@ int ci_ulpi_resume(struct ci_hdrc *ci)
{ {
int cnt = 100000; int cnt = 100000;
if (ci->platdata->phy_mode != USBPHY_INTERFACE_MODE_ULPI)
return 0;
while (cnt-- > 0) { while (cnt-- > 0) {
if (hw_read(ci, OP_ULPI_VIEWPORT, ULPI_SYNC_STATE)) if (hw_read(ci, OP_ULPI_VIEWPORT, ULPI_SYNC_STATE))
return 0; return 0;
......
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